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检索条件"任意字段=5th International Conference on Algorithms and Architectures for Parallel Processing"
3299 条 记 录,以下是2171-2180 订阅
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A Twi-Serial-parallel Correlator with FFT Approach for Long Code Acquisition in Spread Spectrum Communication System
A Twi-Serial-Parallel Correlator with FFT Approach for Long ...
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international conference on Wireless Communications, Networking and Mobile Computing (WiCom)
作者: Yong Chen Hang-sheng Zhao Nanjing Institute of Post and Telecommunications Nanjing China
In this paper, the representation of Doppler effect on code acquisition performance is analyzed and the principle of combining serial-parallel correlator with FFT is given based on the discrete-time signal processing.... 详细信息
来源: 评论
Uniform routing architecture for FPGA with embedded IP cores
Uniform routing architecture for FPGA with embedded IP cores
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international conference on ASIC
作者: Liyun Wang Yuan Wang Liguang Chen Jian Wang Xing Chen Fang Wu Jinmei Lai Jiarong Tong National Natural Science Foundation China
A uniform routing architecture is presented, which offers CLB, IOB and IP Cores an identical routing resource. At the same time, some method is adopted to optimize routing performance. With all unidirectional segmente... 详细信息
来源: 评论
Grid based environment application development — GreenView application
Grid based environment application development — GreenView ...
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IEEE international conference on Intelligent Computer Communication and processing (ICCP)
作者: Danut Mihon Victor Bacu Teodor Stefanut Dorian Gorgan Computer Science Department Technical University of Cluj Napoca Romania
this paper presents the development phases of the GreenView application which is based on ESIP Platform (Environment Oriented Satellite Image processing) and uses gProcess Platform's operators and services. the Pr... 详细信息
来源: 评论
parallelized Architecture of Multiple Classifiers for Face Detection
Parallelized Architecture of Multiple Classifiers for Face D...
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IEEE international conference on Application-specific Systems, architectures and Processors
作者: Junguk Cho Bridget Benson Shahnam Mirzaei Ryan Kastner Department of Computer and Science and Engineering University of California Department of Electrical and Computer Engineering University of California
this paper presents a parallelized architecture of multiple classifiers for face detection based on the Viola and Jones object detection method. this method makes use of the AdaBoost algorithm which identifies a seque... 详细信息
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Multiple-Symbol parallel Interpolation in All-Digital Receiver
Multiple-Symbol Parallel Interpolation in All-Digital Receiv...
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international conference on Wireless Communications, Networking and Mobile Computing (WiCom)
作者: Yingjian Wang Yu Zhang Zhixing Yang Department of Electronic Engineering Tsinghua National Laboratory of Information Science and Technology (TNLIST) Tsinghua University Beijing China
An earlier paper [1] introduced the theory of the single-symbol parallel interpolation in all-digital receiver, in which the interpolation is based on a scale of symbol, characterized by vector-operation of the vector... 详细信息
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the Improvement of Ant Colony Algorithm and Its Application to TSP Problem
The Improvement of Ant Colony Algorithm and Its Application ...
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international conference on Wireless Communications, Networking and Mobile Computing (WiCom)
作者: Jin Zhang Huaishan Liu Siyou Tong Ling Wang Key Laboratory of Submarine geosciences and Prospecting Technique Ministry Education Ocean University of China Qingdao China Key Laboratory of Submarine Geosciences and Prospecting Technique Ministry Education Ocean University of China Qingdao China Qingdao College Ocean University of China Qingdao China
the researches and applications on ant colony algorithm have made great progress in recent years. A number of results have proved the validity of the algorithm and its advantages in some fields. However, its basic sho... 详细信息
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Extraction of User Profile Based on the Hadoop Framework
Extraction of User Profile Based on the Hadoop Framework
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international conference on Wireless Communications, Networking and Mobile Computing (WiCom)
作者: Lan Huang Xiao-wei Wang Yan-dong Zhai Bin Yang College of Computer Science and Technology Jilin University Changchun China
With the rapid development of Internet, the Web information dramatically increases, the users are often involved in voluminous information to feel lose, Distributed processing of mass data through a cluster composed b... 详细信息
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A Massively parallel Coprocessor for Convolutional Neural Networks
A Massively Parallel Coprocessor for Convolutional Neural Ne...
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IEEE international conference on Application-specific Systems, architectures and Processors
作者: Murugan Sankaradas Venkata Jakkula Srihari Cadambi Srimat Chakradhar Igor Durdanovic Eric Cosatto Hans Peter Graf NEC Laboratories America Inc.
We present a massively parallel coprocessor for accelerating Convolutional Neural Networks (CNNs), a class of important machine learning algorithms. the coprocessor functional units, consisting of parallel 2D convolut... 详细信息
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An FPGA-based parallel Hardware Architecture for Real-time Face Detection using a Face Certainty Map
An FPGA-based Parallel Hardware Architecture for Real-time F...
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IEEE international conference on Application-specific Systems, architectures and Processors
作者: Seunghun Jin Dongkyun Kim thuy Tuong Nguyen Bongjin Jun Daijin Kim Jae Wook Jeon Dept. of Electrical and Computer Engineering Sungkyunkwan University Dept. of Computer Science and Engineering Postech School of Information and Computer Engineering Sungkyunkwan University
this paper presents an FPGA-based parallel hardware architecture for real-time face detection. An image pyramid with twenty depth levels is generated using the input image. For these scaled-down images, a local binary... 详细信息
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Impact of Loop Tiling on the Controller Logic of Acceleration Engines
Impact of Loop Tiling on the Controller Logic of Acceleratio...
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IEEE international conference on Application-specific Systems, architectures and Processors
作者: Hritam Dutta Jiali Zhai Frank Hannig Jurgen Teich Hardware/Software Co-Design Department of Computer Science University of Erlangen-Nuremberg Hardware/Software Co-Design Department of ComputerScience University of Erlangen-Nuremberg
High computational effort in modern signal and image processing applications often demands for special purpose accelerators in a system on chip (SoC). New high level synthesis methodologies enable the automated design... 详细信息
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