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Adaptive Huffman Coding with Memory Optimization

Adaptive Huffman Coding with Memory Optimization

引用

Smart Electronics and Communication (ICOSEC), international conference on

作者： Ramyasri Maturi Raju Javvadi Vignesh Naga Manikanta Sunkara Sunkara Teena Mrudula Department of Electronics and Communication Engineering Velagapudi Ramakrishna Siddhartha Engineering College Vijayawada India

ISBN: (数字)9798331504403

ISBN: (纸本)9798331504410

Adaptive Huffman coding (AHC) is an entropy encoding algorithm used for lossless data compression. this paper explores the effectiveness of Adaptive Huffman coding in achieving efficient data compression. the primary goal is to present and analyze the performance of AHC, focusing on its compression efficiency. the study integrates MATLAB code and block diagrams to evaluate the algorithm’s effectiveness. By leveraging parallel processing and optimization techniques, our approach aims to enhance compression efficiency. the paper highlights the significance of AHC in data compression and examines its implementation for improved performance.

关键词： Codes Adaptive systems Symbols Memory parallel processing Encoding Huffman coding MATLAB Optimization Standards

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LION Real-Time I/O Transfer Control for Massively parallel Processor Arrays 21

LION Real-Time I/O Transfer Control for Massively Parallel P...

引用

19th ACM-IEEE international conference on Formal Methods and Models for System Design (MEMOCODE)

作者： Walter, Dominik Teich, Juergen Friedrich Alexander Univ Erlangen Nurnberg Hardware Software Codesign Erlangen Germany

ISBN: (纸本)9781450391276

the performance of many accelerator architectures depends on the communication with external memory. During execution, new I/O data is continuously fetched forth and back to memory. this data exchange is very often performance-critical and a careful orchestration thus vital. To satisfy the I/O demand for accelerators of loop nests, it was shown that the individual reads and writes can be merged into larger blocks, which are subsequently transferred by a single DMA transfer. Furthermore, the order in which such DMA transfers must be issued, was shown to be reducible to a real-time task scheduling problem to be solved at run time. Rather than just concepts, we investigate in this paper efficient algorithms, data structures and their implementation in hardware of such a programmable Loop I/O Controller architecture called LION that only needs to be synthesized once for each processor array size and I/O buffer configuration, thus supporting a large class of processor arrays. Based on a proposed heap-based priority queue, LION is able to issue every 6 cycles a new DMA request to a memory bus. Even on a simple FPGA prototype running at just 200 MHz, this allows for more than 33 million DMA requests to be issued per second. Since the execution time of a typical DMA request is in general at least one order of magnitude longer, we can conclude that this rate is sufficient to fully utilize a given memory interface. Finally, we present implementations on FPGA and also 22nm FDX ASIC showing that the overall overhead of a LION typically amounts to less than 5% of an overall processor array design.

关键词： Massively parallel Processor Arrays TCPA I/O Scheduling Data Transfers Priority QueueZ

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parallel Binary QUasi-Affine TRansformation Evolution (QUATRE) Algorithm 1

引用

18th international conference on Intelligent Information Hiding and Multimedia Signal processing, IIH-MSP 2022

作者： Zhuang, Zhongjie Chu, Shu-Chuan Pan, Jeng-Shyang Snašel, Václav College of Computer Science and Engineering Shandong University of Science and Technology Qingdao266590 China College of Science and Engineering Flinders University 1284 South Road Clovelly ParkSA5042 Australia Faculty of Electrical Engineering and Computer Science VŠB-Technical University of Ostrava Ostrava Czech Republic

ISBN: (数字)9789819906055

ISBN: (纸本)9789819906048

QUasi-Affine TRansformation Evolutionary (QUATRE) generalized differential evolution algorithm to matrix form, which was designed for solving continuous problems. Binary QUATRE (BQUATRE) algorithm convert the original BQUATRE to the binary form to deal with hyperspectral dimensionality reduction. In this paper, in order to further improve the performance of the BQUATRE, the parallel mechanism is introduced to BQUATRE, and proposed parallel binary BQUATRE algorithm (PBQUATRE). the global best solution and the group best solution both guide the position update of other solutions with a probability of 0.5 in communication phase. the mutation matrix B is also affected not only by the global best solution but also by the group best solution. the proposed algorithm is applied for feature selection and hyperspectral dimensionality reduction, and experimental results show that the proposed PBQUATRE is superior to the classics and state-of-the-art algorithms. © 2023, the Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

关键词： Linear transformations

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Spectrum Sensing Based on WaveNet for Cognitive Radio with Multiple parallel Signal Sequences Analysis 5

Spectrum Sensing Based on WaveNet for Cognitive Radio with M...

引用

5th IEEE international Electrical and Energy conference, CIEEC 2022

作者： Wang, Lu Jia, Hao Deng, Yaping Li, Yuting Hong, Bowen University of Waterloo Electrical and Computer Engineering Ontario Canada Xi'an University of Technology School of Automation and Information Xi'an China

ISBN: (数字)9781665411042

ISBN: (纸本)9781665411042

Spectrum sensing is a crucial technology for cognitive radios and cognitive wireless sensing networks. In order to improve spectrum utilization and avoid interference to primary users, it is necessary to detect whether the spectrum is occupied accurately. this paper proposes a sequence-to-sequence model based on WaveNet structure for spectrum sensing as a practical solution and obtaining the occupied time location. Compared with the traditional Convolutional Neuron Network, the model proposed in this paper can be based on the signal data, reducing the dimension of input signal, and alleviating the computational burden. Furthermore, the model considers the data sequence dependence on time to obtain a comprehensive judgment, and achieves the classification of the corresponding sampling point data on each time step to realize spectrum sensing and time location Based on the data-sequence analysis, researchers can develop more efficient wireless sensor management strategies. the model alleviates gradient-vanishing and gradient-exploding problems in longtime dependence or long time-series data that generated by high sampling data. Reducing the computational cost and energy consumption of wireless sensor networks is another novel feature of the proposed model. Compared with RNN models, the proposed model reduces the number of model parameters on a large scale. At the same time, the model can achieve the parallel signal processing and energy-saving optimization without extra parameters. © 2022 IEEE.

关键词： Cognitive radio

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Re-structuring CNN using quantum layer executed on FPGA hardware for classifying 2-D data

Re-structuring CNN using quantum layer executed on FPGA hard...

引用

international conference on Integrated Circuits, Design, and Verification (ICDV)

作者： Nhat Hoang Bach Le Ha Vu Dinh Lam Tran thanh Toan Dao thi thu Hong Luu Duy Ninh Nguyen Institute of Electronics Academy of Science and Technology Hanoi Vietnam Electronic department University of Transport and Communications Hanoi Vietnam

ISBN: (数字)9798350371864

ISBN: (纸本)9798350371871

the article proposes a solution to restructure Convolutional Neural Network (CNN) architectures by integrating parameter quantization techniques with traditional CNN models capable of deployment on Field-Programmable Gate Array (FPGA) hardware for evaluating the classification performance of two-dimensional data in real-world scenarios. the solution introduces an additional quantum layer before the final classification layer of the CNN to receive standardized outputs, followed by computations in the Hilbert vector space to generate probability values for assessing classification results. the quantization process helps the model swiftly identify data features while optimizing the parallel computing capability of FPGA hardware. the model is evaluated on the MNIST handwritten digit dataset, revealing two advantages: time-processing on FPGA is four times faster compared to using only the Central processing Unit (CPU) on the PynQ-z2 kit board; classification accuracy is higher when utilizing the quantum layer compared to without it, with the same number of training iterations. these results demonstrate the feasibility of hardware-accelerated AI algorithms combined with quantum algorithms in real applications.

关键词： Quantization (signal) Computational modeling Hardware Data models Vectors Central processing Unit Convolutional neural networks

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Optimization of Regression Analysis by Conducting parallel Calculations 5

Optimization of Regression Analysis by Conducting Parallel C...

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5th international conference on Computational Linguistics and Intelligent Systems (COLINS)

作者： Mochurad, Lesia Lviv Polytech Natl Univ Artificial Intelligence Dept UA-79013 Lvov Ukraine

the regression analysis of large data sets by parallelization is investigated in the work. Different approaches to parallel computing are proposed. the parallelization of the gradient descent method and the stochastic gradient descent using OpenMP and MPI technologies, as well as their hybrid, is performed. the efficiency of the proposed parallel algorithms is analyzed. A number of numerical experiments were performed. Acceleration of 5 times was achieved using the six-core architecture of a personal computer. By varying the number of threads and processor cores, the possibility of further optimization of the computational process is established. the problem of erroneous exchange is considered, which often has a negative effect on acceleration during parallelization using OpenMP. the advantages and disadvantages of using each of the technologies are analyzed. Without reducing the generality, the software product is developed in the work, which can be used in the regression analysis of big data processing in a wide range of economic problems.

关键词： Gradient descent algorithm multicore OpenMP technology MPI technology acceleration

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A Hybrid parallel Algorithm With Multiple Improved Strategies 12th

A Hybrid Parallel Algorithm With Multiple Improved Strategie...

引用

12th IFIP TC 12 international conference on Intelligent Information processing, IIP 2022

作者： Wang, Tingting Pan, Jeng-Shyang Song, Pei-Cheng Chu, Shu-Chuan College of Computer Science and Engineering Shandong University of Science and Technology Qingdao China Department of Information Management Chaoyang University of Technology Taichung Taiwan College of Science and Engineering Flinders University Bedford Park Australia

ISBN: (纸本)9783031039478

this paper proposes a novel hybrid parallel algorithm with multiple improved strategies. the whole population is divided into three subpopulations and each sub-population executes butterfly optimization algorithm, grey wolf optimization algorithm, and marine predator algorithm respectively. Meanwhile, they share information through three different communication strategies. And in order to improve the performance of the algorithm, the text uses the cubic chaotic mapping mechanism in the initialization stage. At the same time, the idea of adaptive parameter strategy is also introduced, so that some hyperparameters are changed along with the iteration. the results show that the algorithm can provide very competitive results, and is superior to the best algorithm in the literature on most test functions. © 2022, IFIP international Federation for Information processing.

关键词： parallel algorithms

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Parameter-Free Single-Pass parallel Metropolis Light Transport with Sensor Path Visibility 2022

Parameter-Free Single-Pass Parallel Metropolis Light Transpo...

引用

5th international conference on Image and Graphics processing, ICIGP 2022

作者： Zou, LiuLei Xu, WenCong Zhu, JinMing Huang, Yan Zhu, HongJin Fan, HongHui Zen Studio NetEase Games China Jiangsu University of Technology China East China University of Science and Technology China Shanghai SUTONG Information Technology CO.LTD. China

ISBN: (纸本)9781450395465

We present a visibility-driven algorithm for light transport simulation, which mutates sensor paths with the visibility as the target function. the acceptance or rejection of proposed paths in our algorithm depends only on their visibility. On this basis, the exact path PDF can be obtained by dividing the original PDF by the normalization term. In addition, fully adaptive mutation step sizes are utilized for parameter-free calculations, and the image blocks can be calculated independently and parallel. We use the small adaptive step size in a single image block and take the normalization term of the image block as the probability of a large step to implement completely parameter-free algorithm. Normalization terms are non-shared between image blocks, so image blocks can be independent of each other, our algorithm can compute parallel and solve the stratified problem in image space. Experience shows that our algorithm has better robustness, which can process difficult paths and do not get stuck. © 2022 ACM.

关键词： Visibility

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Optimizing Concurrent Data Structures in Rust

Optimizing Concurrent Data Structures in Rust

引用

Consumer Electronics and Computer Engineering (ICCECE), 2021 IEEE international conference on

作者： Xin Zhao Collage of Computer Science and Technology National University of Defense Technology Changsha China

ISBN: (数字)9798331533113

ISBN: (纸本)9798331533120

Lock- Free data structures are a key approach in concurrent programming that allows for thread-safe data manipulation without the need for traditional locking methods. they can diminish the overhead of context switching and lock contention in multi-threaded scenarios, which in turn boosts program performance. this paper investigates the efficient construction of lock-free concurrent data structures, harnessing Rust's type system and the commutativity of operations to attain a considerable performance enhancement compared to traditional atomic data types.

关键词： Concurrent computing Costs Commutation Instruction sets Memory management Switches Programming parallel processing Data structures Safety

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G-SM3: High-Performance Implementation of GPU-based SM3 Hash Function 28

G-SM3: High-Performance Implementation of GPU-based SM3 Hash...

引用

IEEE 28th international conference on parallel and Distributed Systems (IEEE ICPADS)

作者： Dong, Jiankuo Lu, Sheng Zhang, Pinchang Zheng, Fangyu Xiao, Fu Nanjing Univ Posts & Telecommun Sch Comp Sci Nanjing Peoples R China Chinese Acad Sci Inst Informat Engn Beijing Peoples R China

ISBN: (纸本)9781665473156

Hash is one of the most important algorithms of cryptography, it is widely used in cryptographic primitives, such as digital signature, key exchange and so on. Further, hash cryptography is also the core operation of blockchain technology. With the explosive growth of the number of IoT devices and the rapid development of blockchain technology, the computing performance of hash has received widespread attention. the GPU high-performance computing platforms with a number of arithmetic cores are widely used in cryptographic optimization and acceleration. In this paper, we propose an efficient parallel accelerated framework of SM3 cryptography hash function based on GPU parallel computing devices, short for GPU-based SM3 (G-SM3). Our G-SM3 optimizes the implementation of the hash cryptographic algorithm from three aspects: parallelism, memory access and instructions. On the desktop GPU NVIDIA Titan V, the peak performance of G-SM3 reaches 23 GB/s, which is more than 7.5 times the performance of OpenSSL on a top-level server CPU (E5-2699V3) with 16 cores. On the embedded GPU which consumes less than 40 W, the SM3 throughput reaches 3.8 GB/s, which is even better than the performance of the server-level CPU. Based on the same GTX 1080, our performance is 1.12 times that of the fastest known GPU implementation, and the latency is reduced by more than 95%. Compared to other platforms, our G-SM3 has a huge advantage.

关键词： SM3 Graphic processing Unit CUDA Cryptographic Engineering

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