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Optimizing IoT Capabilities: Leveraging FPGA for Superior Performance, Efficiency and Security

Optimizing IoT Capabilities: Leveraging FPGA for Superior Pe...

引用

Emerging Technology (INCET), international conference for

作者： Gurdeep Singh Amanpreet Kaur Vaneeta Bhardwaj Shishir Shrivastava Chitkara University Institute of Engineering and Technology Chitkara University Punjab India

ISBN: (数字)9798350361155

ISBN: (纸本)9798350361162

Nowadays IoT (Internet of things) is used everywhere, like homes, industry, automation, health sector, hospitality, smart cities, farming, tourism, self-driving cars etc. IoT is implemented successfully on many available hardware devices such as Microcontrollers, Arduino, Raspberry Pi, ASIC (Application-Specific Integrated Chip), FPGA (Field Programmable Gate Array) etc. Out of all these hardware platforms, FPGA is found to be more energy-efficient and the least power-consumable device. the use of FPGA with IoT is more reliable and effective in terms of power and energy saving. In this work, the integration of different technologies using IoT and FPGA is represented in the comparison table. the number of research works and publications on IoT using different hardware devices have been shown from year 2015 to 2023.

关键词： Performance evaluation Microcontrollers Smart cities Energy conservation parallel processing Hardware Internet of things

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HMA: An Efficient Training Method for NLP Models 2021

HMA: An Efficient Training Method for NLP Models

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5th international conference on Innovation in Artificial Intelligence (ICIAI)

作者： Yang, Yuetong Lai, Zhiquan Cai, Lei Li, Dongsheng Natl Univ Def Technol Sch Comp Natl Key Lab Parallel & Distributed Proc Changsha Hunan Peoples R China

ISBN: (纸本)9781450388634

Nowadays, deep learning has been widely used for solving natural language processing (NLP) problems. Embedding matrices are common-used in the NLP deep models for automatical feature learning. However, the sparsity of embedding matrices makes it challenging to efficiently train the NLP models in data parallelism. When training with synchronous optimization methods, the aggregation on sparse gradients brings high communication cost and low scalability for distributed training. In this paper, we combine Model Average (MA) and synchronous optimization methods together, and propose HMA, a hybrid training method for NLP deep models. Furthermore, we implement HMA method in Horovod+TensorFlow training framework and conduct experimental evaluation with representative NLP models. For NLP models with a large number of sparse parameters, HMA saves over 30% wall-clock time compared with the state-of-the-art distributed training framework, while maintaining the same final training loss.

关键词： distributed training deep learning model average local sgd

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parallel Frequent Itemset Mining Algorithm and Optimization Based on Spark

Parallel Frequent Itemset Mining Algorithm and Optimization ...

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IEEE international conference on Artificial Intelligence and Computer Applications (ICAICA)

作者： Chunran Liu Tianjin University of Technology Tianjin China

Frequent item set mining is an important task in data mining, which can help us find the variable combinations that occur frequently in the data set. In order to solve the problem of frequent itemset mining in large-scale high-dimensional data, we propose a parallel frequent itemset mining algorithm based on Spark, OSFPG. the algorithm is optimized on the basis of the traditional FP-growth algorithm, and the number of candidate item sets is reduced by constructing a special data structure called FP tree, thus improving the efficiency of frequent item set mining. the algorithm mainly uses the idea of load balancing to optimize the grouping strategy. It also considers two factors of partition computation and FP-Tree size to ensure that the total load between each group is approximately equal. On the basis of Spark based SFPG algorithm, we implement this optimized algorithm. Based on the SFPG algorithm, it is improved to dynamically allocate computing resources and carry out distributed computing, so that the intermediate results generated in the operation process are saved in memory, thus effectively reducing the data consumption. In order to verify the performance of OSFPG algorithm, we apply it to a real data set for experiments. Experimental results show that compared with the traditional FP-Growth algorithm, the proposed algorithm has higher efficiency and lower time complexity when processing large-scale high-dimensional data. In addition, the algorithm can deal with dynamically updated data effectively and has strong practicability.

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Deep Learning and Classical Machine Learning for code mapping in Heterogeneous Platforms 5

Deep Learning and Classical Machine Learning for code mappin...

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5th IEEE international conference on Networking and Advanced Systems, ICNAS 2021

作者： Hakimi, Yacine Baghdadi, Riyad Challal, Yacine Algiers Algeria de Massachusetts United States

ISBN: (纸本)9781665428217

Programming modern heterogeneous systems is becoming more and more challenging due to their complexity. To simplify software development for such architectures, more advanced compilers are being designed. Such compilers automatically optimize code and hide the complexity of the target heterogeneous architecture from the developer. An example of problems that these compilers need to solve is to decide whether to map (run) a piece of code on CPU or GPU (Graphics processing Unit). State-of-the-art compilers use accurate optimization heuristics to solve such problems and decide about how to optimize a code automatically. Traditional machine learning and Deep Learning approaches have both been used to build such heuristics. While traditional machine learning is well suited for training on small datasets, it is not well suited for extracting a set of high-quality features, on the other hand, deep learning can automatically extract features, but it needs a large amount of data to get satisfactory *** this paper, we propose a new machine-learning-based model that allows a compiler to automatically decide whether to map a piece of code to CPU or GPU. Our model uses traditional machine learning and deep learning by exploiting the advantages of each of them. We show that our proposed model, which requires a small amount of data and training time, matches and outperforms state-of-the-art pre-trained deep learning models that require large amounts of data. © 2021 IEEE.

关键词： Graphics processing unit

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sTiles: An Accelerated Computational Framework for Sparse Factorizations of Structured Matrices

sTiles: An Accelerated Computational Framework for Sparse Fa...

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ISC High Performance 2025 Research Paper Proceedings (40th international conference)

作者： Esmail Abdul Fattah Hatem Ltaief Håvard Rue David Keyes CEMSE Division King Abdullah University of Science and Technology Makkah Saudi Arabia

ISBN: (数字)9783982633619

this paper introduces sTiles, a GPU-accelerated software framework that computes factorization of sparse structured symmetric matrices. By leveraging tile algorithms to achieve fine-grained computations, sTiles employs a structure-aware flow of task executions for the Cholesky factorization to tackle challenging arrowhead sparse matrices with variable bandwidths. these matrices, common in various scientific and engineering fields, necessitate an adaptive factorization strategy that operates only on nonzero tiles. Our approach relies first on a collection of permutation techniques to minimize fill-in during factorization. then, sTiles proceeds with a customized static scheduler to orchestrate computational tasks on shared-memory systems equipped with GPU hardware accelerators. sTiles strikes the required balance between the tile size and the degree of parallelism. the former has a direct impact on the algorithmic intensity, although monitoring the additional floating-point operations and memory footprint becomes crucial for parallel performance. the latter may be limited due to the inherent arrowhead sparse matrix structure. To further expose parallelism, we must adopt a left-looking variant of the Cholesky factorization to break the sequential dependencies during the accumulation operations on the trailing submatrix and operate on them instead using tree reductions. Extensive evaluations demonstrate a boost in performance for the sparse Cholesky factorization on various arrowhead structured matrices against the state-of-the-art sparse libraries, with sTiles achieving up to 8.41X/9.34X/5.07X/11.08X speedups compared to CHOLMOD/SymPACK/MUMPS/PARDISO, respectively. On GPUs, sTiles further exploits the computational throughput by adjusting the two key ingredients aforementioned to attain a 5X speedup compared to a 32-core AMD EPYC CPU when executed on an NVIDIA A100 GPU. Our generic software framework 1 1 the software is available at https://***/esmail-abdulfatta

关键词： Symmetric matrices Software algorithms Graphics processing units Bandwidth parallel processing throughput Software Libraries Computational efficiency Sparse matrices

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Research on Trust Evaluation Model for Vehicle-to-Grid Interaction Based on Zero Trust Architecture

Research on Trust Evaluation Model for Vehicle-to-Grid Inter...

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Information Science, parallel and Distributed Systems (ISPDS), international conference on

作者： Nankai Zhou Shenglong Ji Qingmei Mao North China University of Technology Beijing China Qianxin Technology Group Co. LTD

ISBN: (数字)9798350352719

ISBN: (纸本)9798350352726

During vehicle-to-grid (V2G) interactions, information is transmitted across multiple platforms, posing significant security risks to both information transmission and network boundaries. Traditional evaluation techniques, which rely on fixed permission assignments and predefined rules, struggle to adapt to scenarios characterized by a large number of vehicles, frequent changes in network topology, and diverse service demands. this paper proposes a trust evaluation model based on zero trust architecture. By introducing multidimensional user attribute sets, platform attribute feature sets, and user recommendation attributes, the model dynamically evaluates the trustworthiness of users and platforms. It uses trust values to dynamically authorize access subjects and assess platform reliability. this approach enhances the system's ability to identify malicious behavior and improves the security of data resources and transmission in V2G interactions. Experimental results indicate that the proposed zero trust-based trust evaluation model significantly enhances the security and dynamic responsiveness of V2G interactions.

关键词： Vehicle-to-grid Technological innovation Network topology Data security Evaluation models Information processing Zero Trust

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To BI or not to BI?

To BI or not to BI?

引用

Computers and Artificial Intelligence Technologies (CAIT), international conference on

作者： Adil Alizada Johan John thomas Mir Imaad Ali Kayvan Karim Mathematical and Computer Sciences Heriot Watt University Dubai UAE

ISBN: (数字)9798331530891

ISBN: (纸本)9798331530907

Suicide continues to be an issue in our society. Studies agree that it is best to deal with suicidal ideation in its early stages, and for this reason, researchers have been conducting experiments training different Neural Networks (NN) to detect it. Transformers are the dominant Neural Network architecture in the domain of Suicidal Ideation detection, being a robust solution for not only the proposed problem but for a wide variety of NLP problems. LSTM-CNN, one of the prominent architectures in the field is also proposed as a great solution. this study aims to evaluate the performance of BERT, RoBERTa, LSTM-CNN, and Bi-LSTM-CNN models for suicidal ideation detection. Our experiments indicated that BERT models have an edge over both LSTM-CNN and BI-LSTM-CNN models, scoring up to 0.986 accuracy on our test set. Furthermore, while directly comparing LSTM-CNN with Bi-LSTM-CNN, it was observed that the difference between the models isn’t significant. Our paper contributes to the domain by proving no advantage of using LSTM-CNN models over the Transformers.

关键词： Training Deep learning Filtering Image edge detection Computer architecture Bidirectional control Transformers Depression Natural language processing Encoding

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A C++ Library for Memory Layout and Performance Portability of Scientific Applications 28th

A C++ Library for Memory Layout and Performance Portabilit...

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28th international European conference on parallel and Distributed Computing , Euro-Par 2022

作者： Incardona, Pietro Gupta, Aryaman Yaskovets, Serhii Sbalzarini, Ivo F. Technische Universität Dresden Faculty of Computer Science Dresden Germany Max Planck Institute of Molecular Cell Biology and Genetics Dresden Germany Center for Systems Biology Dresden Dresden01307 Germany Center for Scalable Data Analytics and Artificial Intelligence ScaDS.AI Dresden/Leipzig Germany

ISBN: (纸本)9783031312083

We present a C++14 library for performance portability of scientific computing codes across CPU and GPU architectures. Our library combines generic data structures like vectors, multi-dimensional arrays, maps, graphs, and sparse grids with basic, reusable algorithms like convolutions, sorting, prefix sum, reductions, and scan. the memory layout of the data structures is adapted at compile-time using tuples with optional memory mirroring between CPU and GPU. We combine this transparent memory mapping with generic algorithms under two alternative programming interfaces: a CUDA-like kernel interface for multi-core CPUs, Nvidia GPUs, and AMD GPUs, as well as a lambda interface. We validate and benchmark the presented library using micro-benchmarks, showing that the abstractions introduce negligible performance overhead, and we compare performance against the current state of the art. © 2023, the Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Graphics processing unit

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High-Speed, Area-Efficient three-Operand Pipelined Adder

High-Speed, Area-Efficient Three-Operand Pipelined Adder

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Communication, Computing and Industry 4.0 (C2I4), international conference on

作者： Uzma Sultana Shreya Sagar S Veena.M.B Department of Electronics BMS College of Engineering Bangalore India

ISBN: (数字)9798350379884

ISBN: (纸本)9798350379891

In high-speed arithmetic circuits, adder efficiency is crucial for system performance. Common adders like Carry Skip, Han-Carlson, and Kogge Stone aim to optimize delay and area but still struggle to balance speed, area, and power. this paper introduces a new three-operand pipelined adder, replacing conventional parallel prefix logic with a streamlined pipelined method. the design combines an adder and subtractor in one unit, using modular logic to handle both functions. Pipelining allows continuous data processing, increasing throughput and reducing critical path delay. this three-operand pipelined adder achieves significant area and delay improvements over traditional designs. Using fewer logic gates and connections makes the design more compact and improves its performance. Simulations and synthesis validate the proposed design's effectiveness, showing major improvements in speed and area, making it valuable for high-speed, area-limited VLSI applications.

关键词： System performance Very large scale integration Logic gates throughput Silicon Delays Logic Adders Arithmetic Pipeline processing

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Prediction of mechanical properties of hot-rolled steel based on multi-channel convolutional neural network 23

Prediction of mechanical properties of hot-rolled steel base...

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Proceedings of the 2023 5th international conference on Internet of things, Automation and Artificial Intelligence

作者： Zhengzhong Wang Shengdong Wang Kai Zhang Xingchang Tang Yichao Wang Jiugang Group Carbon Steel Sheet Factory China State Key Laboratory of Advanced Processing and Recycling of Nonferrous Metals Lanzhou University of Technology China College of Computer and Communication Lanzhou University of Technology China

ISBN: (纸本)9798400716485

A multi-channel parallel convolutional neural network model is proposed to predict the mechanical properties of hot-rolled steel by chemical content and process parameters. the innovative contribution of this paper is to propose an improved Gramian Angular field method in the field of steel performance prediction, which converts the original data into a two-dimensional image matrix and introduces new features. Compared with the traditional convolutional neural network model, the multi-channel parallel convolutional neural network uses private blocks to decouple data and public blocks to integrate key data, which effectively improves the prediction accuracy of the model. Experiments in this paper show that the optimal hyperparameter structure model proposed in this paper has higher prediction accuracy than similar models proposed in other literatures.

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