this research focuses on the interaction between human and computer in processing text of fiction. It is related to operations as applied to overall managing and creating (p)arallel (t)ranslation (c)orpus (PTC) in reg...
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this research focuses on the interaction between human and computer in processing text of fiction. It is related to operations as applied to overall managing and creating (p)arallel (t)ranslation (c)orpus (PTC) in regard to English as well as Ukrainian language pair. Corpus linguistics comprehensive tools are used both for processingparallel translation corpus results obtained and for the afterwards analysis. Preliminary findings can be exemplary for better understanding of how corpora helps in the scrutiny of the individual style of an author dominants and in what way it can stimulate more qualitative and faithful rendition in translation. the paper provokes a number of issues on how quantitative parameterization can be useful for translation studies analysis. Also, we elucidate the possibilities of NPL manipulation in regard with tagging, hence, researching emotional dislocation as verbalized in fiction.
Compute-in-memory (CiM) is a promising solution for solving the bottleneck of frequent data movement between the memory and processor in Von-Neumann architecture. In conventional multi-bit CiM architecture, when compu...
Compute-in-memory (CiM) is a promising solution for solving the bottleneck of frequent data movement between the memory and processor in Von-Neumann architecture. In conventional multi-bit CiM architecture, when computing N-bit input and N-bit weight MAC operation, 2 N 1 cycles are needed for N-bit input modulation and normally 3-4−cycles with complex switch operation are needed for N-bit weight realization, which significantly degrades the final throughput and power efficiency. In this work, a C-2C DAC built in the 8T SRAM CiM array is designed for 4-bit weight and 4-bit input MAC operation, which can be completed in just one cycle. In the final power efficiency evaluation, our 4b/4b/8b CiM architecture attained up to 640 TOPS/W (normalized to 1b/1b/1b precision) which is a 6-10 times improvement as compared to the conventional multi-bit CiM architectures. the proposed architecture with 4b/4b/8b precision can provide 91.47% and 68.10% accuracy on CIFAR-10 and CIFAR-100 dataset classification, respectively.
Withthe development of intelligent printing equipment, equipment fault diagnosis based on Internet technology has become a trend. the existing platform uses the traditional relational database. Withthe increase of d...
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Image processing is an unceasingly growing area with a range of applications including cryptography, medicine, video surveillance, remote sensing, and many more. Implementing sophisticated algorithms to process the la...
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ISBN:
(纸本)9781728188676
Image processing is an unceasingly growing area with a range of applications including cryptography, medicine, video surveillance, remote sensing, and many more. Implementing sophisticated algorithms to process the large amount of data using software solutions makes the response slower, and that's where hardware implementation comes into the picture. Field Programmable Gate Arrays (FPGAs) are getting popular due to low latency, connectivity, parallel computing, and flexibility. the unique architecture of the FPGA has made it possible to use the technology for applying in many applications to have better and faster results. this paper is aiming at providing a comprehensive survey on the hardware implementations of image processingalgorithms to facilitate the improvement in efficiency using FPGAs. the widely used Xilinx PYNQ is also presented in this paper as they play a major role in reducing the development time.
During the process of photovoltaic array parameter identification, the use of the shuffled frog-leaping algorithm may encounter the issue of getting trapped in local optima. therefore, this paper proposes an improved ...
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ISBN:
(数字)9798350390315
ISBN:
(纸本)9798350390322
During the process of photovoltaic array parameter identification, the use of the shuffled frog-leaping algorithm may encounter the issue of getting trapped in local optima. therefore, this paper proposes an improved hybrid shuffled frog-leaping algorithm-based method for photovoltaic array parameter identification. To tackle these issues, an improved mixed frog-leaping algorithm is proposed. the algorithm incorporates a mixed frog-leaping approach to introduce an asynchronous time-varying learning factor. this enhancement aims to improve the learning capability and search speed of the global optimal individual while maintaining algorithm convergence. By conducting comparative simulation experiments withthe original hybrid shuffled frog-leaping algorithm, the results demonstrate that the improved algorithm enhances the identification speed and accuracy of the parameters in the photovoltaic cell single diode model. this improvement brings practical utility to the algorithm's application.
Traditional serial motif mining methods struggle to quickly identify motif information in large-scale time series data. A CUDA-based multidimensional motif mining algorithm is proposed to discover motifs in multidimen...
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ISBN:
(数字)9798331533991
ISBN:
(纸本)9798331534004
Traditional serial motif mining methods struggle to quickly identify motif information in large-scale time series data. A CUDA-based multidimensional motif mining algorithm is proposed to discover motifs in multidimensional time series. the algorithm introduces a multidimensional kNN Matrix Profile (kNN mMP) structure to address the limitations of the multidimensional mMP. parallel computation of kNN mMP using the CUDA architecture enables rapid motif discovery in massive datasets and facilitates detection of additional motif features, such as strong and weak motifs, as well as identification of anomalous motifs. Experiments on public datasets demonstrate that using CUDA for kNN mMP structure achieves a significant speedup; on NVIDIA GeForce RTX 4060, the kNN-mSTOMP-GPU algorithm exhibits a speedup of over 220 times compared to the STOMP algorithm utilizing only kNN mMP when the sequence length is 200,000.
the underwater environment is complex and variable. Light propagation is affected by multiple factors, such as water absorption and scattering. this often results in a lack of brightness in underwater images, which ca...
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ISBN:
(数字)9798350373820
ISBN:
(纸本)9798350373837
the underwater environment is complex and variable. Light propagation is affected by multiple factors, such as water absorption and scattering. this often results in a lack of brightness in underwater images, which can hinder the extraction of image features and affect the matching of feature points between subsequent images. Given the aforementioned issues, this paper proposes the use of the FPGA platform in conjunction withthe ORB algorithm to enhance the original feature extraction and descriptor generation algorithm. the goal is to improve the effectiveness of the feature extraction algorithm under varying light intensities. Additionally, a new 64-bit descriptor is designed using the parallelism of the FPGA. False matching points are removed through statistical analysis, ultimately achieving feature matching between two underwater images.
In neuroscientific experiments, blended images are used to examine how attention mechanisms in the human brain work. they are particularly suited for this research area, as a subject needs to focus on particular featu...
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ISBN:
(纸本)9781665462204
In neuroscientific experiments, blended images are used to examine how attention mechanisms in the human brain work. they are particularly suited for this research area, as a subject needs to focus on particular features in an image to be able to classify superimposed objects. As Convolutional Neural Networks (CNNs) take some inspiration from the mammalian visual system – such as the hierarchical structure where different levels of abstraction are processed on different network layers – we examine how CNNs perform on this task. More specifically, we evaluate the performance of four popular CNN architectures (ResNet18, ResNet50, CORnet-Z, and Inception V3) on the classification of objects in blended images. Since humans can rather easily solve this task by applying object-based attention, we also augment all architectures with a multi-headed self-attention mechanism to examine its effect on performance. Lastly, we analyse if there is a correlation between the similarity of a network architecture's structure to the human visual system and its ability to correctly classify objects in blended images. Our findings showed that adding a self-attention mechanism reliably increases the similarity to the V4 area of the human ventral stream, an area where attention has a large influence on the processing of visual stimuli.
In the past few years, there has been rampant growth in the amount of complex documents that stand in need of a deeper understanding of machine learning methods to classify them in many applications. the success of th...
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the FIR filter architecture is proposed that achieves high-speed operation focused on both fixed and programmable applications. Instead, we take a transpose form configuration of a block FIR filter in an area-delay ef...
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ISBN:
(数字)9798331501488
ISBN:
(纸本)9798331501495
the FIR filter architecture is proposed that achieves high-speed operation focused on both fixed and programmable applications. Instead, we take a transpose form configuration of a block FIR filter in an area-delay efficient way, which is effective for medium-to-large orders of the filters we introduce a generalized block formulation for transpose FIR filters, providing a unified approach for implementation. Moreover, we also present a low-complexity architecture based on the Multiple Constant Multiplication (MCM) strategy for fixed FIR filters, which helps in inordinate reduction in associated complexity and resources. the proposed architecture shows significant savings in terms of the Area-Delay Product (ADP), when compared to the traditional direct-form FIR filter architectures when they are implemented using digital blocks, which is especially true for medium and large sizes. the direct-form implementation is more efficient for low filter lengths, but as they increase, it becomes impractical, where the proposed architecture applies. this renders the design highly beneficial for reconfigurable and resource-efficient FIR filter applications. To verify the functionality of the proposed architecture, the design is coded in Verilog HDL, modeled in ModelSim and synthesized in Xilinx tools. Extensive experimental results validate that the proposed architecture save a huge amount with respect to resource usage as well as delay, thus are very beneficial for future digital signal processing applications. therefore, the proposed method offers a flexible and efficient design of fixed and reconfigurable FIR filters that meets the increasing demand for high-performance and low-complexity digital filter structures.
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