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POSTER: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors 28

POSTER: A Collaborative Multi-factor Scheduler for Asymmetri...

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28th international conference on parallel architectures and Compilation Techniques (PACT)

作者： Yu, Teng Petoumenos, Pavlos Janjic, Vladimir Zhu, Mingcan Leather, Hugh thomson, John Univ St Andrews St Andrews Fife Scotland Univ Edinburgh Edinburgh Midlothian Scotland

ISBN: (纸本)9781728136134

Asymmetric multicore processors (AMP) are necessary for extracting performance in an era of limited power budget and dark silicon. We have efficient symmetric schedulers, efficient asymmetric schedulers for single-threaded workloads, and efficient asymmetric schedulers for single program workloads. What we do not have is a scheduler that can handle all three factors affecting AMP scheduling: core affinity, thread criticality, and scheduling fairness. To address this problem, this paper introduces the first general purpose asymmetry-aware scheduler targeting multi-threaded multi-programmed workloads. It estimates the performance of each thread on each type of core and it identifies communication patterns and bottleneck threads. With this information, the scheduler makes coordinated core assignment and thread selection decisions that still provide each application its fair share of the processor's time. We evaluated our approach on GEM5 through four distinct *** configurations and multi-threaded multi-programmed workloads composed of PAR-SEC and SPLASH2 benchmarks. Compared against the Linux CFS scheduler and a state-of-the-art AMP-aware scheduler, we demonstrate performance gains of up to 25% and 5% to 15% on average depending on the hardware setup.

关键词： Multicore processing Program processors Linux Sensitivity Processor scheduling Message systems

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Deepframe: A Profile-driven Compiler for Spatial Hardware Accelerators 28

Deepframe: A Profile-driven Compiler for Spatial Hardware Ac...

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28th international conference on parallel architectures and Compilation Techniques (PACT)

作者： Guha, Apala Vedula, Naveen Shriraman, Arrvindh Simon Fraser Univ Sch Comp Sci Burnaby BC Canada

ISBN: (纸本)9781728136134

Tracing code paths to form extended basic blocks is useful in many areas, compiler optimizations [1], improving instruction cache behavior [2] and custom-hardware offloading [3]. Prior work has been plagued by small traces, limited either by the overheads of dynamic profiling, statically available information [4], or side-exit branches [5]. In this work, we rethink what code path sequences to fuse and construct long traces for offloading to spatial accelerators, while minimizing the occurrence of side exits which limit dynamic coverage. We introduce a novel technique that recasts learning a program's execution patterns as a natural-language-processing problem, CBOW (Continuous Bag of Words). We then use a deep learning network to learn the relationships among paths. During the compilation phase, the compiler uses a sequence miner to decide what paths are likely to occur. the learning network predicts a Deepframe online, which is an extended basic block comprising a multi-path sequence (each path itself is composed of multiple basic blocks). We demonstrate the efficacy of Deepframe on spatial hardware accelerators and find the following: i) Deepframe can construct up to 5x (max: 27x) longer offload regions compared to prior approaches. ii) Surprisingly far-flung ILP (instruction-level parallelism) and MLP (memory-level parallelism) can be mined from the frames statically (5.5x increase in ILP and 10.5x increase in MLP). iii) the frames offloaded to the spatial accelerator have minimal side exits (mis-speculation) and achieve sufficient dynamic coverage to improve overall application performance (up to 9x improvement). We will be releasing open-source our end-to-end compiler prototype based on LLVM.

关键词： Hardware parallel processing History Out of order Deep learning Optimization

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De(con)struction of the lazy-F loop: improving performance of Smith Waterman alignment 19

De(con)struction of the lazy-F loop: improving performance o...

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19th Annual IEEE international conference on Bioinformatics and Bioengineering (BIBE)

作者： Snytsar, Roman Microsoft Res & AI Redmond WA 98052 USA

ISBN: (纸本)9781728146171

Striped variation of the Smith-Waterman algorithm is known as extremely efficient and easily adaptable for the SIMD architectures. However, the potential for improvement has not been exhausted yet. the popular Lazy-F loop heuristic requires additional memory access operations, and the worst-case performance of the loop could be as bad as the nonvectorized version. We demonstrate the progression of the lazy-F loop transformations that improve the loop performance, and ultimately eliminate the loop completely. Our algorithm achieves the best asymptotic performance of all scan-based SW algorithms O(n/p+log(p)), and is very efficient in practice.

关键词： parallel processing Vectorization Bioinformatics Smith-Waterman

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Multimedia Forensics - An approach to detect and analyze Human faces in multimedia files 5

Multimedia Forensics - An approach to detect and analyze Hum...

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5th international conference on Image Information processing (ICIIP)

作者： Gowada, Raghavendra Pawar, Digambar Tetali, Satish Reddy Univ Hyderabad Sch CIS Hyderabad Telangana India

ISBN: (纸本)9781728108995

Manual Security is being replaced by video surveillance systems by the advent of multimedia forensics. Face detection is an important technique in multimedia forensics. Many proposed methods identify and localize the faces in an image or in an image sequence. To build fully automated systems that analyze the information contained in face images, robust and efficient face detection algorithms are required. Since, innumerable video data that is collected from video surveillance are to be automatically processed and get valuable information out of it, we need to scale the processing framework accordingly. In this paper, we propose face recognition system and minimize the overall processing time of large data set using parallel processing method. Given a video from a video surveillance, we need to convert it to frames, detect the human faces in these frames and recognize the face by comparing with a given face or comparing against database entries where criminal data is present. We use cascade classifier that takes a vector of features (decision variables) and results the probability that the vector belongs to the class. Using cascade classifier, we identify the faces from a given image and finally compare the faces with database entries.

关键词： Video surveillance Multimedia forensics Face detection Face recognition parallel processing Cascade classifier Decision variables Spark streaming YARN Mapreduce

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parallel SAT Simplification on GPU architectures 25th

Parallel SAT Simplification on GPU Architectures

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25th international conference on Tools and algorithms for the Construction and Analysis of Systems (TACAS) held as part of the 22nd European Joint conferences on theory and Practice of Software (ETAPS)

作者： Osama, Muhammad Wijs, Anton Eindhoven Univ Technol NL-5600 MB Eindhoven Netherlands

ISBN: (纸本)9783030174620;9783030174613

the growing scale of applications encoded to Boolean Satisfiability (SAT) problems imposes the need for accelerating SAT simplifications or preprocessing. parallel SAT preprocessing has been an open challenge for many years. therefore, we propose novel parallel algorithms for variable and subsumption elimination targeting Graphics processing Units (GPUs). Benchmarks show that the algorithms achieve an acceleration of 66x over a state-of-the-art SAT simplifier (SatELite). Regarding SAT solving, we have conducted a thorough evaluation, combining both our GPU algorithms and SatELite with MiniSat to solve the simplified problems. In addition, we have studied the impact of the algorithms on the solvability of problems with Lingeling. We conclude that our algorithms have a considerable impact on the solvability of SAT problems.

关键词： Satisfiability Variable elimination Subsumption elimination parallel SAT preprocessing GPU

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parallel latent dirichlet allocation using vector processors 21

Parallel latent dirichlet allocation using vector processors

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21st IEEE international conference on High Performance Computing and Communications, 17th IEEE international conference on Smart City and 5th IEEE international conference on Data Science and Systems, HPCC/SmartCity/DSS 2019

作者： Tian, Zhongyuan Yokoyama, Harumichi Araki, Takuya Hong Kong University of Science and Technology Hong Kong SAR Hong Kong Data Science Research Laboratories NEC Corporation Kawasaki Japan

ISBN: (纸本)9781728120584

Latent Dirichlet Allocation (LDA) is a widely used machine learning technique for topic modeling. the ever-growing size of training data and topic models has been attracting great attention to parallel LDA implementation. In this paper, we present VLDA, which accelerates LDA training by exploiting the data-level and the thread-level parallelism using vector processors. the priority-aware scheduling approach is proposed to address the high memory requirement and workload imbalance issues with existing works. Experimental results on various datasets demonstrate a 3.2x~12.9x speedup of VLDA over state-of-the-art parallel LDA methods based on an x86 architecture, which are PLDA and LightLDA. We also show that VLDA is capable of processing large-scale datasets with good scalability to multiple vector processors. © 2019 IEEE.

关键词： Vectors

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A Faster than Real-Time Implementation of Multi-exposure Image Fusion with Recursive Filter

A Faster than Real-Time Implementation of Multi-exposure Ima...

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IEEE international conference on Signal and Image processing (ICSIP)

作者： Shijie Li Yuan Yuan Qiong Li Xuchao Xie College of Computer National University of Defense Technology Changsha China

ISBN: (数字)9781728168968

ISBN: (纸本)9781728168975

this paper proposes a faster than real-time GPU implementation of multi-exposure image fusion with a recursive filter. the algorithm transfers the images from RGB space to YUV space first, then weight fuses them in Y, U, V channels separately with recursive filters, at last transfers the combined image to RGB space again and get the final output fusion image. We further propose novel task-level parallelism, parallel dataflow reunion and parallel recursive filter techniques to accelerate the image fusion algorithm on the GPU platform. In our experiment, we obtain 15-20 times speedup compared to the CPU version and up to 100 fps in a 600*600*6 multi-exposure sequence image fusion case. Experimental results demonstrate the superiority of our proposed method in terms of high efficiency and high availability.

关键词： Graphics processing units Filtering algorithms parallel processing Information filters Real-time systems Task analysis Image fusion

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Porting CUDA-Based Molecular Dynamics algorithms to AMD ROCm Platform Using HIP Framework: Performance Analysis 5th

Porting CUDA-Based Molecular Dynamics Algorithms to AMD ROCm...

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5th Russian Supercomputing Days conference (RuSCDays)

作者： Kuznetsov, Evgeny Stegailov, Vladimir Natl Res Univ Higher Sch Econ Moscow Russia Joint Inst High Temp RAS Moscow Russia Moscow Inst Phys & Technol Dolgoprudnyi Russia

ISBN: (纸本)9783030365929;9783030365912

the use of graphics processing units (GPU) in computer data processing tasks has long ceased to be an unusual event. However, now GPU computing is nearly synonymous with CUDA, a proprietary framework for developing applications for Nvidia's GPU devices. It provides comprehensive documentation and excellent development tools. Meanwhile, the main competitor of Nvidia in the market for the production of GPU devices, the AMD company is developing its own Radeon Open Compute (ROCm) platform that features an application programming interface compatible with CUDA. the primary objective of this work is to investigate whether ROCm provides a worthy alternative to CUDA in the field of GPU computing. the work has two sub-objectives: the description of the programmers experience investigation during porting classical molecular dynamics algorithms from CUDA to ROCm platform and performance benchmarking of initial and resulting programs on GPU devices with modern architectures (Pascal, Vega10, Vega20).

关键词： GPU computing parallel computing CUDA ROCm Molecular dynamics

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Generic methodology for the design of parallel algorithms based on pattern languages 9th

Generic methodology for the design of parallel algorithms ba...

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9th international conference on Supercomputing, ISUM 2018

作者： Serrano-Rubio, A. Alejandra Meneses-Viveros, Amilcar Morales-Luna, Guillermo B. Paredes-López, Mireya Computer Science Department Cinvestav-IPN Mexico City Mexico Mathematics Department Cinvestav-IPN Mexico City Mexico

ISBN: (纸本)9783030104474

A parallel system to solve complex computational problems involve multiple instruction, simultaneous flows, communication structures, synchronisation and competition conditions between processes, as well as mapping and balance of workload in each processing unit. the algorithm design and the facilities of processing units will affect the cost-performance ratio of any algorithm. We propose a generic methodology to capture the main characteristics of parallel algorithm design methodologies, and to add the experience of expert programmers through pattern languages. Robust design considering the relations between architectures and programs is a crucial item to implement high-quality parallel algorithms. We aim for a methodology to exploit algorithmic concurrencies and to establish optimal process allocation into processing units, exploring the lowest implementation details. Some basic examples are described, such as the k-means algorithm, to illustrate and to show the effectiveness of our methodology. Our proposal identifies essential design patterns to find models of Data Mining algorithms with string self-adaptive mechanisms for homogeneous and heterogeneous parallel architectures. © Springer Nature Switzerland AG 2019.

关键词： parallel algorithms

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Stochastic Floyd-Steinberg dithering on GPU: image quality and processing time improved 5

Stochastic Floyd-Steinberg dithering on GPU: image quality a...

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5th international conference on Image Information processing (ICIIP)

作者： Franchini, Giorgia Cavicchioli, Roberto Hu, Jia Cheng Univ Modena & Reggio Emilia Modena Italy

ISBN: (纸本)9781728108995

Error diffusion dithering is a technique that is used to represent a grey-scale image in a format usable by a printer. At every step, an algorithm converts the grey-scale value of a pixel to a new value within the allowed ones, generating a conversion error. To achieve the effect of continuous-tone illusion, the error is distributed to the neighboring pixels. Among the existent algorithms, the most commonly used is Floyd-Steinberg. However, this algorithm suffers two issues: artifacts and slowness. Regarding artifacts, those are textures that can appear after the image elaboration, making it visually different from the original one. In order to avoid this effect, we will use a stochastic version of Floyd-Steinberg algorithm. To evaluate the results, we will apply the Weighted Signal to Noise Ratio (WSNR), a visualbased model to account for perceptivity of dithered textures. this filter has a low-pass characteristic and, in particular, it uses a Contrast Sensitivity Function to evaluate the similarity between the original image and the final image. Our claim is that the new stochastic algorithm is better suited for both the WSNR measure and the visual analysis. Secondly, we will face slowness: we will describe a parallel version of Floyd-Steinberg algorithm that will exploit GPU (Graphics processing Unit), drastically reducing the spent time. Specifically, we noticed that the serial version computational time increases quadratically with the input size, while the parallel version one increases linearly. Both the image quality and the computational performance of the parallel algorithm are evaluated on several large-scale images.

关键词： Dithering Half-tone parallel Computing GPGPU Floyd and Steinberg Stochastic Dithering

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