Withthe approaching of Internet of things (IoT), non-orthogonal multiple access technology was proposed in the fifth generation (5G) mobile communication system to improve the system capacity and meet the needs of ma...
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ISBN:
(纸本)9783030191566;9783030191559
Withthe approaching of Internet of things (IoT), non-orthogonal multiple access technology was proposed in the fifth generation (5G) mobile communication system to improve the system capacity and meet the needs of massive connectivity. Multi-User Shared Access (MUSA) technology is a non-orthogonal multiple access technology of code domain. MUSA receiver adopts multi-user detection algorithm, mainly using interference cancellation based on linear detection. this paper proposes the successive-parallel interference cancellation multi-user detection algorithm for the shortage of typical multi-user detection algorithms of MUSA uplink receiver, and gives the comparison results of the proposed algorithm and typical algorithms. Compared withparallel interference cancellation detection algorithm, the proposed algorithm improves the detection performance greatly. Compared with successive interference cancellation detection algorithm, the proposed algorithm reduces the processing time delay effectively.
the mining of time series data plays an important role in modern information retrieval and analysis systems. In particular, the identification of similarities within and across time series has garnered significant att...
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Deep learning has achieved outstanding performance in the field of image processing. Inspired by the inception model, we propose a deep neural network convolving simultaneously at two different scales. We utilize the ...
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Signal, image and Synthetic Aperture Radar imagery algorithms in recent time are used in a daily routine. Due to huge data and complexity, their processing is almost impossible in a real time. Often image processing a...
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ISBN:
(纸本)9781538669792
Signal, image and Synthetic Aperture Radar imagery algorithms in recent time are used in a daily routine. Due to huge data and complexity, their processing is almost impossible in a real time. Often image processingalgorithms are inherently parallel in nature, so they fit nicely into parallelarchitectures multicore Central processing Unit (CPU) and Graphics processing Unit GPUs. In this paper image processingalgorithms were evaluated, which are capable to execute in parallel manner on several platforms CPU and GPU. All algorithms were tested in TensorFlow, which is a novel framework for deep learning, but also for image processing. Relative speedups compared to CPU were given for all algorithms. TensorFlow GPU implementation can outperform multi-core CPUs for tested algorithms, obtained speedups range from 3.6 to 15 times.
the problem of limited video memory when organizing parallel computing using the FDTD method on a non-professional graphics processor was considered in this article. As a solution, a block algorithm of the FDTD method...
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the proceedings contain 251 papers. the topics discussed include: investigation of the multiple comparisons problem in the analysis of the wave train electrical activity of muscles in Parkinson's disease patients;...
the proceedings contain 251 papers. the topics discussed include: investigation of the multiple comparisons problem in the analysis of the wave train electrical activity of muscles in Parkinson's disease patients;addressing system and routing without tables in new generation networks;CUDA parallel programming technology application for analysis of big biomedical data based on computation of effectiveness features;autoregressive models of random fields on the circle;detection and identification of objects on multispectral satellite images;creation of zinc oxide based nanomaterials by repetitively pulsed laser treatment;long-haul few mode fiber optic link with differential mode delay compensation;dynamics of the electrochemical reaction behavior under the influence of random perturbations;and decomposition of enzyme kinetics equations.
Withthe rapid development of Internet and the continuous rise of network users, the network traffic in various regions is increasing rapidly. In the face of a large number of high speed and high throughput of the net...
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ISBN:
(纸本)9781538694039
Withthe rapid development of Internet and the continuous rise of network users, the network traffic in various regions is increasing rapidly. In the face of a large number of high speed and high throughput of the network environment, traditional packet capture methods and processing capabilities cannot reach the corresponding speed, which results in severe packet loss. this paper focuses on a high-performance packet acquisition and distribution method to break through the performance bottleneck of universal servers and network cards. this paper studies a packet capture method based on DPDK platform, and uses the processing of hash value in RSS to improve the efficiency of data packet distribution, which realizes the process from performance acquisition to efficiently multi-core parallelprocessing. this method can effectively reduce packet loss and improve the data packet processing rate. It can also reduce resource waste and network overhead for traffic capture and distribution. Preliminary experiments show that DPDK-based traffic processing has obvious advantages over PF-RING and Netmap in data processing speed.
Most of the existing convolutional neural networks (CNNs) are based on PC software, which cannot meet the real-time, low power and miniaturization requirements of the systems. In this paper, a CNN accelerator with fle...
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ISBN:
(数字)9781728160429
ISBN:
(纸本)9781728160436
Most of the existing convolutional neural networks (CNNs) are based on PC software, which cannot meet the real-time, low power and miniaturization requirements of the systems. In this paper, a CNN accelerator with flexible structure based on Field-Programmable Gate Array (FPGA) is proposed to achieve recognition of MNIST handwritten numeric characters. the system adopts deep pipeline processing and optimizes inter-layer and intra-layer parallelism from two levels of coarse and fine granularity. In view of the similarity of convolution structure, this design adopts structured circuit, which can easily expand the number of layers and neurons. the classification throughput and inter-layer data throughput capability can be improved by rationally organizing the internal memory resources of the FPGA. Compared withthe general CPU, it achieves 3 times acceleration at 50MHz frequency, while the power consumption is only 2% of the CPU. Finally performance and power consumption are compared with other accelerators by VGG16.
Recognition on images not only of shapes, but also of metadata is becoming increasingly popular among researchers in the field of convolutional neural networks and deep learning. this article provides an analytical ov...
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In the work there is a modernization of the parallel algorithm for the radar images formation of 3D models withthe synthesis of the antenna aperture. In the formation of the scene description, the various structures ...
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