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An efficient skew-insensitive algorithm for join processing on grid architectures

An efficient skew-insensitive algorithm for join processing ...

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5th ACM SIGPLAN Workshop on High-Level parallel Programming and Applications, HLPP 2011

作者： Al Hajj Hassan, Mohamad Bamha, Mostafa Loulergue, Frédéric EXQIM Paris France LIFO University of Orléans Orléans France

ISBN: (纸本)9781450308625

Scientific experiments in many domains generate a huge amount of data whose size is in the range of hundreds of megabytes to petabytes. these data are stored on geographically distributed and heterogeneous resources. Researchers who need to analyze and have a fast access to such data are also located all over the globe. Queries executed by these researchers may require the transfer of huge amount of data over the wide area network in a reasonable time. Due to these emerging needs, the grid infrastructure was born. In this paper, we are interested in treating join queries on the grid. We propose a new parallel algorithm allowing to reduce communication and disk Input/Output costs to minimum. this algorithm guarantees a balanced load among all processing nodes in each cluster and then among all the clusters of a grid architecture. © 2011 ACM.

关键词： Grid computing

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On the resilience of [distributed] eas against cheaters in Global computing platforms

On the resilience of [distributed] eas against cheaters in G...

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25th IEEE international parallel and distributed Processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Varrette, Sebastien Tantar, Emilia Bouvry, Pascal Research Unit University of Luxembourg 16 rue Richard Coudenhove Kalergi L-1359 Luxembourg

ISBN: (纸本)9780769543857

Global computing (GC) platforms such as BOINC [1] are nowadays considered as the most powerful distributed computing systems worldwide. Based on volunteer computing and various forms of incentives, such architecture also attract cheaters who seek to obtain rewards with little or no contribution to the system. Cheating can be modelized as alteration of output values produced by some or all tasks of the program beeing executed. In complement of generic approaches typically based on task duplication, this article focus on Algorithm-Based Fault Tolerance (ABFT) [2] technics where the fault tolerance scheme is tailored to the algorithm performed to make it resilient to a limited number of faults i.e. falsified results produced by cheaters in this case. More precisely, the ABFT aspects of distributed Evolutionary Algorithm (dEA) against cheaters in GC environment is studied. Our main contribution consists in the formal analysis of the impact of cheating faults on this context, together with a theoretical proof of convergence towards valid solutions despite the presence of malicious acts. Whereas the resilience of dEA against a simpler model of fault (i.e. crash faults) has been observed in the literature [3], [4], [5], [6], this study is the first to propose a theoretical proof of this behaviour, additionally against a more complex kind of fault. By the variety of problems addressed by EAs, this study will hopefully promote their usage in the future developments around GC platforms. © 2011 IEEE.

关键词： Fault tolerance

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computing the phylogenetic likelihood function out-of-core

Computing the phylogenetic likelihood function out-of-core

引用

25th IEEE international parallel and distributed Processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Izquierdo-Carrasco, Fernando Stamatakis, Alexandros Exelixis Lab. Scientific Computing Group Heidelberg Institute for Theoretical Studies D-69118 Heidelberg Germany

ISBN: (纸本)9780769543857

the computation of the phylogenetic likelihood function for reconstructing evolutionary trees from molecular sequence data is both memory- and compute-intensive. Based on our experience with the user community of RAxML, memory-shortages (as opposed to CPU time limitations) are currently the prevalent problem regarding resource availability, that is, lack of memory hinders large-scale biological analyses. To this end, we study the performance of an out-of-core execution of the phylogenetic likelihood function by means of a proof-of-concept implementation in RAxML. We find that RAM miss rates are below 10%, even if only 5% of the required data structures are held in RAM. Moreover, we show that our proof-of-concept implementation runs more than 5 times faster than the respective standard implementation when paging is used. the concepts presented here can be applied to all programs that rely on the phylogenetic likelihood function and can contribute significantly to enabling the computation of whole-genome phylogenies. © 2011 IEEE.

关键词： Phylogenetic

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Flexible development of dense linear algebra algorithms on massively parallel architectures with DPLASMA

Flexible development of dense linear algebra algorithms on m...

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25th IEEE international parallel and distributed Processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Bosilca, George Bouteiller, Aurelien Danalis, Anthony Faverge, Mathieu Haidar, Azzam Herault, thomas Kurzak, Jakub Langou, Julien Lemarinier, Pierre Ltaief, Hatem Luszczek, Piotr YarKhan, Asim Dongarra, Jack University of Tennessee Innovative Computing Laboratory United States Oak Ridge National Laboratory United States University Paris-XI France University of Colorado Denver United States

ISBN: (纸本)9780769543857

We present a method for developing dense linear algebra algorithms that seamlessly scales to thousands of cores. It can be done with our project called DPLASMA (distributed PLASMA) that uses a novel generic distributed Direct Acyclic Graph Engine (DAGuE). the engine has been designed for high performance computing and thus it enables scaling of tile algorithms, originating in PLASMA, on large distributed memory systems. the underlying DAGuE framework has many appealing features when considering distributed-memory platforms with heterogeneous multicore nodes: DAG representation that is independent of the problem-size, automatic extraction of the communication from the dependencies, overlapping of communication and computation, task prioritization, and architecture-aware scheduling and management of tasks. the originality of this engine lies in its capacity to translate a sequential code with nested-loops into a concise and synthetic format which can then be interpreted and executed in a distributed environment. We present three common dense linear algebra algorithms from PLASMA (parallel Linear Algebra for Scalable Multi-core Architectures), namely: Cholesky, LU, and QR factorizations, to investigate their data driven expression and execution in a distributed system. We demonstrate through experimental results on the Cray XT5 Kraken system that our DAG-based approach has the potential to achieve sizable fraction of peak performance which is characteristic of the state-of-the-art distributed numerical software on current and emerging architectures. © 2011 IEEE.

关键词： Linear systems

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iMapReduce: A distributed computing framework for iterative computation

iMapReduce: A distributed computing framework for iterative ...

引用

25th IEEE international parallel and distributed Processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Zhang, Yanfeng Gao, Qinxin Gao, Lixin Wang, Cuirong Northeastern University China University of Massachusetts Amherst United States

ISBN: (纸本)9780769543857

Relational data are pervasive in many applications such as data mining or social network analysis. these relational data are typically massive containing at least millions or hundreds of millions of relations. this poses demand for the design of distributed computing frameworks for processing these data on a large cluster. MapReduce is an example of such a framework. However, many relational data based applications typically require parsing the relational data iteratively and need to operate on these data through many iterations. MapReduce lacks built-in support for the iterative process. this paper presents iMapReduce, a framework that supports iterative processing. iMapReduce allows users to specify the iterative operations with map and reduce functions, while supporting the iterative processing automatically without the need of users' involvement. More importantly, iMapReduce significantly improves the performance of iterative algorithms by (1) reducing the overhead of creating a new task in every iteration, (2) eliminating the shuffling of the static data in the shuffle stage of MapReduce, and (3) allowing asynchronous execution of each iteration, i.e., an iteration can start before all tasks of a previous iteration have finished. We implement iMapReduce based on Apache Hadoop, and show that iMapReduce can achieve a factor of 1.2 to 5 speedup over those implemented on MapReduce for well-known iterative algorithms. © 2011 IEEE.

关键词： MapReduce

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Reservoir: An alternative load balancing technique for parallel ray tracing

Reservoir: An alternative load balancing technique for paral...

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Asia Modelling symposium 2011: 5th Asia international Conference on Mathematical Modelling and Computer Simulation, AMS 2011

作者： Seriña, Francis Jospeh Madamba, Joy Alinda Reyes Computer Science and Technology Unit Philippine Science High School Main Campus Quezon City Philippines Electrical and Electronics Engineering Institute University of the Philippines Diliman Quezon City Philippines

ISBN: (纸本)9780769544144

Emulating the real world is the next frontier in computer applications. However, a computing machine cannot accurately imitate reality in a decent amount of time or even apart of it single-handedly. the solution: parallelize computers to solve a specific problem. One such aspect of reality that can be replicated is light. Ray tracing is a rendering technique that accurately depicts light at the cost of time. However, simply parallelizing it is not enough to reduce its running time. there is also the issue of having multiple heterogeneous computers that would divide the task unevenly. thus, a load balancing technique must be performed to further increase efficiency and make ray tracing suitable for mainstream purposes. the goal of this project is to parallelize ray tracing and compare different implementations to efficiently distribute the load and render images in the smallest possible amount of time given in a network of machines. this project proposed an alternative load balancing technique, Reservoir, to address the issue of having heterogeneous computers within the network and minimizes the communication overhead implicitly imposed by parallel applications. © 2011 IEEE.

关键词： Ray tracing

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Just-in-time instruction set extension - Feasibility and limitations for an FPGA-based reconfigurable ASIP architecture

Just-in-time instruction set extension - Feasibility and lim...

引用

25th IEEE international parallel and distributed Processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Grad, Mariusz Plessl, Christian Paderborn Center for Parallel Computing University of Paderborn Germany

ISBN: (纸本)9780769543857

In this paper, we study the feasibility of moving the instruction set customization process for reconfigurable ASIPs to runtime under the precondition that current FPGA devices and tools are used. To this end we propose a tool flow for just-in-time ASIP customization which identifies suitable custom instructions to accelerate arbitrary binary applications that execute on a virtual machine. the tool flow targets our previously introduced Woolcano reconfigurable ASIP architecture, which augments the PowerPC core in a Xilinx Virtex 4FX CPU with runtime reconfigurable instructions. We evaluate the tool flow with a comprehensive set of applications from the SPEC2006, SPEC2000, MiBench, and SciMark2 benchmark suites and compare the speedups that can be achieved with the overhead of the complete ASIP specialization process. We show that an average speedup of 5× can be achieved for benchmarks from the embedded computing domain. the overhead of custom instruction identification and hardware generation for these benchmarks is less than 50 minutes and will be compensated if the applications execute for more than 2 hours. Finally, we evaluate caching strategies to reduce the time until this break even point is reached. © 2011 IEEE.

关键词： Field programmable gate arrays (FPGA)

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An efficient search algorithm without memory for peer-to-peer cloud computing networks

An efficient search algorithm without memory for peer-to-pee...

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25th IEEE international parallel and distributed Processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Xiong, Naixue Liu, Yuhua Wu, Shishun Yang, Laurence T. Xu, Kaihua School of Information Technology Jiangxi University of Finance and Economics Nanchang 330013 China Department of Computer Science Huazhong Normal University Wuhan 430079 China Department of Computer Science St. Francis Xavier University Antigonish NS B2G 2W5 Canada College of Physical Science and Technology Huazhong Normal University Wuhan 430079 China

ISBN: (纸本)9780769543857

In recent years, as the rapid development of the technology about Peer-to-Peer (P2P) networks and the cloud computing technology, various applications of P2P technology become very widespread in most cloud computing distributed network applications. P2P cloud computing networks are unstructured and are an important component to implement next generation internet. How to quickly and efficiently search the resources in P2P networks has become one of the most critical issues, and it is one of the greatest concerns to users. this paper* first describes the basic flooding P2P network search method, which is from the analyzing the pros and cons of several new search methods. After that, a cache-based search algorithm is proposed: When a node of the remaining load capacity is high, it will become the center node and form a joint topology area with the nearby nodes together, then the center node and ordinary nodes also need to store the index cache. At the local region the overheating resources will be copied to the local (that is, the contents cache). the simulation results show that the algorithm can effectively improve the hit rates of resources searching, and reduce the query delay in cloud computing networks. © 2011 IEEE.

关键词： Cloud computing

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Optimizing a Semantic Comparator using CUDA-enabled Graphics Hardware

Optimizing a Semantic Comparator using CUDA-enabled Graphics...

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5th Annual IEEE international Conference on Semantic computing (ICSC)

作者： Tripathy, Aalap Mohan, Suneil Mahapatra, Rabi Texas A&M Univ Dept Comp Sci & Engn College Stn TX 77843 USA

ISBN: (纸本)9780769544922

Emerging semantic search techniques require fast comparison of large "concept trees". this paper addresses the challenges involved in fast computation of similarity between two large concept trees using a CUDA-enabled GPGPU co-processor. We propose efficient techniques for the same using fast hash computations, membership tests using Bloom Filters and parallel reduction. We show how a CUDA-enabled mass produced GPU can form the core of a semantic comparator for better semantic search. We experiment run-time, power and energy consumed for similarity computation on two platforms: (1) traditional sever class Intel x86 processor (2) CUDA enabled graphics hardware. Results show 4x speedup with 78% overall energy reduction over sequential processing approaches. Our design can significantly reduce the number of servers required in a distributed search engine data center and can bring an order of magnitude reduction in energy consumption, operational costs and floor area.

关键词： Semantic Comparator GPGPU Dot product Computation semantic-router core Bloom filter green computing

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ECMLS'11 - Proceedings of the 2nd international Workshop on Emerging Computational Methods for the Life Sciences

ECMLS'11 - Proceedings of the 2nd International Workshop on ...

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2nd international Workshop on Emerging Computational Methods for the Life Sciences, ECMLS'11, Co-located with 20th international ACM symposium on High-Performance parallel and distributed computing, HPDC 2011

ISBN: (纸本)9781450307024

the proceedings contain 5 papers. the topics discussed include: a parallel random forest classifier for R;adapting bioinformatics applications for heterogeneous systems: a case study;a hierarchical framework for cross-domain MapReduce execution;characterizing deep sequencing analytics using BFAST: towards a scalable distributed architecture for next-generation sequencing data;and high-throughput virtual molecular docking: hadoop implementation of autodock4 on a private cloud.

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