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检索条件"任意字段=5th Southern Conference on Programmable Logic"

共 390 条记录，以下是41-50 订阅

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Power performance with gated clocks of a pipelined Cordic Core 5

Power performance with gated clocks of a pipelined Cordic Co...

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5th International conference on ASIC

作者： Cadenas, O Megson, G Univ Reading Sch Syst Engn Reading RG6 6AY Berks England

ISBN: (纸本)078037889X

this paper presents the evaluation in power consumption of gated clocks pipelined circuits with different register configurations in Virtex-based FPGA devices. Power impact of a gated clock circuitry aimed at reducing flip-flops output rate at the bit level is studied. Power performance is also given for pipeline stages based on the implementation of a double edge-triggered flip-flop. Using a pipelined Cordic Core circuit as an example, this study did not find evidence in power benefits either when gated clock at the bit-level or double-edge triggered flip-flops used when synthesized with FPGA logic resources.

关键词： field programmable gate arrays flip-flops pipeline arithmetic power consumption

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Significant Papers from the First 25 Years of the FPL conference 25

Significant Papers from the First 25 Years of the FPL Confer...

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25th International conference on Field programmable logic and Applications

作者： Leong, Philip H. W. Amano, Hideharu Anderson, Jason Bertels, Koen Cardoso, Joao M. P. Diessel, Oliver Gogniat, Guy Hutton, Mike Lee, JunKyu Luk, Wayne Lysaght, Patrick Platzner, Marco Prasanna, Viktor K. Rissa, Tero Silvano, Cristina So, Hayden Wang, Yu Univ Sydney Sydney NSW 2006 Australia Keio Univ Tokyo 108 Japan Univ Toronto Toronto ON M5S 1A1 Canada Delft Univ Technol NL-2600 AA Delft Netherlands Univ Porto P-4100 Oporto Portugal Univ NSW Kensington NSW Australia Univ South Brittany Lorient France Altera Corp San Jose CA USA Imperial Coll London London England Xilinx Res Labs San Jose CA USA Univ Paderborn Paderborn Germany Univ Southern Calif Los Angeles CA USA Nokia Espoo Finland Politecn Milan Milan Italy Univ Hong Kong Hong Kong Hong Kong Peoples R China Tsinghua Univ Beijing Peoples R China

the list of significant papers from the first 25 years of the Field-programmable logic and Applications conference (FPL) is presented in this paper. these 27 papers represent those which have most strongly influenced ...

ISBN: (纸本)9781467381239

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Review of NoC-Based FPGAs Architectures 5

Review of NoC-Based FPGAs Architectures

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5th International conference on Energy Aware Computing Systems & Applications (ICEAC)

作者： Salaheldin, Alaa Abdallah, Karim Gamal, Noha Mostafa, Hassan Cairo Univ Elect & Commun Engn Dept Giza 12613 Egypt AUC Ctr Nanoelect & Devices New Cairo 11835 Egypt Zewail City Sci & Technol New Cairo 11835 Egypt

ISBN: (纸本)9781479917723

Nowadays, FPGAs serve as Fields programmable Systems on Chip (FPSoC) and are widely used to implement computationally intensive world applications. As the number of components in FPSoCs increases, the interconnect schemes based on Network on Chip (NoC) approach are increasingly used to overcome the problems of traditional bus based and point-to-point interconnect scheme. In this paper, we review several designs based on their contributions, architectures, implementations and future works. We also made our comparison between three of these routes to analyze the effect of varying the number of Virtual Channels (VCs), flit data width and buffer depth on the operating frequency, logic Look-Up Tables (LUTs) and registers to help choosing the appropriate NoC based on system requirements.

关键词： Field programmable gate arrays Network topology Ports (Computers) Registers Routing Table lookup Field programmable gate arrays Table lookup Registers Network topology Network routing ARCHITECTURE system requirements

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Realization of Parallel Distributed Temperature Sensor Network Based on Field programmable Gate Array 5

Realization of Parallel Distributed Temperature Sensor Netwo...

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5th International conference on Electronic Engineering and Informatics, EEI 2023

作者： You, Binyu Feng, Shiwei Yao, Zhanwu Lv, Xianliang Wang, Yaning Zhou, Yinqi Beijing University of Technology Chaoyang District Beijing China China Electronics Standardization Institute China

ISBN: (纸本)9798350327076

the digital temperature sensor based on the logic resources of the FPGA can monitor the global temperature of the Field programmable Array (FPGA) in real time. this paper implements this temperature sensing network on a Xilinx XC7Z020 FPGA in 28 nm process, which uses a logic consumption of 384, occupying only 0.7% of the total Look-Up-Tables (LUTs). A single sampling time is 60 μs, which ensures data reliability and stability. the total on-chip power consumption of the system is approximately 5 W, and the realization of the distributed temperature measurement network is realized under the condition of small power consumption and resource occupation. © 2023 IEEE.

关键词： Electric power utilization

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Interactive Design Modules for logic Design Course 5

Interactive Design Modules for Logic Design Course

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5th International conference on e-Learning (econf)

作者： AbdElrazig Suliman, A. E. AL Neelain Univ Fac Comp Sci & Informat Technol Dept Informat Technol Bisha Saudi Arabia

ISBN: (纸本)9781467394314

the study is mainly intended to solve the problem of Bisha University traditional Combinational logic Circuits labs in design logic course. this course is one of the prescribed courses in computer science department-semester five. In A set of programmable virtual instruments in the Combinational logic Circuits (VIs) have been designed and tested Using LabVIEW environment. the aim of this study is to improve the programmability of Combinational logic Circuits Course. this paper has discussed designed and developed interactive graphical user interface (GUI) modules (VIs) for studying (a) Half Adder, (b) Full Adder, (c) Half Subtractor Circuits, (d) FullSubtractor Circuit, (e) Binary Decoder, (f) Binary Encoder, (g) Multiplexers and (h) DeMultiplexers. It will be possible to have unlimited number of programmable objects, and to run more than one program at the same time. this problem can be effectively addressed by improving the student's conceptual understanding and comprehension of the topics through interactive learning and teaching with virtual instruments (VI) software package like LabVIEW.

关键词： Virtual Combinational logic Half Adder VI Full Adder VI Binary DecoderVI Binary Encoder VI Multiplexers VI DeMultiplexers VI Half Subtractor Circuits VI Full-Subtractor Circuit VI LabVIEW Virtual Instrument

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Control system design of adjust speed elevator based on programmable logical indecator

Control system design of adjust speed elevator based on prog...

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International conference on Computer Science and Education

作者： Wei, Siwei Wang, Ruoxi School of Automotive Engineering Wuhan University of Technology Wuhan 430070 China Department of Computer Science HuaZhong Normal University Wuhan 430079 China

ISBN: (纸本)9781424460052

the control method and a stable operation of high-rise building elevators are currently hot spots of the programmable logic controller in elevator control research. this paper focused on five-story elevators, designs and implements a speed-regulation elevator control system using combination of OMRON CJ1M programmable logic controller and Yasukawa Inverter. Particularly, the elevator's function, operation, design ideas and programming are deeply discussed. the entire system includes external hardware design and control programming design. this system achieves a well control of speed-regulation of the elevator. ©2010 IEEE.

关键词： programmable logic controllers

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Exact mapping of rewritten linear functions to configurable logic 5

Exact mapping of rewritten linear functions to configurable ...

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5th International Workshop on FPGAs for Software Programmers, FSP 2018, co-located with International conference on Field programmable logic and Applications, FPL 2018

作者： Greene, Jonathan W. Microsemi San JoseCA United States

ISBN: (纸本)9783800747238

We describe a method of mapping linear arithmetic functions to a targeted network of multipliers, adders, registers, muxes, and ROMs holding coefficients. the network may be fairly specific, or made more configurable by varying the primitives' control signals and adding routing muxes. Examples of possible functions include FIR and IIR filters, convolution, and FFTs. the method implicitly considers rewriting the function, such as by the associative and distributive properties of arithmetic, or methods such as Winograd filtering that benefit from combined computation of successive outputs. the method is intended to be used to implement IP for existing FPGA math blocks, evaluate new FPGA math block architectures, or potentially as a subroutine in high-level synthesis. Illustrative architectures using the PolarFireTM FPGA math block are presented, including: a symmetric FIR in which the math block operates at twice the speed of the fabric;a general (asymmetric) FIR that produces one sample per clock cycle with fewer multipliers than taps;and a folded symmetric FIR using fewer memory blocks than multipliers. the method is related to modulo scheduling and relies on a SAT or ILP solver. © VDE VERLAG GMBH ∙ Berlin ∙ Offenbach

关键词： Field programmable gate arrays (FPGA)

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A NARROWBAND PLC MODEM DESIGN PROJECT FOR AN INTERNATIONAL DSP COURSE

A NARROWBAND PLC MODEM DESIGN PROJECT FOR AN INTERNATIONAL D...

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5th European DSP Education and Research conference (EDERC)

作者： Roppel, Carsten Univ Appl Sci Schmalkalden Fac Elect Engn D-98564 Schmalkalden Germany

ISBN: (纸本)9781467345972;9781467345958

We describe the design and implementation of a narrowband power line communications (PLC) modem. the modem uses frequency shift keying (FSK) and is implemented on a C6000 DSP. the use of FSK and the selected receiver architecture allows for a simple and efficient implementation. the project is used in an international DSP course to introduce students to basic signal processing algorithms.

关键词： Modems frequency shift keying Desmoplakin Gene Digital signal processing Narrowband programmable logic controllers FREQUENCY SHIFT Students International(headers) Signal processing algorithms

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SAVI-IoT: A Self-Managing Containerized IoT Platform 5

SAVI-IoT: A Self-Managing Containerized IoT Platform

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IEEE 5th International conference on Future Internet of things and Cloud (FiCloud)

作者： Khazaei, Hamzeh Bannazadeh, Hadi Leon-Garcia, Alberto Univ Toronto Dept Elect & Comp Engn Toronto ON Canada

ISBN: (纸本)9781538620748

Internet of things (IoT) as a service is the ultimate goal of employing cloud computing paradigm for initiating IoT application scenarios. Due to the nature of IoT ecosystems, an IoT application should be distributed, programmable and autonomic;also, it requires to support heterogeneity, security and privacy by following design patterns involved in creating IoT systems. A multi-layer cloud architecture comprising of a high-capacity core center that is connected, through high speed links, to geographically distributed smart edges seem appropriate for highly distributed and heterogeneous IoT applications. Building upon our previous initiatives and inspired by the Infrastructure as Code (IoC) paradigm, in this paper, we propose and evaluate a hierarchical, programmable and autonomic IoT platform based on the microservice models. Our platform supports big data, local/edge data processing, high level of programmability and runtime autonomic management. the autonomic management system ensures the service availability, quality of service and optimized resource utilization in the whole IoT application components autonomously. the primary results affirm a promising future of our platform toward realization of IoT as a service.

关键词： Cloud computing Containers Virtualization Sparks Big Data logic gates Security

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Embedded systems design using FPGA

Embedded systems design using FPGA

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19th International conference on VLSI Design held jointly with the 5th International conference on Embedded System Design

作者： Patel, P Xilinx Inc San Jose CA 95124 USA

ISBN: (纸本)0769525024

Summary form only for tutorial. Embedded systems design is a hot application field which merges logic design and processor-based hardware development in a single or few chips solution. Various technologies have been used in the development of embedded systems; microcontroller, DSP processor, ASIC, and now FPGA. Field programmable gate arrays (FPGA) from Xilinx started as glue logic usage stitching functions together. With the introduction of Virtex-II Pro, Xilinx entered embedded processing area. In this tutorial, we show how Xilinx FPGAs can be used in embedded applications. the strengths of Xilinx FPGAs and the supporting development tools are described. A demonstration is provided to show the ease of design and development of a complete system using Xilinx embedded development kit (EDK) software.

关键词： logic design

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