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检索条件"任意字段=6th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

共 379 条记录，以下是111-120 订阅

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POSTER: A parallel Branch-and-Bound Algorithm with History-Based Domination 27

POSTER: A Parallel Branch-and-Bound Algorithm with History-B...

引用

27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Gonggiatgul, Taspon Shobaki, Ghassan Muyan-Ozcelik, Pinar Calif State Univ Sacramento CA USA

ISBN: (纸本)9781450392044

In this paper, we describe a parallel Branch-and-Bound (B&B) algorithm with a history-based domination technique, and we apply it to the Sequential Ordering Problem (SOP). To the best of our knowledge, the proposed algorithm is the first parallel B&B algorithm that includes a history-based domination technique and is the first parallel B&B algorithm for solving the SOP using a pure B&B approach. the proposed algorithm takes a pool-based approach and employs a collection of novel techniques that we have developed to achieve effective parallel exploration of the solution space, including parallel history domination, history table memory management, and a thread restart technique. the proposed algorithm was experimentally evaluated using the SOPLIB and TSPLIB benchmarks. the results show that using ten threads with a time limit of one hour on the medium-difficulty instances, the proposed algorithm gives a geometric-mean speedup of 19.9 on SOPLIB and 10.23 on TSPLIB, with super-linear speedups up to 65x seen on 17 instances.

关键词： parallel branch-and-bound sequential ordering problem combinatorial optimization NP-complete problems

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POSTER: Towards OmpSs-2 and OpenACC Interoperation 27

POSTER: Towards OmpSs-2 and OpenACC Interoperation

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27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Korakitis, Orestis De Gonzalo, Simon Garcia Guidotti, Nicolas Barreto, Joao Pedro Monteiro, Jose C. Pena, Antonio J. Barcelona Supercomputing Ctr Barcelona Spain Univ Lisbon Inst Super Tecnico INESC ID Lisbon Portugal

ISBN: (纸本)9781450392044

the increasing demand in HPC to utilize accelerators has motivated the development of pragma-based directives to target these devices. OmpSs-2 and OpenACC are both directive-based solutions that allow application programmers to utilize accelerators. the two leverage distinct types of parallelism: task parallelism and data parallelism, respectively. Non-trivial scientific applications can benefit from both types of available parallelism. However, the combination of pragma-based models is difficult to coordinate, as both assume full control and are unaware of each other at runtime. We propose an interoperation mechanism to enable novel composability across pragma-based programming models. We study and propose a clear separation of duties and implement our approach by augmenting the OmpSs-2 programming model, compiler and runtime to support OmpSs-2 + OpenACC programming.

关键词： programming Productivity Data-flow Paradigm Runtime Scheduling Code Transformation parallelism GPU

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Performance implications of communication mechanisms in all-software global address spaces systems

Performance implications of communication mechanisms in all-...

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Proceedings of the 1997 6th acm sigplan symposium on principles and practice of parallel programming

作者： Lim, Beng-Hong Chang, Chi-Chao Czajkowski, Grzegorz von Eicken, thorsten IBM Corp Yorktown Heights United States

Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming systems have been designed that synthesize global addressing purely in software on such machines. these systems provide a number of communication mechanisms to mitigate the effect of high communication latencies and overheads. this study compares the mechanisms in two representative all-software systems: CRL and Split-C. CRL uses region-based caching while Split-C uses split-phase and push-based data transfers for optimizing communication performance. Both systems take advantage of bulk data transfers. By implementing a set of parallel applications in both CRL and Split-C, and running them on the IBM SP2, Meiko CS-2 and two simulated architectures, we find that split-phase and push-based bulk data transfers are essential for good performance. Region-based caching benefits applications with irregular structure and with sufficient temporal locality, especially under high communication latencies. However, caching also hurts performance when there is insufficient data reuse or when the size of caching granularity is mismatched with the communication granularity. We find the programming complexity of the communication mechanisms in both languages to be comparable. Based on our results, we recommend that an ideal system intended to support diverse applications on parallel platforms should incorporate the communication mechanisms in CRL and Split-C.

关键词： parallel processing systems

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Correct and efficient work-stealing for weak memory models 13

Correct and efficient work-stealing for weak memory models

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18th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2013

作者： Lê, Nhat Minh Pop, Antoniu Cohen, Albert Zappa Nardelli, Francesco INRIA ENS Paris Paris France

ISBN: (纸本)9781450319225

Chase and Lev's concurrent deque is a key data structure in shared-memory parallel programming and plays an essential role in work-stealing schedulers. We provide the first correctness proof of an optimized implementation of Chase and Lev's deque on top of the POWER and ARM architectures: these provide very relaxed memory models, which we exploit to improve performance but considerably complicate the reasoning. We also study an optimized x86 and a portable C11 implementation, conducting systematic experiments to evaluate the impact of memory barrier optimizations. Our results demonstrate the benefits of hand tuning the deque code when running on top of relaxed memory models. © 2013 acm.

关键词： parallel programming

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A parallel Sparse Tensor Benchmark Suite on CPUs and GPUs 20

A Parallel Sparse Tensor Benchmark Suite on CPUs and GPUs

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Li, Jiajia Lakshminarasimhan, Mahesh Wu, Xiaolong Li, Ang Olschanowsky, Catherine Barker, Kevin Pacific Northwest Natl Lab Richland WA 99352 USA Univ Utah Salt Lake City UT USA Purdue Univ W Lafayette IN 47907 USA Boise State Univ Boise ID 83725 USA

ISBN: (纸本)9781450368186

Tensor computations present significant performance challenges that impact a wide spectrum of applications. Efforts on improving the performance of tensor computations include exploring data layout, execution scheduling, and parallelism in common tensor kernels. this work presents a benchmark suite for arbitrary-order sparse tensor kernels using state-of-the-art tensor formats: coordinate (COO) and hierarchical coordinate (HiCOO). It demonstrates a set of reference tensor kernel implementations and some observations on Intel CPUs and NVIDIA GPUs. the full paper can be referred to at http://***/abs/2001.00660.

关键词： sparse tensors benchmark GPU roofline model

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GPU Initiated OpenSHMEM: Correct and Eicient Intra-Kernel Networking for dGPUs 25

GPU Initiated OpenSHMEM: Correct and Eicient Intra-Kernel Ne...

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Hamidouche, Khaled LeBeane, Michael Adv Micro Devices Inc Santa Clara CA 95054 USA

ISBN: (纸本)9781450368186

Current state-of-the-art in GPU networking utilizes a host-centric, kernel-boundary communication model that reduces performance and increases code complexity. To address these concerns, recent works have explored performing network operations from within a GPU kernel itself. However, these approaches typically involve the CPU in the critical path, which leads to high latency and ineicient utilization of network and/or GPU resources. In this work, we introduce GPU Initiated OpenSHMEM (GIO), a new intra-kernel PGAS programming model and runtime that enables GPUs to communicate directly with a NIC without the intervention of the CPU. We accomplish this by exploring the GPU's coarse-grained memory model and correcting semantic mismatches when GPUs wish to directly interact with the network. GIO also reduces latency by relying on a novel template-based design to minimize the overhead of initiating a network operation. We illustrate that for structured applications like a Jacobi 2D stencil, GIO can improve application performance by up to 40% compared to traditional kernel-boundary networking. Furthermore, we demonstrate that on irregular applications like Sparse Triangular Solve (SpTS), GIO provides up to 44% improvement compared to existing intra-kernel networking schemes.

关键词： GPUs Distributed programming models RDMA networks

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Model and compilation strategy for out-of-core data parallel programs

Model and compilation strategy for out-of-core data parallel...

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Proceedings of the 5th acm sigplan symposium on principles and practice of parallel programming

作者： Bordawekar, Rajesh Choudhary, Alok Kennedy, Ken Koelbel, Charles Paleczny, Michael Syracuse Univ Syracuse United States

It is widely acknowledged in high-performance computing circles that parallel input/output needs substantial improvement in order to make scalable computers truly usable. We present a data storage model that allows processors independent access to their own data and a corresponding compilation strategy that integrates data-parallel computation with data distribution for out-of-core problems. Our results compare several communication methods and I/O optimizations using two out-of-core problems, Jacobi iteration and LU factorization.

关键词： parallel processing systems

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Lock-free channels for programming via communicating sequential processes 19

Lock-free channels for programming via communicating sequent...

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24th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2019

作者： Koval, Nikita Alistarh, Dan Elizarov, Roman IST Austria Austria JetBrains Austria

ISBN: (纸本)9781450362252

Traditional concurrent programming involves manipulating shared mutable state. Alternatives to this programming style are communicating sequential processes (CSP) [1] and actor [2] models, which share data via explicit communication. Rendezvous channel is the common abstraction for communication between several processes, where senders and receivers perform a rendezvous handshake as a part of their protocol (senders wait for receivers and vice versa). Additionally to this, channels support the select expression. In this work, we present the first eficient lock-free channel algorithm, and compare it against Go [3] and Kotlin [4] baseline implementations. © 2019 Copyright held by the owner/author(s).

关键词： Locks (fasteners)

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Automatic Formal Verification of MPI-Based parallel Programs 11

Automatic Formal Verification of MPI-Based Parallel Programs

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16th acm symposium on principles and practice of parallel programming

作者： Siegel, Stephen F. Zirkel, Timothy K. Univ Delaware Verified Software Lab Dept Comp & Informat Sci Newark DE 19716 USA

ISBN: (纸本)9781450301190

the Toolkit for Accurate Scientific Software (TASS) is a suite of tools for the formal verification of MPI-based parallel programs used in computational science. TASS can verify various safety properties as well as compare two programs for functional equivalence. the TASS front end takes an integer n >= 1 and a C/MPI program, and constructs an abstract model of the program with n processes. Procedures, structs, (multi-dimensional) arrays, heap-allocated data, pointers, and pointer arithmetic are all representable in a TASS model. the model is then explored using symbolic execution and explicit state space enumeration. A number of techniques are used to reduce the time and memory consumed. A variety of realistic MPI programs have been verified with TASS, including Jacobi iteration and manager-worker type programs, and some subtle defects have been discovered. TASS is written in Java and is available from http://***/tass under the Gnu Public License.

关键词： Verification Symbolic execution MPI message-passing debugging verification

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Incremental Flattening for Nested Data parallelism 19

Incremental Flattening for Nested Data Parallelism

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24th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Henriksen, Troels thoroe, Frederik Elsman, Martin Oancea, Cosmin Univ Copenhagen Copenhagen Denmark

ISBN: (纸本)9781450362252

Compilation techniques for nested-parallel applications that can adapt to hardware and dataset characteristics are vital for unlocking the power of modern hardware. this paper proposes such a technique, which builds on flattening and is applied in the context of a functional data-parallel language. Our solution uses the degree of utilized parallelism as the driver for generating a multitude of code versions, which together cover all possible mappings of the application's regular nested parallelism to the levels of parallelism supported by the hardware. these code versions are then combined into one program by guarding them with predicates, whose threshold values are automatically tuned to hardware and dataset characteristics. Our unsupervised method-of statically clustering datasets to code versions-is different from autotuning work that typically searches for the combination of code transformations producing a single version, best suited for a specific dataset or on average for all datasets. We demonstrate-by fully integrating our technique in the repertoire of a compiler for the Futhark programming language-significant performance gains on two GPUs for three real-world applications, from the financial domain, and for six Rodinia benchmarks.

关键词： functional language parallel compilers GPGPU

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