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algorithms and architectures for parallel processing 1

引用

丛书名： Lecture Notes in Computer Science

1000年

作者： Yang Xiang Wanlei Zhou Alfredo Cuzzocrea Michael Hobbs

ISBN: (数字)9783642246500

ISBN: (纸本)9783642246494

this two volume set LNCS 7016 and LNCS 7017 constitutes the refereed proceedings of the 11th international conference on algorithms and architectures for parallel processing, ica3pp 2011, held in Melbourne, Australia, in October 2011. the first volume presents 24 revised regular papers and 17 revised short papers together with the abstract of the keynote lecture - all carefully reviewed and selected from 85 initial submissions. the papers cover the many dimensions of parallel algorithms and architectures, encompassing fundamental theoretical approaches, practical experimental results, and commercial components and systems and focus on two broad areas of parallel and distributed computing, i.e., architectures, algorithms and networks, and systems and applications.

关键词： Algorithm Analysis and Problem Complexity Artificial Intelligence Software Engineering Information Systems Applications (incl. Internet) Computer Communication Networks Management of Computing and Information Systems

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Demand-based scheduling priorities for performance optimisation of stream programs on parallel platforms

Demand-based scheduling priorities for performance optimisat...

引用

13th international conference on algorithms and architectures for parallel processing, ica3pp 2013

作者： Nguyen, Vu thien Nga Kirner, Raimund University of Hertfordshire United Kingdom

ISBN: (纸本)9783319038582

this paper introduces a heuristic-based scheduler to optimise the throughput and latency of stream programs with dynamic network structure. the novelty is the utilisation of positive and negative demands of the streamcommunications. It is a centralised approach to provide load balancing for stream programs with dynamic network structures. the approach is designed for shared-memory multi-core platforms. the experiments show that our scheduler performs significantly better than the reference implementation without demand considerations. © Springer international Publishing Switzerland 2013.

关键词： Scheduling

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A recursive-adjustment co-allocation scheme in data grid environments 1

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6th international conference on algorithms and architectures for parallel processing, ica3pp

作者： Yang, Chao-Tung Yang, I.-Hsien Li, Kuan-Ching Hsu, Ching-Hsien High Performance Computing Laboratory Department of Computer Science and Information Engineering Tunghai University Taichung 40704 Taiwan Parallel and Distributed Processing Center Department of Computer Science and Information Management Providence University Taichung 43301 Taiwan Department of Computer Science and Information Engineering Chung Hua University Hsinchu 300 Taiwan

ISBN: (数字)9783540320715

ISBN: (纸本)3540292357

the co-allocation architecture was developed in order to enable parallel downloads of datasets from multiple servers. Several co-allocation strategies have been coupled and used to exploit rate differences among various client-server links and to address dynamic rate fluctuations by dividing files into multiple blocks of equal sizes. However, a major obstacle, the idle time of faster servers having to wait for the slowest server to deliver the final block, makes it important to reduce differences in finish time among replica servers. In this paper, we propose a dynamic co-allocation scheme, namely Recursive-Adjustment Co-Allocation scheme, to improve the performance of data transfer in Data Grids. Our approach reduces the idle time spent waiting for the slowest server and decreases data transfer completion time. © Springer-Verlag Berlin Heidelberg 2005.

关键词： parallel processing systems

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parallel algorithm for nonlinear network optimization problems and real-time applications

Parallel algorithm for nonlinear network optimization proble...

引用

12th international conference on algorithms and architectures for parallel processing, ica3pp 2012

作者： Lin, Shin-Yeu Guo, Xian-Chang Department of Electrical Engineering Chang Gung University Tao-Yuan Taiwan

ISBN: (纸本)9783642330773

In this paper, we propose a parallel algorithm to solve a class of nonlinear network optimization problems. the proposed parallel algorithm is a combination of the successive quadratic programming and the dual method, which can achieve complete decomposition and make parallel computation possible. the proposed algorithm can be applied to solve nonlinear network optimization problems in the smart grid. We have tested the proposed parallel algorithm in solving numerous cases of power flow problems on the IEEE 30-bus system. the test results demonstrate that the proposed parallel algorithm can obtain accurate solution. Additionally, neglecting the data communication time, the proposed parallel algorithm is, ideally, 13.1 times faster than the centralized Newton Raphson's method in solving the power flow problems of the IEEE 30-bus system. © 2012 Springer-Verlag.

关键词： parallel algorithms

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international Workshops and Symposiums on algorithms and architectures for parallel processing, ica3pp 2015

International Workshops and Symposiums on Algorithms and Arc...

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15th international conference on algorithms and architectures for parallel processing, ica3pp 2015

ISBN: (纸本)9783319271606

the proceedings contain 83 papers. the special focus in this conference is on Trust, Security and Privacy for Big Data. the topics include: Nth-Order Multifunction Filter Employing Current Differencing Transconductance Amplifiers;An Efficient Spatial Query processing Algorithm in Multi-sink Directional Sensor Network;An Improved Method for Reversible Data Hiding in Encrypted Image;Study on Personalized Location Privacy Preservation algorithms Based on Road Networks;A Hierarchical Identity-Based Signature from Composite Order Bilinear Groups;Towards Returning Data Control to Cloud Users;A Distributed Algorithm for Graph Edge Partitioning;Scheduling Stochastic Tasks with Precedence Constrain on Cluster Systems with Heterogenous Communication Architecture;An Output-Oriented Approach of Test Data Generation Based on Genetic Algorithm;An Efficient Pre-filter to Accelerate Regular Expression Matching;A Hybrid Optimization Approach for Anonymizing Transactional Data;Program Obfuscator for Privacy-Carrying Unidirectional One-hop Re-encryption;Predicting Severity of Software Vulnerability Based on Grey System theory;Characterization of Android Applications with Root Exploit by Using Static Feature Analysis;A Lightweighted Fine-Grained Privacy-Preserving Profile Matching Mechanism for Mobile Social Networks in Proximity;Context-Aware QoS Assurance for Smart Grid Big Data processing with Elastic Cloud Resource Reconfiguration;Continuous User Identity Verification for Trusted Operators in Control Rooms;Leakage-Resilient Anonymous Identity-Based Broadcast Encryption in the Standard Model;Scheduling Resource of IaaS Clouds for Energy Saving Based on Predicting the Overloading Status of Physical Machines and Towards Mechanised Semantics of HPC.

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Optimizing CSR-Based SpMV on a New MIMD Architecture Pezy-SC3s 1

引用

23rd international conference on algorithms and architectures for parallel processing (ica3pp)

作者： Guo, Jihu Liu, Jie Wang, Qinglin Zhu, Xiaoxiong Natl Univ Def Technol Lab Digitizing Software Frontier Equipment Changsha 410073 Peoples R China Natl Univ Def Technol Natl Key Lab Parallel & Distributed Comp Changsha 410073 Peoples R China

ISBN: (数字)9789819708017

ISBN: (纸本)9789819708000;9789819708017

Sparse matrix-vector multiplication (SpMV) is extensively used in scientific computing and often accounts for a significant portion of the overall computational overhead. therefore, improving the performance of SpMV is crucial. However, sparse matrices exhibit a sporadic and irregular distribution of non-zero elements, resulting in workload imbalance among threads and challenges in vectorization. To address these issues, numerous efforts have focused on optimizing SpMV based on the hardware characteristics of computing platforms. In this paper, we present an optimization on CSR-Based SpMV, since the CSR format is the most widely used and supported by various high-performance sparse computing libraries, on a novel MIMD computing platform Pezy-SC3s. Based on the hardware characteristics of Pezy-SC3s, we tackle poor data locality, workload imbalance, and vectorization challenges in CSRBased SpMV by employing matrix chunking, applying Atomic Cache for workload scheduling, and utilizing SIMD instructions during performing SpMV. As the first study to investigate SpMV optimization on Pezy-SC3s, we evaluate the performance of our work by comparing it with the CSR-Based SpMV and SpMV provided by Nvidia's CuSparse. through experiments conducted on 2092 matrices obtained from SuiteSparse, we demonstrate that our optimization achieves a maximum speedup ratio of x17.63 and an average of x1.56 over CSR-Based SpMV and an average bandwidth utilization of 35.22% for large-scale matrices (nnz >= 10(6)) compared with 36.17% obtained using CuSparse. these results demonstrate that our optimization effectively harnesses the hardware resources of Pezy-SC3s, leading to improved performance of CSR-Based SpMV.

关键词： SpMV Optimization CSR-Based SpMV Pezy-SC3s

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Fast parallel algorithms for blocked dense matrix multiplication on shared memory architectures

Fast parallel algorithms for blocked dense matrix multiplica...

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12th international conference on algorithms and architectures for parallel processing, ica3pp 2012

作者： Nimako, G. Otoo, E.J. Ohene-Kwofie, D. School of Computer Science University of the Witwatersrand Johannesburg South Africa

ISBN: (纸本)9783642330773

the current trend of multicore and Symmetric Multi-Processor (SMP), architectures underscores the need for parallelism in most scientific computations. Matrix-matrix multiplication is one of the fundamental computations in many algorithms for scientific and numerical analysis. Although a number of different algorithms (such as Cannon, PUMMA, SUMMA etc), have been proposed for the implementation of matrix-matrix multiplication on distributed memory architectures, matrix-matrix algorithms for multicore and SMP architectures have not been extensively studied. We present two types of algorithms, based largely on blocked dense matrices, for parallel matrix-matrix multiplication on shared memory systems. the first algorithm is based on blocked matrices whiles the second algorithm uses blocked matrices with the MapReduce framework in shared memory. Our experimental results show that, our blocked dense matrix approach outperforms the known existing implementations by up to 50% whiles our MapReduce blocked matrix-matrix algorithm outperforms the existing matrix-matrix multiplication algorithm of the Phoenix shared memory MapReduce approach, by about 40%. © 2012 Springer-Verlag.

关键词： Matrix algebra

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A note on developing optimal and scalable parallel two-list algorithms

A note on developing optimal and scalable parallel two-list ...

引用

12th international conference on algorithms and architectures for parallel processing, ica3pp 2012

作者： Chedid, Fouad B. College of Arts and Applied Sciences Dhofar University Oman Department of Computer Science Notre Dame University - Louaize Lebanon

ISBN: (纸本)9783642330643

We show that developing an optimal parallelization of the two-list algorithm is much easier than we once thought. All it takes is to observe that the steps of the search phase of the two-list algorithm are closely related to the steps of a merge procedure for merging two sorted lists, and we already know how to parallelize merge efficiently. Armed with this observation, we present an optimal and scalable parallel two-list algorithm that is easy to understand and analyze, while it achieves the best known range of processor-time tradeoffs for this problem. In particular, our algorithm based on a CREW PRAM model takes time O(2n/2 - α) using 2α processors, for 0 ≤ α ≤ n/2 - 2logn + 2. © 2012 Springer-Verlag.

关键词： parallel processing systems

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Torus-connected cycles: An implementation-friendly topology for interconnection networks of massively parallel systems

Torus-connected cycles: An implementation-friendly topology ...

引用

13th international conference on algorithms and architectures for parallel processing, ica3pp 2013

作者： Bossard, Antoine Kaneko, Keiichi Advanced Institute of Industrial Technology Tokyo Metropolitan University Japan Graduate School of Engineering Tokyo University of Agriculture and Technology Japan

ISBN: (纸本)9783319038889

the number of nodes inside supercomputers is continuously increasing. As detailed in the TOP500 list, there are now systems that include more than one million nodes;for instance China's Tianhe-2. To cope with this huge number of cores, many interconnection networks have been proposed in the literature. However, in most cases, proposed topologies have shown gaps preventing these topologies from being actually implemented and manufactured. In this paper, we propose a new, implementation-friendly, topology for interconnection networks of massively parallel systems: torus-connected cycles (TCC). Torus-based networks have proven very popular in the recent years: the Fujitsu K and Cray Titan are two examples of supercomputers whose interconnection networks are based on the torus topology. © Springer international Publishing Switzerland 2013.

关键词： Topology

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High-performance matrix multiply on a massively multithreaded Fiteng1000 processor

High-performance matrix multiply on a massively multithreade...

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12th international conference on algorithms and architectures for parallel processing, ica3pp 2012

作者： Liu, Jie Chi, Lihua Gong, Chunye Xu, Han Jiang, Jie Yan, Yihui Hu, Qingfeng College of Computer Science National University of Defense Technology Changsha 410073 China

ISBN: (纸本)9783642330643

Matrix multiplication is an essential building block of many linear algebra operations and applications. this paper presents parallel algorithms with shared A or B matrix in the memory for the special massively multithreaded Fiteng1000 processor. We discuss the implementations of parallel matrix multiplication algorithms on the multi-core processor with many threads. To gain better performance, it is important to choose the 2D thread spatial topography, the memory layer for the placement and the sizes of the matrices. parallel codes using C and assembly language under OpenMP parallel programming environment are designed. Performance results on Fiteng1000 processor show that the algorithms have well good parallel performance and achieve near-peak performance. © 2012 Springer-Verlag.

关键词： parallel algorithms

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