the proceedings contain 48 papers. the topics discussed include: reconfigurable platform for digital convergence terminals;European research in embeddedsystems;interface overheads in embedded multimedia software;auto...
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ISBN:
(纸本)3540364102
the proceedings contain 48 papers. the topics discussed include: reconfigurable platform for digital convergence terminals;European research in embeddedsystems;interface overheads in embedded multimedia software;automated distribution of UML 2.0 designed applications to a configurable multiprocessor platform;key research challenges for successfully applying MDD within real-time embedded software development;domain-specific modeling of power aware distributed real-time embeddedsystems;mining dynamic document spaces with massively parallel embedded processors;designing wireless sensor nodes;design, implementation, and experiment on outdoor deployment of wireless sensor network for environmental monitoring;energy-driven partitioning of signal processing algorithms in sensor networks;security in wireless sensor networks: considerations and experiments;on security of PAN wireless systems;and code size reduction by compiler tuning.
the proceedings contain 49 papers from the embeddedcomputersystems: architectures, modeling, and simulation: 5thinternationalworkshop, SAMOS 2005. the topics discussed include: interprocedural optimization for dyn...
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the proceedings contain 49 papers from the embeddedcomputersystems: architectures, modeling, and simulation: 5thinternationalworkshop, SAMOS 2005. the topics discussed include: interprocedural optimization for dynamic hardware configurations;reconfigurable embeddedsystems: an application-oriented perspective on architectures and design techniques;reconfigurable multiple operation array;RAPANUI: rapid prototyping for media processor architecture exploration;data-driven regular reconfigurable arrays: design space exploration and mapping;automatic FIR filter generation for FPGAs;and two-dimensional fast cosine transfrom for vector-STA architectures.
the proceedings contain 46 papers. the topics discussed include: software is the answer but what is the question?;integrating VLIW processors with a network on chip;communication architecture simulation on the virtual...
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ISBN:
(纸本)9783540736226
the proceedings contain 46 papers. the topics discussed include: software is the answer but what is the question?;integrating VLIW processors with a network on chip;communication architecture simulation on the virtual synchronization framework;a model-driven automatically-retargetable debug tool for embeddedsystems;performance evaluation of memory management configurations in Linux for an OS-level design space exploration;model and validation of block cleaning cost for flash memory;VLSI architecture for MRF based stereo matching;low-power twiddle factor unit for FFT computation;trade-offs between voltage scaling and processor shutdown for low-energy embedded multiprocessors;an automatically-retargetable time-constraint-driven instruction scheduler for post-compiling optimization of embedded code;improving TriMedia cache performance by profile guided code reordering;and a streaming machine description and programming model.
the proceedings contain 34 papers. the topics discussed include: programmable and scalable architecture for graphics processing units;the abstract streaming machine: compile-time performance modeling of stream program...
ISBN:
(纸本)3642031374
the proceedings contain 34 papers. the topics discussed include: programmable and scalable architecture for graphics processing units;the abstract streaming machine: compile-time performance modeling of stream programs on heterogeneous multiprocessors;CABAC accelerator architectures for video compression in future multimedia: a survey;programmable accelerators for reconfigurable video decoder;scenario based mapping of dynamic applications on MPSoC: a 3d graphics case study;multiple description scalable coding for video transmission over unreliable networks;evaluation of different multithreaded and multicore processor configurations for SoPC;implementing fine/medium grained TLP support in a many-core architecture;implementation of W-CDMA cell search on a FPGA based multi-processor system-on-chip with power management;and a multiprocessor architecture with an omega network for the massively parallel model GCA.
the proceedings contain 32 papers. the topics discussed include: can they be fixed: some thoughts after 40 years in the business;on the benefit of caching traffic flow data in the link buffer;impact of software bypass...
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ISBN:
(纸本)354070549X
the proceedings contain 32 papers. the topics discussed include: can they be fixed: some thoughts after 40 years in the business;on the benefit of caching traffic flow data in the link buffer;impact of software bypassing on instruction level parallelism and register file traffic;scalable architecture for prefix preserving anonymization of IP addresses;arithmetic design on quantum-dot cellular automata nanotechnology;a real-time programming model for heterogeneous MPSoCs;a multi-objective and hierarchical exploration tool for SoC performance estimation;a novel non-exclusive dual-mode architecture for MPSoCs-oriented network on chip designs;area reliability trade-off in improved Reed Muller coding;efficient Reed-Solomon iterative decoder using Galois field instruction set;introduction to system level design for heterogeneous systems;streaming systems in FPGAs;heterogeneous design in functional DIF;and application server for wireless sensor networks.
Every year, the disparity between processing power and memory bandwidth continues to expand. this well-established trend has been recognized for several years. Recently, innovative concepts have emerged to address and...
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ISBN:
(数字)9783031783807
ISBN:
(纸本)9783031783791;9783031783807
Every year, the disparity between processing power and memory bandwidth continues to expand. this well-established trend has been recognized for several years. Recently, innovative concepts have emerged to address and narrow this growing gap. One notable example of such technology is High Bandwidth Memory (HBM), which is specifically designed to tackle this challenge. HBM has a much higher throughput thanks to their wider data buses, making it an innovative solution for this problem. Due to its configurability and timing requirements, HBM and Field-Programmable Gate Arrays (FPGAs) offer a great combination for prototyping, and the hardware that includes both is slowly gaining popularity and accessibility. In this work, we introduce an open-source simulator capable of accurately predicting and modeling HBM based FPGA systems in a fast-prototyping manner. this design not only simulates an HBM but also a memory controller and a memory interconnect, like the one used by AMD/Xilinx. To prove accuracy, this work shows side-byside comparison between the real hardware and simulated benchmarks of different specific types of memory access patterns, where we measure an overall error of 9.91%. Finally, we compare the performance of some real-life applications where we report an average error of 2.72%.
the proceedings contain 9 papers. the topics discussed include: performance evaluation of the IBM POWER8 system to support computational neuroscientific application using morphologically detailed neurons;performance a...
ISBN:
(纸本)9781450340090
the proceedings contain 9 papers. the topics discussed include: performance evaluation of the IBM POWER8 system to support computational neuroscientific application using morphologically detailed neurons;performance analysis of OpenMP on a GPU using a CORAL proxy application;examining recent many-core architectures and programming models using SHOC;automatic loop kernel analysis and performance modeling with Kerncraft;techniques for modeling large-scale HPC I/O workloads;characterizing node orderings for improved performance;simulating stencil-based application on future Xeon Phi processor;ARMv8 micro-architectural design space exploration for high performance;and guided profiling for auto-tuning array layouts on GPUs.
Digital information technology has revolutionized the world within less than four decades. It has taken the step from mainframe computers, mainly operated as hosts in computing centres, to desktops and laptops, connec...
ISBN:
(纸本)3540364102
Digital information technology has revolutionized the world within less than four decades. It has taken the step from mainframe computers, mainly operated as hosts in computing centres, to desktops and laptops, connected by networks and found nearly on all office desks and tables today. computers have become every day tools deeply integrated into all kinds of activities of our life.
Managing the energy consumption of embeddedsystems has become a major problem withthe increasing demand for portable electronic devices. this paper propose a multi-bank memory architecture as a solution to decrease ...
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ISBN:
(纸本)1424401550
Managing the energy consumption of embeddedsystems has become a major problem withthe increasing demand for portable electronic devices. this paper propose a multi-bank memory architecture as a solution to decrease the static energy cost in memory. We set up the equations ruling the optimization problem for decreasing the memory static energy cost, analyze the impact of different parameters on the energy cost and finally present some case study results.
this paper provides two contributions to the research on applying domain-specific modeling languages to distributed real-time embedded (DRE) systems. First, we present the ALDERIS platform-independent visual language ...
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ISBN:
(纸本)3540364102
this paper provides two contributions to the research on applying domain-specific modeling languages to distributed real-time embedded (DRE) systems. First, we present the ALDERIS platform-independent visual language for component-based system development. Second, we demonstrate the use of the ALDERIS language on a helicopter autopilot DRE design. the ALDERIS language is based on the concept of platform-based design, and explicitly captures asynchronous event-driven component interactions as well as the underlying platform for the computation. Unlike most modeling languages, ALDERIS has formally defined semantics providing a way for the formal verification of dense real-time properties and energy consumption.
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