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检索条件"任意字段=6th International Workshop on Embedded Computer Systems - Architectures, Modeling and Simulation"

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Platform thinking in embedded systems

Platform thinking in embedded systems

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5th international workshop on embedded computer systems: architectures, modeling, and simulation, SAMOS 2005

作者： Iannucci, Bob Nokia Research Center Itämerenkatu 11-13 00180 Helsinki Finland

Modern embedded systems are built from microprocessors, domain-specific hardware blocks, communication means, application-specific sensor/actuators and as simple as possible user interface, which hides the embedded complexity. the design of embedded systems is typically done in an integrated way with strong dependencies between these building block elements and between different parts of the system. this talk focuses on how platform thinking and engineering can be applied to increasingly complex embedded systems and what impacts that will have on the design and architectures. Platform engineering in embedded systems may sound contradictory, but in practice will introduce modularity and stable interfaces. New system-level architectures for hardware, middleware architectures, and certifiable operating system micro-kernels are needed to raise the abstraction level and productivity of design. As an example I will go through the definitions of some modules in a mobile device and the requirements for their interfaces. I will describe the additional design steps, new formal methods and system-level tasks that are needed in the platform approach. Finally, I will review the Advanced Research and Technology for embedded and Intelligent systems (ARTEMIS) technology platform in EU 7th Framework Program, which is bringing together industrial and academic groups to create coherent and integrated European research in the domain of embedded systems. © Springer-Verlag Berlin Heidelberg 2005.

关键词： embedded systems

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A case for visualization-integrated system-level design space exploration

A case for visualization-integrated system-level design spac...

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5th international workshop on embedded computer systems: architectures, modeling, and simulation, SAMOS 2005

作者： Pimentel, Andy D. Computer Systems Architecture Group Informatics Institute University of Amsterdam Kruislaan 403 1098 SJ Amsterdam Netherlands

Design space exploration plays an essential role in the system-level design of embedded systems. It is imperative therefore to have efficient and effective exploration tools in the early stages of design, where the design space is largest. System-level simulation frameworks that aim for early design space exploration create large volumes of simulation data in exploring alternative architectural solutions. Interpreting and drawing conclusions from these copious simulation results can be extremely cumbersome. In other domains that also struggle with interpreting large volumes of data, such as scientific computing, data visualization is an invaluable tool. Such visualization is often domain specific and has not become widely used in evaluating the results of computer architecture simulations. Surprisingly little research has been undertaken in the dynamic use of visualization to guide architectural design space exploration. In this paper, we plead for the study and development of generic methods and techniques for run-time visualization of system-level computer architecture simulations. We further explain that these techniques must be scalable and interactive, allowing designers to better explore complex (embedded system) architectures. © Springer-Verlag Berlin Heidelberg 2005.

关键词： embedded systems

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Hardware design and simulation for verification

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6th international School on Formal Methods for the Design of computer, Communication, and Software systems

作者： Bombieri, Nicola Fummi, Franco Pravadelli, Graziano Univ Verona I-37134 Verona Italy

ISBN: (纸本)3540343040

the development of more and more complex embedded systems constitutes a very challenging task for EDA experts, due to their HW/SW-mixed nature joint to the high demand for quality and reliability. Recently, both industrial engineers and academic researchers have developed a very large number of techniques for dynamic verification in terms of co-simulation, which, in particular, address the different nature of hardware and software components of an embedded system. However, a widely accepted methodology does not exist. thus, this paper is intended to provide a general view on simulation-based modeling and verification strategies for developing embedded systems. In particular, the paper is focussed on describing state-of-the art co-simulation approaches and verification strategies based on fault simulation and assertion checking.

关键词： computer hardware

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PERFOSIM: a performance evaluation tool for HLA distributed simulations 6

PERFOSIM: a performance evaluation tool for HLA distributed ...

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6th IEEE international workshop on Distributed simulation and Real-Time Applications (DS-RT 2002)

作者： d'Ausbourg, B Bussenot, JL Siron, P ONERA CERT F-31055 Toulouse 4 France

ISBN: (纸本)0769518532

With distributed simulation, existing simulations, even from different disciplines, can be reused or made to interoperate. the efficiency of this technique is however not firmly established and it depends on the ability to satisfy a number of requirements, especially concerning simulation performance. the performance depends to a large extent on the structure and scaling of architectural components of the simulation execution platform. In this paper, we present an approach to address this problem: the design of models to capture the main characteristics of distributed simulations, run-time infrastructures and network architectures, and the development of a tool to predict performances. this tool, which is a simulator of HLA simulations is written by using HLA and is evaluated on three test applications.

关键词： Computational modeling computer architecture Dissolved gas analysis Performance evaluation Performance gain Predictive models Procurement Runtime systems engineering and theory Testing

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Using a software architecture description language to model the architecture and run-time performance of a federate 6

Using a software architecture description language to model ...

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6th IEEE international workshop on Distributed simulation and Real-Time Applications (DS-RT 2002)

作者： Petty, MD McKensie, FD Xu, QW Old Dominion Univ Virginia Modeling Anal & Simulat Ctr Suffolk VA 23435 USA

ISBN: (纸本)0769518532

Software architecture is high-level software design, dealing with the structure and organization of software systems. A software architecture is defined in terms of computational components and interactions among those components. Architecture Description Languages (ADLs) represent architecture-level software designs. Different ADLs often have different intents;e.g., Rapide supports architecture simulation and Acme is intended to be both an ADL and an ADL interchange format. Experimental applications of two ADLs were conducted to determine the effectiveness of ADLs for architecture-level analysis of simulation systems;one of them is reported Acme was used to model the architecture of ModSAF and to analyze its run-time performance. the model was used to analyze execution time at the component and federate levels and to estimate the maximum number of internal and external simulation entities that could be supported by the ModSAF architecture. the experiment showed that ADLs could model important features of simulation system architectures.

关键词： Analytical models Application software Architecture description languages Computational modeling computer architecture Performance analysis Runtime Software architecture Software design Software systems

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Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC

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9th SAMOS international workshop

作者： Uhrig, Sascha Univ Augsburg Inst Comp Sci D-86159 Augsburg Germany

ISBN: (纸本)9783642031373

Multicore processors get more and more popular, even in embedded systems. Unfortunately, these types of processors require a special kind of programming technique to offer their full performance, i.e. they require a high thread-level parallelism. In this paper we evaluate the performance of different configurations of the same processor core within an SoPC: a single threaded single core, a multithreaded single core, a single threaded multicore, and a multithreaded multicore. the used core is the jamuth core, a multithreaded Java processor able to execute Java bytecode directly in hardware. the advantage of Java in a multicore environment is that it brings the threading concept for free, i.e. the software developers are familiar with the threading concept. Our evaluations show that the cores within a multicore processor should be at least two-threaded to bridge the higher memory delays caused by the contention at the shared bus.

关键词： embedded systems

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Verilog-based simulation of hardware support for Data-flow concurrency on Multicore systems

Verilog-based simulation of hardware support for Data-flow c...

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13th international Conference on embedded computer systems - architectures, modeling and simulation (IC-SAMOS)

作者： Matheou, George Evripidou, Paraskevas Univ Cyprus Dept Comp Sci Nicosia Cyprus

ISBN: (纸本)9781479901036

Data-Driven Multithreading (DDM) is a threaded data-flow model that schedules threads for execution based on data availability. DDM is utilizing a thread Scheduling Unit (TSU) for the management of the threads on sequential processors. In this work we present the hardware implementation of the TSU with synthesizable code using the Verilog HDL and its evaluation using the ISim simulator. the evaluation results show that the TSU is able to run at a maximum frequency of 180 MHz and consumes only 5% of the Xilinx Virtex-6 FPGA resources. the initial results obtained in this work will enable us to design an FPGA based DDM multicore chip consisting of several Microblaze cores driven by the TSU. thus, we will be able to evaluate the performance of the novel threaded data-flow model and have direct comparison with the sequential model on the same hardware.

关键词： data flow computing field programmable gate arrays hardware description languages integrated circuit design microprocessor chips multiprocessing systems performance evaluation processor scheduling

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Efficient strategy for developing a simulator for a novel concurrent multithreaded processor architecture

Efficient strategy for developing a simulator for a novel co...

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Proceedings of the 1998 6th international Symposium on modeling, Analysis and simulation of computer and Telecommunications systems, MASCOTS

作者： Huang, Jian Lilja, David J. Univ of Minnesota Minneapolis United States

In developing a simulator for a new processor architecture, it often is not clear whether it is more efficient to write a new simulator or to modify an existing simulator. Writing a new simulator forces the processor architect to develop or adapt all of the related software tools. However, modifying an existing simulator and related tools, which are usually not well-documented, can be time-consuming and error-prone. We describe the SImulator for Multithreaded computer architectures (SIMCA) that was developed with the primary goal of obtaining a functional simulator as quickly as possible to begin evaluating the superthreaded architecture. the performance of the simulator itself was important, but secondary. We achieved our goal using a technique called process-pipelining that exploits the unique features of this new architecture to hide the details of the underlying simulator. this approach allowed us to quickly produce a functional simulator whose performance is only 3.8-4.9 times slower than the base simulator.

关键词： computer architecture

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Analysis of User Perceived QoS in Ubiquitous UMTS Environments Subject to Faults

Analysis of User Perceived QoS in Ubiquitous UMTS Environmen...

引用

6th international workshop on Software Technologies for embedded and Ubiquitous systems

作者： Bondavalli, Andrea Lollini, Paolo Montecchi, Leonardo Univ Florence Dipartimento Sistemi & Informat I-50134 Florence Italy

ISBN: (纸本)9783540877844

this paper provides a QoS analysis of a dynamic, ubiquitous UNITS network scenario in the automotive context identified in the ongoing EC HIDENETS project. the scenario comprises different types of mobile users, applications, traffic conditions, and outage events reducing the available network resources. Adopting a compositional modeling approach based on Stochastic Activity Networks formalism, we analyze the Quality of Service (QoS) both from the users' perspective and from the mobile operator's one. the classical QoS analysis is enhanced by taking into account the congestion both caused by the outage events and by the varying traffic conditions.

关键词： QoS analysis UMTS networks partial outages compositional modeling stochastic activity networks simulation

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Reconfigurable embedded systems: An application-oriented perspective on architectures and design techniques

Reconfigurable embedded systems: An application-oriented per...

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5th international workshop on embedded computer systems: architectures, modeling, and simulation, SAMOS 2005

作者： Glesner, M. Hinkelmann, H. Hollstein, T. Indrusiak, L.S. Murgan, T. Obeid, A.M. Petrov, M. Pionteck, T. Zipf, P. Institute of Microelectronic Systems Darmstadt University of Technology Karlstr. 15 Darmstadt D-64283 Germany

Reconfiguration emerged as a key concept to cope with constraints regarding performance, power consumption, design time and costs posed by the growing diversity of application domains. this work gives an overview of several relevant reconfigurable architectures and design techniques developed by the authors in different projects and emphasizes the effective role of reconfigurability in embedded system design. © Springer-Verlag Berlin Heidelberg 2005.

关键词： embedded systems

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