this paper provides two contributions to the research on applying domain-specific modeling languages to distributed real-time embedded (DRE) systems. First, we present the ALDERIS platform-independent visual language ...
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ISBN:
(纸本)3540364102
this paper provides two contributions to the research on applying domain-specific modeling languages to distributed real-time embedded (DRE) systems. First, we present the ALDERIS platform-independent visual language for component-based system development. Second, we demonstrate the use of the ALDERIS language on a helicopter autopilot DRE design. the ALDERIS language is based on the concept of platform-based design, and explicitly captures asynchronous event-driven component interactions as well as the underlying platform for the computation. Unlike most modeling languages, ALDERIS has formally defined semantics providing a way for the formal verification of dense real-time properties and energy consumption.
In recent years designers of embeddedcomputersystems face a tremendous growth in complexity of their systems. this, together withthe fact that the used system clock frequencies rise and that the real time required ...
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ISBN:
(纸本)1424401550
In recent years designers of embeddedcomputersystems face a tremendous growth in complexity of their systems. this, together withthe fact that the used system clock frequencies rise and that the real time required to see features start up and work correctly in an embedded system also increases, let skyrocket the simulation times of event based simulation engines. Performing these simulations on register transfer level (RTL), however, is crucial to achieve functional verification of embeddedcomputersystems. the acceleration of such event based simulations thus is the aim of the work presented in this paper. To this end a methodology called clock suppression is presented and thoroughly discussed. To underpin the feasibility and performance of this approach, evaluation results of simulation experiments for several designs will be shown.
We present SimGate - a full-system simulator for the Stargate intermediate-level, resource-constrained, sensor network device. We empirically evaluate the accuracy and performance of the system in isolation as well as...
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ISBN:
(纸本)1424401550
We present SimGate - a full-system simulator for the Stargate intermediate-level, resource-constrained, sensor network device. We empirically evaluate the accuracy and performance of the system in isolation as well as coupled with simulated Mica2 motes. Our system is functionally correct and achieves accurate cycle estimation (i.e. cycle-close). Moreover, the overhead of simulated execution is modest with respect to previously published work.
the multimedia capabilities in battery powered mobile communication devices should be provided at high energy efficiency. Consequently, the hardware is usually implemented using low-power technology and the hardware a...
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ISBN:
(纸本)3540364102
the multimedia capabilities in battery powered mobile communication devices should be provided at high energy efficiency. Consequently, the hardware is usually implemented using low-power technology and the hardware architectures are optimized for embedded computing. Software architectures, on the other hand, are not embedded system specific, but closely resemble each other for any computing device. the popular architectural principle, software layering, is responsible for much of the overheads, and explains the stagnation of active usage times of mobile devices. In this paper, we consider the observed developments against the needs of multimedia applications in mobile communication devices and quantify the overheads in reference implementations.
One of the most important bottleneck in the overall design flow of a complex embedded system is due to the simulation. simulation occurs at every phase of the design flow. In this paper we focus on system level design...
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ISBN:
(纸本)1424401550
One of the most important bottleneck in the overall design flow of a complex embedded system is due to the simulation. simulation occurs at every phase of the design flow. In this paper we focus on system level design proposing a novel approach to speed up the evaluation of a system configuration. the approach, which uses a Fuzzy System as approximator for the different components of the system, is used to accelerate the design space exploration of a VLIW based parameterized SoC platform for the optimization of both performance and power dissipation. the experiments, carried out on a multimedia benchmark suite, demonstrate the scalability and the accuracy of the proposed approach.
this paper proposes a new integration technique, called IRIS (Integrated Register allocation and Instruction Scheduling), to combine instruction scheduling and register allocation. Both register allocation and instruc...
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ISBN:
(纸本)3540364102
this paper proposes a new integration technique, called IRIS (Integrated Register allocation and Instruction Scheduling), to combine instruction scheduling and register allocation. Both register allocation and instruction scheduling are performed simultaneously at each variable reference where the selection between serialization by scheduling and spilling by register allocation is determined. To make a right selection, the costs of serialization and spilling are estimated with a cost model proposed to reduce the complexity of the estimation. Experiments show that IRIS achieves significant improvements when compared to widely-used existing techniques.
High-level performance modeling and simulation have become a key ingredient of system-level design as they facilitate early architectural design space exploration. An important precondition for such high-level modelin...
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ISBN:
(纸本)1424401550
High-level performance modeling and simulation have become a key ingredient of system-level design as they facilitate early architectural design space exploration. An important precondition for such high-level modeling and simulation methods is that they should yield trustworthy performance estimations. this requires validation (if possible) and calibration of the simulation models, which are two aspects that have not yet been widely addressed in the system-level community. this paper presents an initial attempt to provide support for calibrating various model components of a system-level performance model. We discuss these model calibration mechanisms in the context of our Sesame system-level simulation framework. An illustrative case study will also be presented to indicate the merits of model calibration.
We present a soft error rate (SER) analysis methodology within a simulation and design environment that covers a broad spectrum of design problems and parameters. Our approach includes modeling of the particle hit at ...
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ISBN:
(纸本)3540364102
We present a soft error rate (SER) analysis methodology within a simulation and design environment that covers a broad spectrum of design problems and parameters. Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching probability of a particle hit on all nodes of the circuit, embedded timing analysis to obtain the latching window, and fine-grained accounting of the electrical masking effects to account for boththe effects of scaling and of pulse duration versus the period of the system clock to get an estimate of the maximum SER of the circuit. this approach has been implemented in CARROT and placed under a broad design environment to assess design tradeoffs with SER as a parameter.
Memories are known to be the energy bottleneck of portable embedded devices. Numerous memory aware energy optimizations have been proposed. However, boththe optimization and the validation are performed in an ad-hoe ...
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ISBN:
(纸本)3540364102
Memories are known to be the energy bottleneck of portable embedded devices. Numerous memory aware energy optimizations have been proposed. However, boththe optimization and the validation are performed in an ad-hoe manner as a coherent optimizing compilation and simulation framework does not exist as yet. In this paper, we present such a framework for performing memory hierarchy aware energy optimization. Boththe compiler and the simulator are configured from a single memory hierarchy description. Significant savings of up to 50% in the total energy dissipation are reported.
Soft real-time systems are often analysed using hard realtime techniques, which are not suitable to take into account the deadline misses rate allowed in such systems. therefore, the resulting system is over-dimension...
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ISBN:
(纸本)3540364102
Soft real-time systems are often analysed using hard realtime techniques, which are not suitable to take into account the deadline misses rate allowed in such systems. therefore, the resulting system is over-dimensioned, thus expensive. To appropriately dimension soft real-time systems, adequate models, capturing their varying runtime behaviour, are needed. By using the concepts of a mathematically defined language, we provide a modelling approach based on patterns that are able to express the variations appearing in the system timing behaviour. Based on these modelling patterns, models can be easily created and are amenable to average case performance evaluation. By the means of a case study, we show the type of results that can be obtained from such an evaluation and how these results are used to dimension the system.
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