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检索条件"任意字段=6th International Workshop on Embedded Computer Systems - Architectures, Modeling and Simulation"

共 376 条记录，以下是261-270 订阅

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Rapid implementation and optimisation of DSP systems on SoPC heterogeneous platforms

Rapid implementation and optimisation of DSP systems on SoPC...

引用

5th international workshop on embedded computer systems - architectures, modeling, and simulation

作者： McAllister, J Woods, R Reilly, D Fischaber, S Hasson, R Queens Univ Belfast ECIT Belfast BT3 9DT Antrim North Ireland

ISBN: (纸本)354026969X

the emergence of programmable logic devices as processing platforms for digital signal processing applications poses challenges concerning rapid implementation and high level optimization of algorithms on these platforms. this paper describes Abhainn, a rapid implementation methodology and toolsuite for translating an algorithmic expression of the system to a working implementation on a heterogeneous multiprocessor/field programmable gate array platform, or a standalone system on programmable chip solution. Two particular focuses for Abhainn are the automated but configurable realisation of inter-processor communuication fabrics, and the establishment of novel dedicated hardware component design methodologies allowing algorithm level transformation for system optimization. this paper outlines the approaches employed in both these particular instances.

关键词： embedded systems

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Fast real-time job selection with resource constraints under earliest deadline first

Fast real-time job selection with resource constraints under...

引用

5th international workshop on embedded computer systems - architectures, modeling,, and simulation

作者： Han, S Park, M Cho, Y Seoul Natl Univ Sch Elect Engn & Comp Sci Seoul South Korea LG Elect Mobile Hanset R&D Ctr Seoul South Korea

ISBN: (纸本)354026969X

the Stack Resource Policy (SRP) is a real-time synchronization protocol suitable for embedded systems for its simplicity. However, if SRP is applied to dynamic priority scheduling, the runtime overhead of job selection algorithms could affect the performance of the system seriously. To solve the problem, a job selection algorithm was proposed that uses a selection tree as a scheduling queue structure. the proposed algorithm selects a job in 0([log(2)n]) time, resulting in significant reduction in the run-time overhead of scheduler. In this paper, the correctness of the job selection algorithm is presented. Also, the job selection algorithm was implemented in GSM/GPRS handset with ARM7 processor to see its effectiveness on embedded systems. the experiments performed on the system show that the proposed algorithm can further utilize the processor by reducing the scheduling overhead.

关键词： Real time systems

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Configurable computing for high-security/high-performance ambient systems

Configurable computing for high-security/high-performance am...

引用

5th international workshop on embedded computer systems - architectures, modeling, and simulation

作者： Gogniat, G Burleson, W Bossuet, L UBS LESTER Lorient France Univ Massachusetts Dept Elect & Comp Engn Amherst MA 01003 USA

ISBN: (纸本)354026969X

this paper stresses why configurable computing is a promising target to guarantee the hardware security of ambient systems. Many works have focused on configurable computing to demonstrate its efficiency but as far as we know none have addressed the security issue from system to circuit levels. this paper recalls main hardware attacks before focusing on issues to build secure systems on configurable computing. Two complementary views are presented to provide a guide for security and main issues to make them a reality are discussed. As the security at the system and architecture levels is enforced by agility significant aspects related to that point are presented and illustrated through the AES algorithm. the goal of this paper is to make designers aware of that configurable computing is not just hardware accelerators for security primitives as most studies have focused on but a real solution to provide high-security/high-performance for the whole system.

关键词： embedded systems

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Sandbridge software tools

Sandbridge software tools

引用

5th international workshop on embedded computer systems - architectures, modeling, and simulation

作者： Glossner, J Dorward, S Jinturkar, S Moudgill, M Hokenek, E Schulte, M Vassiliadis, S Sandbridge Technol White Plains NY 10512 USA Univ Wisconsin Dept ECE Madison WI 53706 USA Delft Univ Technol Comp Engn Lab Delft Netherlands

ISBN: (纸本)354026969X

We describe the generation of the simulation environment for the Sandbridge Sandblaster multithreaded processor. the processor model is described using the Sandblaster architecture Description Language (SaDL), which is implemented as python objects. Specific processor implementations of the simulation environment are generated by calling the python objects. Using just-in-time compiler technology, we dynamically compile an executing program and processor model to a target platform, providing fast interactive responses with accelerated simulation capability. Using this approach, we simulate up to 100 million instructions per second on a 1 GHz Pentium processor. this allows the system programmer to prototype many applications in real-time within the simulation environment, providing a dramatic increase in productivity and allowing flexible hardware-software trade-offs.

关键词： computer aided software engineering

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Tuning a protocol processor architecture towards DSP operations

Tuning a protocol processor architecture towards DSP operati...

引用

5th international workshop on embedded computer systems - architectures, modeling,, and simulation

作者： Paakkulainen, J Virtanen, S Isoaho, J Univ Turku Dept Informat Technol FIN-20520 Turku Finland Turku Ctr Comp Sci Embedded Syst Lab FIN-20520 Turku Finland

ISBN: (纸本)354026969X

In this paper we present an experiment in enhancing our transport triggered protocol processor hardware platform to support DSP applications. Our focus is on integrating support for both application domains into a single processor without loss of performance in either domain. Such a processor could be taken advantage of. in applications like Voice-over-IP communication using hand-held devices, where functionality is needed from both domains. As our first step in bridging the gap between the protocol processing and DSP domains we implement support for FIR filtering. We analyze four different architectural instances for implementing FIR filters according to their performance and bus utilisation. We were able to determine that protocol processing and DSP operations can be executed in parallel very efficiently. the implementations were verified with VHDL simulations and synthesis using 0.18 mu m CMOS technology.

关键词： Program processors

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LASSO: A grid-enabled simulation optimization framework 05

LASSO: A grid-enabled simulation optimization framework

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6th international workshop on Grid Computing

作者： Tryby, M Mirghani, B Ranjithan, R Mahithakumar, K Baessler, D Karonis, N N Carolina State Univ Dept Civil Engn Raleigh NC 27695 USA

ISBN: (纸本)0780394925

In this paper, we report our experiences developing a grid-enabled framework for solving environmental inverse problems. the solution approach taken here couples environmental simulation models with global search methods and requires the readily available computational resources of the grid for computational tractability. We present a set of results for a ground water release history reconstruction problem, and report significant performance improvements observed for a deployment of the application on the TeraGrid.

关键词： Grid computing Inverse problems Computational modeling computer architecture computer networks Distributed computing Large-scale systems Mathematical model Design engineering Design optimization

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Pattern matching acceleration for network intrusion detection systems

Pattern matching acceleration for network intrusion detectio...

引用

5th international workshop on embedded computer systems - architectures, modeling,, and simulation

作者： Kim, S Hongik Univ Sch Informat & Comp Engn Seoul South Korea

ISBN: (纸本)354026969X

Pattern matching is one of critical parts of Network Intrusion Detection systems (NIDS). Pattern matching is computationally intensive. To handle an increasing number of attack signature patterns, a NIDS require a multi-pattern matching method that can meet the line-speed of packet transfer. the multi-pattern matching method should efficiently handle a large number of patterns with a wide range of pattern lengths and noncase-sensitive pattern matches. It should also be able to process multiple input characters in parallel. In this paper, we propose a multi-pattern matching hardware accelerator based on Shift-OR pattern matching algorithm. We evaluate the performance of the pattern matching accelerator under various assumptions. the performance evaluation shows that the pattern matching accelerator can be more than 80 times faster than the fastest software multi-pattern matching method used in Snort, a widely used open-source NIDS.

关键词： Pattern matching

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Exploiting intra-function correlation with the global history stack

Exploiting intra-function correlation with the global histor...

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5th international workshop on embedded computer systems - architectures, modeling, and simulation

作者： Gao, F Sair, S N Carolina State Univ Dept Elect & Comp Engn Raleigh NC 27695 USA

ISBN: (纸本)354026969X

the demand for more computation power in high-end embedded systems has put embedded processors on parallel evolution track as the RISC processors. Caches and deeper pipelines are standard features on recent embedded microprocessors. As a result of this, some of the performance penalties associated with branch instructions in RISC processors are becoming more prevalent in these processors, As is the case in RISC architectures, designers have turned to dynamic branch prediction to alleviate this problem. Global correlating branch predictors take advantage of the influence past branches have on future ones. the conditional branch outcomes are recorded in a global history register (GHR). Based on the hypothesis that most correlation is among intra-function branches, we provide a detailed analysis of the Global History Stack (GHS) in this paper. the GHS saves the global history in the return address stack when a call instruction is executed. Following the subsequent return, the history is restored from the stack. In addition, to preserve the correlation between the callee branches and the caller branches following the call instruction, we save a few of the history bits coming from the end of the callee's execution. We also investigate saving the GHR of a function in the Branch Target Buffer (BTB) when it returns so that it can be restored when that function is called again. Our results show that these techniques improve the accuracy of several global history based prediction schemes by 4% on average. Consequently, performance improvements as high as 13% are attained.

关键词： embedded systems

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Reconfigurable embedded systems: An application-oriented perspective on architectures and design techniques

Reconfigurable embedded systems: An application-oriented per...

引用

5th international workshop on embedded computer systems: architectures, modeling, and simulation, SAMOS 2005

作者： Glesner, M. Hinkelmann, H. Hollstein, T. Indrusiak, L.S. Murgan, T. Obeid, A.M. Petrov, M. Pionteck, T. Zipf, P. Institute of Microelectronic Systems Darmstadt University of Technology Karlstr. 15 Darmstadt D-64283 Germany

Reconfiguration emerged as a key concept to cope with constraints regarding performance, power consumption, design time and costs posed by the growing diversity of application domains. this work gives an overview of several relevant reconfigurable architectures and design techniques developed by the authors in different projects and emphasizes the effective role of reconfigurability in embedded system design. © Springer-Verlag Berlin Heidelberg 2005.

关键词： embedded systems

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Platform thinking in embedded systems

Platform thinking in embedded systems

引用

5th international workshop on embedded computer systems: architectures, modeling, and simulation, SAMOS 2005

作者： Iannucci, Bob Nokia Research Center Itämerenkatu 11-13 00180 Helsinki Finland

Modern embedded systems are built from microprocessors, domain-specific hardware blocks, communication means, application-specific sensor/actuators and as simple as possible user interface, which hides the embedded complexity. the design of embedded systems is typically done in an integrated way with strong dependencies between these building block elements and between different parts of the system. this talk focuses on how platform thinking and engineering can be applied to increasingly complex embedded systems and what impacts that will have on the design and architectures. Platform engineering in embedded systems may sound contradictory, but in practice will introduce modularity and stable interfaces. New system-level architectures for hardware, middleware architectures, and certifiable operating system micro-kernels are needed to raise the abstraction level and productivity of design. As an example I will go through the definitions of some modules in a mobile device and the requirements for their interfaces. I will describe the additional design steps, new formal methods and system-level tasks that are needed in the platform approach. Finally, I will review the Advanced Research and Technology for embedded and Intelligent systems (ARTEMIS) technology platform in EU 7th Framework Program, which is bringing together industrial and academic groups to create coherent and integrated European research in the domain of embedded systems. © Springer-Verlag Berlin Heidelberg 2005.

关键词： embedded systems

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