In this paper it is shown that complex spatio-temporal phenomena, usually met in physical and biological systems, can be reproduced by means of cellular neural networks of noninteger order. the template parameters are...
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In this paper it is shown that complex spatio-temporal phenomena, usually met in physical and biological systems, can be reproduced by means of cellular neural networks of noninteger order. the template parameters are reported in the paper, together with some simulation results which show the suitability of the approach.
the aim of this paper is to present the technology assessment of the N2C of CoWare inc. approach in the co-design/co-simulation problem. the test bench to be used is a telecommunication application implementing the Me...
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the aim of this paper is to present the technology assessment of the N2C of CoWare inc. approach in the co-design/co-simulation problem. the test bench to be used is a telecommunication application implementing the Medium Access (MAC) layer and the RF-IF part of the Physical (PHY) layer of the DECT protocol stack. these are part of a single-chip solution for the baseband processor of a mobile phone. this approach will be evaluated in comparison withthe current industrial practice. N2C technology aims to fill very specific gaps in existing tool platforms and more specifically: high-level system modeling, HW-SW co-simulation and interface generation. It also supports additional co-design tasks like partitioning and co-synthesis. the final goal of this assessment is to isolate and point out the actual industrial needs for co-design through the evaluation of N2C according to the above characteristics.
this paper presents a modeling approach based on deterministic and stochastic Petri nets (DSPN) for analyzing the performance of node architectures for MIMD multiprocessor systems with distributed memory. DSPN are a n...
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this paper presents a modeling approach based on deterministic and stochastic Petri nets (DSPN) for analyzing the performance of node architectures for MIMD multiprocessor systems with distributed memory. DSPN are a numerically solvable modeling formalism with a graphical representation. the modeling approach supports design decisions for node architectures by providing quantitative results concerning processor and memory utilization for several design alternatives. To illustrate the proposed approach, DSPN of two node architectures are presented and employed for a comparative performance study.
the proceedings contains 22 papers from Sixthinternationalworkshop on Hardware/Software Codesign. Topics discussed include: system-level modeling;partitioning;communication and interface synthesis;co-simulation;sche...
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the proceedings contains 22 papers from Sixthinternationalworkshop on Hardware/Software Codesign. Topics discussed include: system-level modeling;partitioning;communication and interface synthesis;co-simulation;scheduling;system on chip;system level modeling;distributed embeddedsystems;software timing analysis;instruction set simulator;abstract state machine models;instruction subsetting;and task-level memory hierarchy synthesis.
the proceedings contains 44 papers from the 6thinternational Symposium on modeling, Analysis and simulation of computer and Telecommunication systems. Topics discussed include: cache analysis;adaptive object replacem...
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the proceedings contains 44 papers from the 6thinternational Symposium on modeling, Analysis and simulation of computer and Telecommunication systems. Topics discussed include: cache analysis;adaptive object replacement policy;flexible multi-lateral cache simulators;modeling spatial locality;multicast routing protocols;deflection networks;real-time multicast routing;tree-based fault-tolerant multicast;transfer control protocols (TCP);Internet protocols;message delivery systems;link-state alternate path routing;real time resource allocation;binary feedback flow control methods;statistical multiplexing;broadcasting protocols;end-to-end bandwidth regulation methods;and fair queuing algorithms.
this paper describes the design and performance of IDES, a Java-based distributed simulation engine being developed at Sandia National Laboratories. the feasibility of using Java is demonstrated by achieving order of ...
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this paper describes the design and performance of IDES, a Java-based distributed simulation engine being developed at Sandia National Laboratories. the feasibility of using Java is demonstrated by achieving order of magnitude speedup gains, on a model withthree quarters of a million simulated entities, on a `off-the-shelf' system of 56 PentiumPro processors.
In developing a simulator for a new processor architecture, it often is not clear whether it is more efficient to write a new simulator or to modify an existing simulator. Writing a new simulator forces the processor ...
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In developing a simulator for a new processor architecture, it often is not clear whether it is more efficient to write a new simulator or to modify an existing simulator. Writing a new simulator forces the processor architect to develop or adapt all of the related software tools. However, modifying an existing simulator and related tools, which are usually not well-documented, can be time-consuming and error-prone. We describe the SImulator for Multithreaded computerarchitectures (SIMCA) that was developed withthe primary goal of obtaining a functional simulator as quickly as possible to begin evaluating the superthreaded architecture. the performance of the simulator itself was important, but secondary. We achieved our goal using a technique called process-pipelining that exploits the unique features of this new architecture to hide the details of the underlying simulator. this approach allowed us to quickly produce a functional simulator whose performance is only 3.8-4.9 times slower than the base simulator.
We consider an ATM switch model, in which each of N sources is a Markov modulated rate process. We look at some approximations that have been proposed for p, the probability that in steady-state conditions, the buffer...
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We consider an ATM switch model, in which each of N sources is a Markov modulated rate process. We look at some approximations that have been proposed for p, the probability that in steady-state conditions, the buffer content exceeds x. these approximations are compared withthe simulation results for p and the cell-loss ratio.
Conventional analysis techniques of queueing systems typically assume that the stochastic process under study is already in steady state. this assumption is, however, not valid if the life cycle of the process is not ...
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Conventional analysis techniques of queueing systems typically assume that the stochastic process under study is already in steady state. this assumption is, however, not valid if the life cycle of the process is not large enough. Previous work in transient analysis of queueing systems usually focuses on Markov models. this paper, in contrast, presents an analysis technique for investigating transient performance of queueing systemsthat are not necessarily Markovian.
this paper focuses on reducing computing time in large simulation models by replacing some of their elements with analytically determined solutions. In particular, we study realistic analytical server models that incl...
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this paper focuses on reducing computing time in large simulation models by replacing some of their elements with analytically determined solutions. In particular, we study realistic analytical server models that include operating system overhead. this overhead will be determined by measuring the behaviour of a representative workload. In this work, we propose a methodology to reduce the number of measurements based on information provided by an analytical workload model. the calibration of the model is also presented. As workload, the TPC-C benchmark was chosen due to our interest in transactional systems.
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