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检索条件"任意字段=6th International Workshop on Embedded Computer Systems - Architectures, Modeling and Simulation"
361 条 记 录,以下是61-70 订阅
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Reliability-aware virtual data center embedding
Reliability-aware virtual data center embedding
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international workshop on Reliable Networks Design and modeling (RNDM)
作者: Cheng Zuo Hongfang Yu Vishal Anand Education Ministry of China University of Electronic Science and Technology of China Chengdu China Department of Computer Science The State University of New York Brockport NY USA
Virtual data center (VDC) embedding along with designing for fault tolerance is a key problem that needs to be addressed while designing a data center. In this work we propose a new reliability-aware VDC embedding alg...
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High Performance simulations of Kernel P systems
High Performance Simulations of Kernel P Systems
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IEEE international Conference on High Performance Computing and Communications (HPCC)
作者: Mehmet E. Bakir Savas Konur Marian Gheorghe Ionut Niculescu Florentin Ipate Department of Computer Science University of Sheffield Sheffield UK Department of Computer Science University of Bucharest Bucharest Romania
the paper presents the use of a membrane computing model for specifying a synthetic biology pulse generator example and discusses some simulation results produced by the tools associated with this model and compare th... 详细信息
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Modelling and Stochastic simulation of Synthetic Biological Boolean Gates
Modelling and Stochastic Simulation of Synthetic Biological ...
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IEEE international Conference on High Performance Computing and Communications (HPCC)
作者: Daven Sanassy Harold Fellermann Natalio Krasnogor Savas Konur Laurentiu M. Mierla Marian Gheorghe Christophe Ladroue Sara Kalvala School of Computing Science Newcastle University Newcastle Upon Tyne UK School of Computer Science University of Sheffield Sheffield UK School of Computer Science University of Warwick Coventry UK
Synthetic Biology aspires to design, compose and engineer biological systems that implement specified behaviour. When designing such systems, hypothesis testing via computational modelling and simulation is vital in o... 详细信息
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Analysis of critical node attacks in mobile ad hoc networks
Analysis of critical node attacks in mobile ad hoc networks
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international workshop on Reliable Networks Design and modeling (RNDM)
作者: Dongsheng Zhang James P.G. Sterbenz Department of Electrical Engineering and Computer Science The University of Kansas Lawrence KS USA School of Computing and Communications (SCC) and InfoLab21 Lancaster UK
Understanding network behavior under challenges is essential to constructing a resilient and survivable network. Due to the mobility and wireless channel properties, it is more difficult to model and analyze MANETs (m... 详细信息
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SmartMig: A Case for Page Migration and Self-Interleaving for On-Chip Distributed Memory systems
SmartMig: A Case for Page Migration and Self-Interleaving fo...
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IEEE international Conference on High Performance Computing and Communications (HPCC)
作者: Weiwei Fu Mingmin Yuan Tianzhou Chen Qingsong Shi Li Liu Minghui Wu College of Computer Science Zhejiang University Hangzhou Zhejiang P.R. China School of Information Zhejiang Sci-Tech University Hangzhou Zhejiang P.R. China City College Zhejiang University Hangzhou Zhejiang P.R. China
this paper tries to optimize the placements of data pages, which have a strong impact on system performance. We find that both core-to-memory distance and contention on MCs and interconnects are critical. Migrating pa... 详细信息
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modeling and verification of redundancy policies  6
Modeling and verification of redundancy policies
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6th international workshop on Model Based Architecting and Construction of embedded systems, ACESMB 2013 - Co-located with ACM/IEEE 16th international Conference on Model Driven Engineering Languages and systems, MoDELS 2013
作者: Chouh, Hamza Callon, Charlotte Jalal, Ghita Boulanger, Frédéric Taha, Safouan Supélec E3S Computer Science Department France
In this paper, we present a metamodel for specifying redundable software and hardware architectures. this metamodel takes into account the constraints on the number of redundant elements, the number of allowed failure...
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TimeCube: A Manycore embedded Processor with Interference-Agnostic Progress Tracking
TimeCube: A Manycore Embedded Processor with Interference-Ag...
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13th international Conference on embedded computer systems - architectures, modeling and simulation (IC-SAMOS)
作者: Gupta, Anshuman Sampson, Jack Taylor, Michael Bedford Univ Calif San Diego San Diego CA 92103 USA
Recently introduced processors such as Tilera's Tile Gx100 and Intel's 48-core SCC have delivered on the promise of high performance per watt in manycore processors, making these architectures ostensibly as at... 详细信息
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Verilog-based simulation of hardware support for Data-flow concurrency on Multicore systems
Verilog-based simulation of hardware support for Data-flow c...
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13th international Conference on embedded computer systems - architectures, modeling and simulation (IC-SAMOS)
作者: Matheou, George Evripidou, Paraskevas Univ Cyprus Dept Comp Sci Nicosia Cyprus
Data-Driven Multithreading (DDM) is a threaded data-flow model that schedules threads for execution based on data availability. DDM is utilizing a thread Scheduling Unit (TSU) for the management of the threads on sequ... 详细信息
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RAPIDO 2013 - Proc. of the 2013 workshop on Rapid simulation and Performance Evaluation: Methods and Tools, in Conj. with the 8th Intl. Conf. on High-Performance and embedded architectures and Compilers, HiPEAC 2013
RAPIDO 2013 - Proc. of the 2013 Workshop on Rapid Simulation...
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2013 4th workshop on Rapid simulation and Performance Evaluation: Methods and Tools, RAPIDO 2013 - In Conjunction with the 8th Intl. Conference on High-Performance and embedded architectures and Compilers, HiPEAC 2013
the proceedings contain 6 papers. the topics discussed include: Simsys: a performance simulation framework;network-on-chip traffic modeling for data flow applications;exploring alternative flexible OpenCL (FlexCL) cor...
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Mapping of PRP/HSR redundancy protocols onto a configurable FPGA/CPU based architecture
Mapping of PRP/HSR redundancy protocols onto a configurable ...
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2013 13th international Conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2013
作者: Flatt, Holger Jasperneite, Jürgen Dennstedt, Daniel Hung, Tran Dinh Fraunhofer IOSB-INA Application Center Industrial Automation Langenbruch 6 332657 Lemgo Germany Yacoub Automation GmbH Gustav Meyer Allee 25 13355 Berlin Germany
this paper presents the mapping of the seamless redundancy protocols PRP and HSR in combination with IEEE 1588 based clock synchronization onto a configurable CPU/FPGA based Redundancy Box architecture. Whereas core f... 详细信息
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