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检索条件"任意字段=6th Workshop on General Purpose Processor Using Graphics Processing Units, GPGPU 2013"

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Proceedings of the 6th workshop on general purpose processor using graphics processing units, gpgpu 2013

Proceedings of the 6th Workshop on General Purpose Processor...

引用

6th workshop on general purpose processor using graphics processing units, gpgpu 2013

ISBN: (纸本)9781450320177

the proceedings contain 16 papers. the topics discussed include: comparison based sorting for systems with multiple GPUs;reducing divergence in gpgpu programs with loop merging;split tiling for GPUs: automatic parallelization using trapezoidal tiles to reconcile parallelism and locality, avoiding divergence and load imbalance;formalizing address spaces with application to Cuda, OpenCL, and beyond;memory reuse optimizations in the RStream compiler;Valar: a benchmark suite to study the dynamic behavior of heterogeneous systems;input-aware autotuning for directive-based GPU programming;betweenness centrality on GPUs and heterogeneous architectures;atomic-free irregular computations on GPUs;accelerating simulation of agent-based models on heterogeneous architectures;fast dynamic memory allocator for massively parallel architectures;and exploring GPU architectures to accelerate semantic comparison for intention-based search.

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Accelerating financial applications on the GPU 6

Accelerating financial applications on the GPU

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6th workshop on general purpose processor using graphics processing units, gpgpu 2013

作者： Grauer-Gray, Scott Killian, William Searles, Robert Cavazos, John Computer and Information Sciences University of Delaware Newark DE 19716 United States

ISBN: (纸本)9781450320177

the QuantLib library is a popular library used for many areas of computational finance. In this work, the parallel processing power of the GPU is used to accelerate QuantLib financial applications. Black-Scholes, Monte-Carlo, Bonds, and Repo code paths in QuantLib are accelerated using hand-written CUDA and OpenCL codes specifically targeted for the GPU. Additionally, HMPP and OpenACC versions of the applications were created to drive the automatic genera- tion of GPU code from sequential code. the results demon- strate a significant speedup for each code using each paral- lelization method. We were also able to increase the speedup of HMPP-generated code with auto-tuning. Copyright 2013 ACM.

关键词： graphics processing unit

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Valar: A benchmark suite to study the dynamic behavior of heterogeneous systems 6

Valar: A benchmark suite to study the dynamic behavior of he...

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6th workshop on general purpose processor using graphics processing units, gpgpu 2013

作者： Mistry, Perhaad Ukidave, Yash Schaa, Dana Kaeli, David Electrical and Computer Engineering Northeastern University Boston MA United States

ISBN: (纸本)9781450320177

Heterogeneous systems have grown in popularity within the commercial platform and application developer communities. We have seen a growing number of systems incorporating CPUs, graphics processors (GPUs) and Accelerated processing units (APUs combine a CPU and GPU on the same chip). these emerging class of platforms are now being targeted to accelerate applications where the host processor (typically a CPU) and compute device (typically a GPU) cooperate on a computation. In this scenario, the performance of the application is not only dependent on the processing power of the respective heterogeneous processors, but also on the efficient interaction and communication between them. To help architects and application developers to quantify many of the key aspects of heterogeneous execution, this paper presents a new set of benchmarks called the Valar. the Valar benchmarks are applications specifically chosen to study the dynamic behavior of OpenCL applications that will benefit from host-device interaction. We describe the general characteristics of our benchmarks, focusing on specific characteristics that can help characterize heterogeneous applications. For the purposes of this paper we focus on OpenCL as our programming environment, though we envision versions of Valar in additional heterogeneous programming languages. We profile the Valar benchmarks based on their mapping and execution on different heterogeneous systems. Our evaluation examines optimizations for host-device communication and the effects of closely-coupled execution of the benchmarks on the multiple OpenCL devices present in heterogeneous systems. Copyright 2013 ACM.

关键词： graphics processing unit

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Warp size impact in GPUs: Large or small? 6

Warp size impact in GPUs: Large or small?

引用

6th workshop on general purpose processor using graphics processing units, gpgpu 2013

作者： Lashgar, Ahmad Baniasadi, Amirali Khonsari, Ahmad School of ECE University of Tehran Iran ECE Department University of Victoria Canada Institute for Research in Fundamental Sciences School of Computer Science Iran

ISBN: (纸本)9781450320177

there are a number of design decisions that impact a GPU's performance. Among such decisions deciding the right warp size can deeply influence the rest of the design. Small warps reduce the performance penalty associated with branch divergence at the expense of a reduction in memory coalescing. Large warps enhance memory coalescing significantly but also increase branch divergence. this leaves designers with two choices: use small warps and invest in finding new solutions to enhance coalescing or use large warps and address branch divergence employing effective control-flow solutions. In this work our goal is to investigate the answer to this question. We analyze warp size impact on memory coalescing and branch divergence. We use our findings to study two machines: a GPU using small warps but equipped with excellent memory coalescing (SW+) and a GPU using large warps but employing an MIMD engine immune from control-flow costs (LW+). Our evaluations show that building coalescing-enhanced small warp GPUs is a better approach compared to pursuing a controlflow enhanced large warp GPU. Copyright 2013 ACM.

关键词： graphics processing unit

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Comparison based sorting for systems with multiple GPUs 6

Comparison based sorting for systems with multiple GPUs

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6th workshop on general purpose processor using graphics processing units, gpgpu 2013

作者： Tanasic, Ivan Vilanova, Lluís Jordà, Marc Cabezas, Javier Gelado, Isaac Navarro, Nacho Hwu, Wen-Mei Barcelona Supercomputing Center Spain Universitat Politecnica de Catalunya Spain University of Illinois United States

ISBN: (纸本)9781450320177

As a basic building block of many applications, sorting algorithms that efficiently run on modern machines are key for the performance of these applications. With the recent shift to using GPUs for general purpose compuing, researches have proposed several sorting algorithms for single-GPU systems. However, some workstations and HPC systems have multiple GPUs, and applications running on them are de- signed to use all available GPUs in the system. In this paper we present a high performance multi-GPU merge sort algorithm that solves the problem of sorting data distributed across several GPUs. Our merge sort algorithm first sorts the data on each GPU using an existing single- GPU sorting algorithm. then, a series of merge steps pro- duce a globally sorted array distributed across all the GPUs in the system. this merge phase is enabled by a novel pivot selection algorithm that ensures that merge steps always distribute data evenly among all GPUs. We also present the implementation of our sorting algorithm in CUDA, as well as a novel inter-GPU communication technique that enables this pivot selection algorithm. Experimental results show that an efficient implementation of our algorithm achieves a speed up of 1.9x when running on two GPUs and 3.3x when running on four GPUs, compared to sorting on a single GPU. At the same time, it is able to sort two and four times more records, compared to sorting on one GPU. Copyright 2013 ACM.

关键词： graphics processing unit

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Message from the workshop organizers

ACM International Conference Proceeding Series

引用

ACM International Conference Proceeding Series 2013年

作者： Cavazos, John Kaeli, Dave

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Formalizing address spaces with application to Cuda, OpenCL, and beyond 6

Formalizing address spaces with application to Cuda, OpenCL,...

引用

6th workshop on general purpose processor using graphics processing units, gpgpu 2013

作者： Gaster, Benedict R. Howes, Lee Advanced Micro Devices 1 AMD Sunnyvale CA United States

ISBN: (纸本)9781450320177

Cuda and OpenCL are aimed at programmers developing parallel applications targeting GPUs and embedded micro-processors. these systems often have explicitly managed memories exposed directly though a notion of disjoint address spaces. OpenCL address spaces are based on a similar concept found in Embedded C. A limitation of OpenCL is that a specific pointer must be assigned to a particular address space and thus functions, for example, must say which pointer arguments point to which address spaces. this leads to a loss of composability and moreover can lead to implementing multiple versions of the same function. this problem is compounded in the OpenCL C++ variant where a class' implicit this pointer can be applied to multiple address spaces. Modern GPUs, such as AMD's graphics Core Next and Nvidia's Fermi, support an additional generic address space that dynamically determines an address' disjoint address space, submitting the correct load/store operation to the particular memory subsystem. Generic address spaces allow for dynamic casting between generic and non-generic address spaces that is similar to the dynamic subtyping found in objected oriented languages. the advantage of the generic address space is it simplifies the programming model but sometimes at the cost of decreased performance, both dynamically and due to the optimization a compiler can safely perform. this paper describes a new type system for inferring Cuda and OpenCL style address spaces. We show that the address space system can be inferred. We extend this base system with a notion of generic address space, including dynamic casting, and show that there also exists a static translation to architectures without support for generic address spaces but comes at a potential performance cost. this performance cost can be reclaimed when an architecture directly supports generic address space. Copyright 2013 ACM.

关键词： graphics processing unit

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