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检索条件"任意字段=6th Workshop on Irregular Applications: Architectures and Algorithms, IA3 2016"

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Proceedings of ia3 2016 - 6th workshop on irregular applications: architectures and algorithms, Held in conjunction with SC 2016: the International Conference for High Performance Computing, Networking, Storage and Analysis

Proceedings of IA3 2016 - 6th Workshop on Irregular Applicat...

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6th workshop on irregular applications: architectures and algorithms, ia3 2016

ISBN: (纸本)9781509038671

the proceedings contain 14 papers. the topics discussed include: highly scalable near memory processing with migrating threads on the emu system architecture;parallel interval stabbing on the automata processor;an optimized multicolor point-implicit solver for unstructured grid applications on graphics processing units;optimizing sparse tensor times matrix on multi-core and many-core architectures;compiler transformation to generate hybrid sparse computations;an OpenCL framework for distributed apps on a multidimensional network of FPGAs;fast parallel cosine K-nearest neighbor graph construction;performance evaluation of parallel sparse tensor decomposition implementations;implementation and evaluation of data-compression algorithms for irregular-grid iterative methods on the PEZY-SC processor;dynamic load balancing for high-performance graph processing on hybrid CPU-GPU platforms;a fast level-set segmentation algorithm for image processing designed for parallel architectures;HISC/R: an efficient hypersparse-matrix storage format for scalable graph processing;optimized distributed work-stealing;and fine-grained parallelism in probabilistic parsing with Habanero Java.

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Optimizing Sparse Tensor Times Matrix on Multi-core and Many-core architectures 6

Optimizing Sparse Tensor Times Matrix on Multi-core and Many...

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6th workshop on irregular applications - Architecture and algorithms (ia3)

作者： Li, Jiajia Ma, Yuchen Yan, Chenggang Vuduc, Richard Georgia Inst Technol Computat Sci & Engn Atlanta GA 30332 USA Hangzhou Dianzi Univ Inst Informat & Control Hangzhou Zhejiang Peoples R China

ISBN: (纸本)9781509038671

this paper presents the optimized design and implementation of sparse tensor-times-dense matrix multiply (SpTTM) for CPU and GPU platforms. this primitive is a critical bottleneck in data analysis and mining applications based on tensor methods, such as the Tucker decomposition. We first design and implement sequential SpTTM to avoid explicit data transformations between a tensor and a matrix, which is the conventional approach. We further optimize SpTTM on multicore CPU and GPU systems by parallelizing, avoiding locks, and exploiting data locality. Our sequential SpTTM is up to 3.5x faster than the SpTTM from Tensor Toolbox and 1.5x over that from Cyclops Tensor Framework. Our parallel algorithms show 4.1x speedup on multicore Intel Core i7 and 18.8x speedup on NVIDia K40c GPU over our sequential SpTTM respectively.

关键词： Tensors

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A Fast Level-Set Segmentation Algorithm for Image Processing Designed For Parallel architectures 6

A Fast Level-Set Segmentation Algorithm for Image Processing...

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6th workshop on irregular applications - Architecture and algorithms (ia3)

作者： Gutierrez, Julian Nina-Paravecino, Fanny Kaeli, David Northeastern Univ Dept Elect & Comp Engn Boston MA 02115 USA

ISBN: (纸本)9781509038671

Among the many choices to perform image segmentation, Level-Set Methods have demonstrated great potential for unstructured images. However, the usefulness of Level-Set Methods have been limited by their irregular workload characteristics such as high degree of branch divergence and input dependencies, as well as the high computational costs required to solve partial differential equations (PDEs). \In this paper, we propose a novel algorithm for Level-Set Segmentation that first divides the pixels from an image into 4 categories. then we traverse each image curve to obtain the final contour. the first two categories drive the inward evolution of the curve, while the remaining two drive the outward evolution of the curve. Using our categorization, we avoid solving PDEs and perform the evolution with an optimized flood-fill algorithm. Leveraging recently-introduced CUDA features that include dynamic parallelism and concurrent kernel execution, we can accelerate this algorithm on an NVDia GPU. Our results show we can obtain benefits across a variety of input sizes. We can achieve a speedup greater than 56x with our CUDA optimized implementation run on a K20m GPU as compared to an OpenMP parallel implementation executed on a 16-core Intel Xeon E2560 SandyBridge CPU.

关键词： Graphics processing unit

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An Optimized Multicolor Point-Implicit Solver for Unstructured Grid applications on Graphics Processing Units 6

An Optimized Multicolor Point-Implicit Solver for Unstructur...

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6th workshop on irregular applications - Architecture and algorithms (ia3)

作者： Zubair, Mohammad Nielsen, Eric Luitjens, Justin Hammond, Dana Old Dominion Univ Dept Comp Sci Norfolk VA 23324 USA NASA Langley Res Ctr Computat AeroSci Branch Hampton VA 23665 USA NVIDIA Corp Santa Clara CA USA

ISBN: (纸本)9781509038671

In the field of computational fluid dynamics, the Navier-Stokes equations are often solved using an unstructured-grid approach to accommodate geometric complexity. Implicit solution methodologies for such spatial discretizations generally require frequent solution of large tightly-coupled systems of block-sparse linear equations. the multicolor point-implicit solver used in the current work typically requires a significant fraction of the overall application run time. In this work, an efficient implementation of the solver for graphics processing units is proposed. Several factors present unique challenges to achieving an efficient implementation in this environment. these include the variable amount of parallelism available in different kernel calls, indirect memory access patterns, low arithmetic intensity, and the requirement to support variable block sizes. In this work, the solver is reformulated to use standard sparse and dense Basic Linear Algebra Subprograms (BLAS) functions. However, experiments show that the performance of the BLAS functions available in existing CUDA libraries is suboptimal for matrices representative of those encountered in actual simulations. Instead, optimized versions of these functions are developed. Depending on block size, the new implementations show performance gains of up to 7x over the existing CUDA library functions.

关键词： Graphics processing unit

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Implementation and evaluation of data-compression algorithms for irregular-grid iterative methods on the PEZY-SC processor 6

Implementation and evaluation of data-compression algorithms...

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6th workshop on irregular applications - Architecture and algorithms (ia3)

作者： Yoshifuji, Naoki Sakamoto, Ryo Nitadori, Keigo Makino, Jun Fixstars Shinagawa Ku 18F GateCity Osaki W Tower1-11-1 Osaki Tokyo 1410032 Japan PEZY Comp Chiyoda Ku 5F Chiyoda Ogawamachi Crosta1-11 Kanda Ogawamac Tokyo 1010052 Japan RIKEN AICS Chuo Ku 7-1-26 Minatojima minami machi Kobe Hyogo 6500047 Japan Kobe Univ Dept Planetol Nada Ku 1-1 Rokko Dai Kobe Hyogo 6578501 Japan

ISBN: (纸本)9781509038671

Iterative methods on irregular grids have been used widely in all areas of comptational science and engineering for solving partial differential equations with complex geometry. they provide the flexibility to express complex shapes with relatively low computational cost. However, the direction of the evolution of high-performance processors in the last two decades have caused serious degradation of the computational efficiency of iterative methods on irregular grids, because of relatively low memory bandwidth. Data compression can in principle reduce the necessary memory memory bandwidth of iterative methods and thus improve the efficiency. We have implemented several data compression algorithms on the PEZY-SC processor, using the matrix generated for the HPCG benchmark as an example. For the SpMV (Sparse Matrix-Vector multiplication) part of the HPCG benchmark, the best implementation without data compression achieved 11.6Gflops/chip, close to the theoretical limit due to the memory bandwidth. Our implementation with data compression has achieved 32.4Gflops. this is of course rather extreme case, since the grid used in HPCG is geometrically regular and thus its compression efficiency is very high. However, in real applications, it is in many cases possible to make a large part of the grid to have regular geometry, in particular when the resolution is high. Note that we do not need to change the structure of the program, except for the addition of the data compression/decompression subroutines. thus, we believe the data compression will be very useful way to improve the performance of many applications which rely on the use of irregular grids.

关键词： Finite Element Analysis Sparse Matrices Data Compression

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High level abstractions and automatic optimization techniques for the programming of irregular algorithms

High level abstractions and automatic optimization technique...

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workshop on irregular applications: Architecture and algorithms (ia3)

作者： David Padua University of Illinois College of Law Champaign IL US

ISBN: (纸本)9781509038688

Summary form only given. High-performing irregular algorithms are typically implemented using simple operations and conventional control structures. In addition, due to today's compilers inability to manipulate these implementations, program tuning must usually be done by hand. Better notations and automatic optimization would help improve programmer productivity, portability, and maintainability. this talk will review high-level notation proposals for the description of irregular algorithms, as well as compiler and autotuning techniques for the optimization of these algorithms. A short discussion of open research problems and necessary conditions for adoption of these more advanced notations and strategies will conclude the presentation.

关键词： Conferences Optimization Parallel processing Computer architecture Programming Program processors

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Optimizing Sparse Tensor Times Matrix on Multi-core and Many-Core architectures

Optimizing Sparse Tensor Times Matrix on Multi-core and Many...

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workshop on irregular applications: Architecture and algorithms (ia3)

作者： Jiajia Li Yuchen Ma Chenggang Yan Richard Vuduc Computational Science & Engineering Georgia Institute of Technology Atlanta Georgia Institute of Information and Control Hangzhou Dianzi University Hangzhou China

ISBN: (纸本)9781509038688

this paper presents the optimized design and implementation of sparse tensor-times-dense matrix multiply (SpTTM) for CPU and GPU platforms. this primitive is a critical bottleneck in data analysis and mining applications based on tensor methods, such as the Tucker decomposition. We first design and implement sequential SpTTM to avoid explicit data transformations between a tensor and a matrix, which is the conventional approach. We further optimize SpTTM on multicore CPU and GPU systems by parallelizing, avoiding locks, and exploiting data locality. Our sequential SpTTM is up to 3.5× faster than the SpTTM from Tensor Toolbox and 1.5× over that from Cyclops Tensor Framework. Our parallel algorithms show 4.1× speedup on multicore Intel Core i7 and 18.8× speedup on NVIDia K40c GPU over our sequential SpTTM respectively.

关键词： Tensile stress Sparse matrices Matrix decomposition Indexes Multicore processing Graphics processing units Data analysis

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A Fast Level-Set Segmentation Algorithm for Image Processing Designed For Parallel architectures

A Fast Level-Set Segmentation Algorithm for Image Processing...

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workshop on irregular applications: Architecture and algorithms (ia3)

作者： Julian Gutierrez Fanny Nina-Paravecino David Kaeli Dept. of Electrical and Computer Engineering Northeastern University Boston MA

ISBN: (纸本)9781509038688

Among the many choices to perform image segmentation, Level-Set Methods have demonstrated great potential for unstructured images. However, the usefulness of Level-Set Methods have been limited by their irregular workload characteristics such as high degree of branch divergence and input dependencies, as well as the high computational costs required to solve partial differential equations (PDEs).In this paper, we propose a novel algorithm for Level-Set Segmentation that first divides the pixels from an image into 4 categories. then we traverse each image curve to obtain the final contour. the first two categories drive the inward evolution of the curve, while the remaining two drive the outward evolution of the curve. Using our categorization, we avoid solving PDEs and perform the evolution with an optimized flood-fill *** recently-introduced CUDA features that include dynamic parallelism and concurrent kernel execution, we can accelerate this algorithm on an NVDia GPU. Our results show we can obtain benefits across a variety of input sizes. We can achieve a speedup greater than 56x with our CUDA optimized implementation run on a K20m GPU as compared to an OpenMP parallel implementation executed on a 16-core Intel Xeon E2560 SandyBridge CPU.

关键词： Heuristic algorithms Graphics processing units Parallel processing Kernel Fractals Optimization Instruction sets

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Implementation and Evaluation of Data-Compression algorithms for irregular-Grid Iterative Methods on the PEZY-SC Processor

Implementation and Evaluation of Data-Compression Algorithms...

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workshop on irregular applications: Architecture and algorithms (ia3)

作者： Naoki Yoshifuji Ryo Sakamoto Keigo Nitadori Jun Makino Fixstars Tokyo Japan RIKEN AICS Hyogo Japan Department of Planetology Kobe University Kobe Japan

ISBN: (纸本)9781509038688

关键词： Data compression Benchmark testing Bandwidth Sparse matrices Electronic mail Hardware Clocks

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An Optimized Multicolor Point-Implicit Solver for Unstructured Grid applications on Graphics Processing Units

An Optimized Multicolor Point-Implicit Solver for Unstructur...

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workshop on irregular applications: Architecture and algorithms (ia3)

作者： Mohammad Zubair Eric Nielsen Justin Luitjens Dana Hammond Department of Computer Science Old Dominion University Norfolk Virginia Computational AeroSciences Branch NASA Langley Research Center Hampton Virginia NVIDIA Corporation California

ISBN: (纸本)9781509038688

关键词： Image color analysis Mathematical model Sparse matrices Graphics processing units Libraries Linear systems Parallel processing

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