CCGrid' 2007, the 7th IEEE International Symposium on Cluster computing and the Grid was held in Rio de Janeiro, Brazil, on May 14 17, 2007. CCGrid has become a premium conference of truly international coverage, ...
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CCGrid' 2007, the 7th IEEE International Symposium on Cluster computing and the Grid was held in Rio de Janeiro, Brazil, on May 14 17, 2007. CCGrid has become a premium conference of truly international coverage, bringing together researchers and practitioners, enabling them to share their insight, results, and experience in the multi-faceted areas of Grid and cluster computing. the whole conference experience consisted of more than its strong technical program and also included three keynote speeches by scholars. there were seven workshops on emerging topics like the IEEE Technical Committee on Scalable computing Doctoral Symposium, Agent-based Grid computing and Context-Awareness and Mobility in Grid computing. the paper by K. EL Maghraoui focused on adaptability for iterative MPI applications as adaptability enables a parallel application's execution system to split or merge processes, thereby modifying the executed program's granularity.
In this paper, we present a Statically Adaptive Hybrid Transactional Memory (StAdHyTM) that outperforms not only existing Hardware TM (HTM) and Software TM (STMs) but also common synchronization schemes such as locks....
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ISBN:
(纸本)9781509042289
In this paper, we present a Statically Adaptive Hybrid Transactional Memory (StAdHyTM) that outperforms not only existing Hardware TM (HTM) and Software TM (STMs) but also common synchronization schemes such as locks. StAdHyTM is statically tuned to adapt to the application behavior to improve the performance. We focus in particular on large parallel graph applications. Our StAdHyTM implementation outperforms coarse-grain locks by up to 8.1x and STM by up to 2.6x in total execution time for computation kernel in the SSCA-2 benchmark. It also outperforms HTM by up to 2.1x on a 28-cores and 64GB machine. We tested large graphs of up to 268 million vertices and 2.147 billion edges on a 64-core and 128 GB machine. To the best of our knowledge, this work is the first sc a lability study of synchronizations involving all the TM implementations-HTM, STM, HyTM, and Adaptive HyTM.
this work faces the role of HW/SW Design Space Exploration for heterogeneous parallel embedded systems subject to mixed-criticality requirements, extended to consider also hypervisor technologies. In particular, it pr...
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ISBN:
(纸本)9781538656839
this work faces the role of HW/SW Design Space Exploration for heterogeneous parallel embedded systems subject to mixed-criticality requirements, extended to consider also hypervisor technologies. In particular, it presents an evolutionary approach integrated into a reference Electronic System-Level HW/SW Co-Design flow able to consider and evaluate design alternatives while exploiting also Hypervisor-based SW partitions. Finally, some experimental results show the effectiveness of the proposed approach.
Withthe rapid development of the cloud computing, massive information is distributed in the structure "cloud storage", leading to the heterogeneous data sources, and the "lost phenomenon" may occu...
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ISBN:
(纸本)9781479966363
Withthe rapid development of the cloud computing, massive information is distributed in the structure "cloud storage", leading to the heterogeneous data sources, and the "lost phenomenon" may occur in the process of information retrieval. To solve this problem, this paper builds the heterogeneous data integration model in the cloud computing environment, which includes three layers and five function modules: data acquisition and analysis interface in the cloud, data organization task scheduling engine, and heterogeneous data integrated interface based on the ontology. Also, common technologies used in unified retrieval of heterogeneous data resources are presented in this paper, such as parallel retrieval technology, server cluster retrieval technology, webpage's deep mining technology and retrieval database sharing technology.
this paper presents the full-wave characterization of lossy substrate integrated circuits (SICs) based on the dyadic Green's function of the parallel plate waveguide. SICs are considered as an ensemble of conducti...
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ISBN:
(纸本)9788890701832;9781467321877
this paper presents the full-wave characterization of lossy substrate integrated circuits (SICs) based on the dyadic Green's function of the parallel plate waveguide. SICs are considered as an ensemble of conducting post placed in a parallel-plate waveguide. the field inside the parallel plate is expressed in terms of cylindrical vector wave-functions and considering the scattering from the ensemble of conducting posts. Finite conductivity of the top and of the bottom plates, and of the metallic vias are taken into account. Losses into the dielectric substrate are also included. Coaxial ports are considered as sources and self and mutual admittances are evaluated. Cases of practical structure taken from literature are presented showing a very good agreement withthe most used commercial software.
Withthe continuous deepening of the modeling, simulation and optimization applications of satellite navigation systems, there is an increasing demand for computing power. the method of improving the calculation abili...
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ISBN:
(纸本)9781728132990
Withthe continuous deepening of the modeling, simulation and optimization applications of satellite navigation systems, there is an increasing demand for computing power. the method of improving the calculation ability by increasing the main frequency is difficult to meet the requirements of the top-level optimization design and simulation verification of the system. By means of the basic theory of parallelcomputing of navigation complex information network and the key technology of CPU multi-core parallel simulation engine, the simulation running state equivalent to the actual system can be designed efficiently as simulation operation scene of the experiment.
Scheduling algorithm for parallel processes in multi-core systems, aimed at reducing the number of data exchanges between processor cores is offered. the possibility of using the proposed algorithm in the development ...
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