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th-CluFS: an open platform cluster file system

TH-CluFS: an open platform cluster file system

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IEEE international conference on algorithms and architectures for parallel processing (ICAP)

作者： Qifeng Huang Weimin Zheng Meiming Shen Department of Computer Science and Technology Tsinghua University Beijing China

ISBN: (纸本)0769515126

In this paper, we present the design and implementation of a new cluster file system, th-CluFS, which is based on the standard NFS protocol and is implemented in the user level space completely. this open platform file system is important as the clusters become larger and heterogeneous. To take advantages of the accumulated resources and high-speed network in clusters, th-CluFS follows a serverless architecture, hybrid distributed metadata management, and file granular data distribution, and it uses distributed metadata cache and unique cache to optimize performance. For the flexibility of th-CluFS, we plan to employ file migration to balance I/O load across nodes dynamically. According to the experiment results, we conclude that th-CluFS can meet the requirements of consistent file system view, performance and scalability gracefully.

关键词： File systems Load management Scalability Space technology High-speed networks Computer networks Concurrent computing High performance computing Kernel Computer science

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parallel external selection algorithm on distributed memory systems

Parallel external selection algorithm on distributed memory ...

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IEEE international conference on algorithms and architectures for parallel processing (ICAP)

作者： Cheng Zhong Guoliang Chen Chao Yan Department of Computer Science University of Science and Technology Hefei China School of Computer and Information Engineering Guangxi University Nanning China

ISBN: (纸本)0769515126

the external selection problem is to select the record with the K-th smallest key from the given N records that are distributed and stored evenly on the D disks for the parallel machine with D processors. Each processor has its own primary memory of size M records and one disk, where N/D>M. the processors are connected with a /spl radic/D /spl times/ /spl radic/D mesh architecture. Based on a two-stage approach, this paper presents an efficient parallel external selection algorithm for the distributed-memory parallel systems. First, all the processors execute local external sorting in parallel, each processor sorts the N/D records on its own disk. Next, they execute parallel external selection from the D sorted sub-files on the D disks. this algorithm is asymptotically optimal and has a small constant factor of time complexity.

关键词： Sorting parallel machines Algorithm design and analysis Chaos Computer science parallel algorithms Internet Databases Artificial intelligence Statistics

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9th international conference on High Performance Computing, HiPC 2002

引用

9th international conference on High Performance Computing, HiPC 2002

ISBN: (纸本)3540003037

the proceedings contain 70 papers. the special focus in this conference is on High Performance Computing. the topics include: High-performance computing and visualization;2-d wavelet transform enhancement on general-purpose microprocessors;a general data layout for distributed consistency in data parallel applications;duplication-based scheduling algorithm for interconnection-constrained distributed memory machines;evaluating arithmetic expressions using tree contraction;a mechanism to reduce i-cache power consumption in high performance microprocessors;exploiting web document structure to improve storage management in proxy caches;high performance multiprocessor architecture design methodology for application-specific embedded systems;a low latency messaging infrastructure for Linux clusters;low-power high-performance adaptive computing architectures for multimedia processing;a technique to construct high performance CORBA applications;automatic search for performance problems in parallel and distributed programs by using multi-experiment analysis;an adaptive value-based scheduler and its RT-Linux implementation;effective selection of partition sizes for moldable scheduling of parallel jobs;runtime support for multigrain and multiparadigm parallelism;a fully compliant openMP implementation on software distributed shared memory;a fast connection-time redirection mechanism for internet application scalability;an efficient resource sharing scheme for dependable real-time communication in multihop networks;improving web server performance by network aware data buffering and caching;wraps scheduling and its efficient implementation on network processors;performance comparison of pipelined hash joins on workstation clusters and iterative algorithms on heterogeneous network computing.

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Improved ARAM for PARIS, an original programmable vision chip

Improved ARAM for PARIS, an original programmable vision chi...

引用

IEEE international Workshop on Cellular Nanoscale Networks and their Applications, (CNNA)

作者： A. Nshare J.-O. Klein A. Dupret IEF Université Paris-Sud CNRS UMR Orsay France

In this paper, a high accuracy analog random access memory (ARAM) for programmable vision chips is addressed. In the context of a large retina, the main sources of error are analyzed. Several architectures are present... 详细信息

关键词： Retina Circuits Image processing Analog computers parallel processing CMOS technology Computer architecture Silicon Electronic mail parallel machines

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Validated cost models for parallel OQL query processing 8th

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8th international conference on Object-Oriented Information Systems, OOIS 2002

作者： Mendes Sampaio, Sandra de F. Paton, Norman W. Smith, Jim Watson, Paul Department of Computer Science University of Manchester ManchesterM13 9PL United Kingdom Department of Computing Science University of Newcastle upon Tyne NewcastleNE1 7RU United Kingdom

ISBN: (纸本)3540440879

Query cost models are widely used, both for performance analysis and for comparing execution plans during query *** essence, a cost model predicts where time is being spent during query evaluation. Although many cost models have been proposed, for serial,parallel and distributed database systems, surprisingly few of these have been validated against real systems. this paper presents cost models forthe parallel evaluation of ODMG OQL queries, which have been compared with experimental results obtained using the Polar object database system. the paper describes the validation of the cost model for a collection of queries, using three join algorithms over the OO7 benchmark database. the results show that the cost model generally both ranks alternative plans appropriately, and gives a useful indication of the response times that can be expected from a plan. the paper also illustrates the application of the cost model by highlighting the contributions of different features and operations to query response times. © Springer-Verlag Berlin Heidelberg 2002

关键词： Distributed database systems

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Development of resource monitoring for efficient parallel motion estimation

Development of resource monitoring for efficient parallel mo...

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international conference on Control, Automation, Robotics and Vision (ICARCV)

作者： T.S. Gunawan Cai Wen Tong School of Computer Engineering Nanyang Technological University Singapore

In the past few years, cluster computing has been accepted widely as parallel platform because of its high performance at an affordable cost. To maximize the use of available resources, resource monitoring for cluster computing is required. the resource information collected can be used by any parallel applications, i.e. parallel motion estimation, for handling variation of available resources in typical time-sharing computers. therefore, the computing load can be distributed properly among n processors. In this paper, we present the development of resource monitoring for cluster computing using MPI programming model to achieve efficient parallel motion estimation. Results show the effectiveness of our method in which the faster parallel execution time can be achieved.

关键词： Motion estimation Concurrent computing Computerized monitoring Time sharing computer systems Central processing Unit Random access memory Costs parallel programming Availability Read-write memory

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Recursive filters using systolic architectures and switched capacitor techniques

Recursive filters using systolic architectures and switched ...

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IEEE international conference on Electronics, Circuits and Systems (ICECS)

作者： D. Chikouche R.E. Bekka A. Boucenna Département d Electronique Faculté des Sciences de IIngénieur Université de Satif Setif Algeria

In this paper, the discrete state space recursive filters are implemented in the form of parallel array processors. the state space description permits the straightforward application of systolic architectures to realize recursive filters of 1D and 2D types. We show that the recursivity inherent to the filtering algorithm introduces a latency proportional to the filter order. Moreover, we show that the use of the CTP decomposition technique together with the cylindrical-type structures reduces significantly this latency and improves the computation throughput of these arrays. the processing cells of the systolic array are designed via switched-capacitor techniques.

关键词： Filters Capacitors State-space methods Computer architecture throughput Equations Filtering algorithms Delay Systolic arrays Process design

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An efficient 3-bit-scan multiplier without overlapping bits, and its 64/spl times/64 bit implementation

An efficient 3-bit-scan multiplier without overlapping bits,...

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Asia and South Pacific Design Automation conference

作者： Hak-soo Yu J.A. Abraham Computer Engineering Research Center University of Texas Austin Austin TX USA

ISBN: (纸本)0769514413

In this paper, we present an efficient 3-bit-scan multiplier without overlapping bits which has good power-delay area trade-offs. Generation of partial product terms in this multiplier is performed in parallel with the multiplication operation. parallel partial product generation results in a multiplier which is faster than conventional sequential multipliers. the architecture of the 3-bit-scan multiplier without overlapping bits is therefore suitable for synchronous sequential multipliers which are required to operate at low power and at relatively high speed for their area.

关键词： Signal processing algorithms Jacobian matrices Power engineering computing Power engineering and energy Costs Signal processing Personal digital assistants Logic Read only memory Footwear industry

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A new divide and conquer method for achieving high speed division in hardware

A new divide and conquer method for achieving high speed div...

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Asia and South Pacific Design Automation conference

作者： M. Mohan K. Rohini A. Kumar M. Balakrishnan Dept. of Computer Science & Engg. Indian Institute of Technology New Delhi INDIA Indian Institute of Technology Delhi New Delhi Delhi IN

ISBN: (纸本)0769514413

Presents a new method of performing division in hardware and explores different ways of implementing it. this method involves computing a preliminary estimate of the quotient by splitting the dividend, performing division of each of the parts in parallel and merging them. the estimate is refined iteratively to get the final quotient. this method is significantly fast since it carries out parallel operations to compute the preliminary quotient and makes use of a fast multiplier to refine the result. It is possible to pipeline the execution of the unit yielding further increase in throughput. Speed estimates show that this method yields a much higher throughput than other fast methods, while area and latency are comparable.

关键词： Hardware throughput Concurrent computing Yield estimation Delay parallel processing Iterative algorithms Computer science Merging Pipelines

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Improving meetings by identifying informal roles played by participants

Improving meetings by identifying informal roles played by p...

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international conference on Computer Supported Cooperative Work in Design

作者： M.R.S. Borges S. Mendes C.L.R. Motta Núcleo de Computação Eletrônica & Instituto de Matemática Universidade Federal do Rio de Janeiro Rio de Janeiro Brazil

the efficiency of a meeting has a lot to do with the attitudes the participants have towards the meeting goals. the outcome of a meeting is very dependent on how the meeting participants behave, i.e., how they assume expected roles. We can select participants based on their ability to play the desired roles prior to the meeting, or we can later try to examine the participants' behavior by analyzing their interventions during the meeting. this paper discusses this latter approach and suggests a semantic network analysis to map interventions onto roles, defined as essential to a good team performance.

关键词： Psychology Psychometric testing Performance analysis parallel processing Constitution

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