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international conference on Digital Signal processing (DSP)

作者： I. Dimkoviae D. Milovanoviae Z. Bojkoviae PsyTEL Research Belgrade Serbia Faculty of Elcclrical Engineering Belgrade Serbia

An optimized software implementation of a high quality MPEG AAC-LC (low complexity) audio encoder is presented in this paper. the standard reference encoder is improved by utilizing several algorithmic optimizations (fast psycho-acoustic model, new tonality estimation, new time domain block switching, optimized quantizer and Huffman coder) and very careful code optimizations for PC CPU architectures with SIMD (single-instruction-multiple-data) instruction set. the psychoacoustic model used the MDCT filterbank for energy estimation and peak detection as a measure of tonality. Block size decision is based on local perceptual entropies as well as LPC analysis of the time signal. Algorithmic optimizations in the quantizer include loop control module modification and optimized Huffman search. Code optimization is based on parallel processing by replacing vector algebra and math junctions with their optimized equivalents with Intel/sup /spl reg// Signal processing Library (SPL). the implemented codec outperforms consumer MP3 encoders at 30% less bitrate at the same time achieving encoding times several times faster than real-time.

关键词： Signal processing algorithms Psychoacoustic models Software quality Code standards Psychology Filter bank Energy measurement Entropy Linear predictive coding Signal analysis

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Road feature extraction using a 2D LMS

Road feature extraction using a 2D LMS

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international conference on Control, Automation, Robotics and Vision (ICARCV)

作者： K.R.S. Kodagoda W.S. Wijesoma A.P. Balasuriya School of Electrical and Electronic Engineering Nanyang Technological University Singapore

In most urban roads, and similar environments such as in the theme parks, campus sites, industrial estates, science parks and the like, the painted lane markings that exist may not be easily discernible by CCD cameras due to poor lighting, bad weather conditions and inadequate maintenance. An important feature of roads in such environments is the existence of pavements or curbs on either side defining the road boundaries. these curbs, which are mostly parallel to the road, can be harnessed to extract useful features of the road for implementing autonomous navigation or driver assistance systems. However, extraction of the curb or road edge feature using vision image data is a difficult task as curbs are not conspicuous in the vision image. To extract the curb from a camera image requires extensive image processing, heuristics and very favorable lighting. In our approach, road curbs are extracted speedily using range data provided by a 2D laser measurement system (LMS). Experimental results are presented to demonstrate the viability, and effectiveness, of the proposed methodology and its robustness to different obstacle, weather and lighting conditions.

关键词： Feature extraction Least squares approximation Roads Data mining Charge coupled devices Charge-coupled image sensors Navigation Cameras Image processing Velocity measurement

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Analogic cellular PDE machines

Analogic cellular PDE machines

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international Joint conference on Neural Networks (IJCNN)

作者： C. Rekeczky I. Szatmari P. Foldesy T. Roska Computer and Automation Research Institute Hungary Hungarian Academy of Science Budapest Hungary Jedlik Laboratories Department of Information Technology Pázmány Péter Catholic University Budapest Hungary

this paper gives an overview on analogic cellular array architectures that can also be used to approximate partial differential equations (PDEs). Cellular arrays are massively parallel computing structures composed of cells placed on a regular grid. these cells interact locally an th e array can have both local and global dynamics. the software of this architecture is an analogic algorithm that builds on analog and logical spatio-temporal instructions of the underlying hardware, that is a locally connected cellular nonlinear network (CNN). Within this framework two classes of PDEs, motivated also by image processing methodologies will be discussed: (i) reaction-diffusion (local) types and (ii) contrast modification (global) types. It will be shown that based on cellular diffusion and wave-computing formulations these classes can be approximated on existing CNN Universal Machine (CNN-UM) chips. thus, the last generation of stored program topographic array microprocessors with integrated sensing and computing could also be viewed as the first prototypes of analogic cellular PDE machines implemented on silicon.

关键词： Computer architecture Cellular neural networks Partial differential equations parallel processing Software algorithms Hardware Cellular networks Image processing Turing machines Microprocessors

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A design of analog C-matrix circuits used for signal/data processing

A design of analog C-matrix circuits used for signal/data pr...

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Asia and South Pacific Design Automation conference

作者： T. Sugawara Y. Miyanaga N. Yoshida Graduate Schoolof Engineering Hokkaido University Sapporo Japan

ISBN: (纸本)0769514413

Various calculations of matrices and vectors are used in many digital signal processing systems. Although the calculation simply repeats multiplication and addition, the reiteration processing is usually heavy. therefore, in order to perform the calculations with high speed, it is necessary to apply parallel precessing. Although there is an issue with increased circuit area in the case of digital LSI, the proposed analog circuit can realize multiplication and addition simultaneously with a simple structure which arranges capacitors in a matrix form. Furthermore, a vowel speech recognition system is designed using this circuit.

关键词： Signal design Signal processing Data processing Capacitors Analog circuits Large scale integration Voltage Speech recognition Switches Digital signal processing

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Hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs

Hardware-software co-synthesis of low power real-time distri...

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Asia and South Pacific Design Automation conference

作者： L. Shang N.K. Jha Department of EE Princeton University USA

ISBN: (纸本)0769514413

In this paper, we present a multi-objective hardware-software co-synthesis system for multi-rate, real-time, low power distributed embedded systems consisting of dynamically reconfigurable FPGAs, processors, and other system resources. We use an evolutionary algorithm based framework for automatically determining the quantity and type of different system resources, and then assigning tasks to different processing elements (PEs) and task communications to communication links. For FPGAs, we propose a two-dimensional, multi-rate cyclic scheduling algorithm, which determines task priorities based on real-time constraints and reconfiguration overhead information, and then schedules tasks based on the resource utilization and reconfiguration condition in both space and time. the FPGA scheduler is integrated in a list-based system scheduler. To the best of our knowledge, this is the first multi-objective co-synthesis system, which uses dynamically reconfigurable devices to synthesize a distributed embedded system, to target simultaneous optimization of system price and power. Experimental results indicate that our method can reduce schedule length by an average of 41.0% and reconfiguration power by an average of 46.0% compared to the previous method. It also yields multiple system architectures which trade off system price and power under real-time constraints.

关键词： Real time systems Embedded system Field programmable gate arrays Energy consumption Evolutionary computation Resource management Scheduling algorithm Hardware Reconfigurable architectures Contracts

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7th European conference on parallel Computing, Euro-Par 2001

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7th European conference on parallel Computing, Euro-Par 2001

ISBN: (纸本)3540424954

the proceedings contain 130 papers. the special focus in this conference is on parallel processing. the topics include: Software component technology for high performance parallel and grid computing;connecting computational requirements with computing resources;a tool for binding to threads processors;a distributed object infrastructure for interaction and steering;optimal polling for latency-throughput tradeoffs in queue-based network interfaces for clusters;performance prediction of data-dependent task parallel programs;the hardware performance monitor toolkit;via communication performance on a gigabit Ethernet cluster;group-based performance analysis for multithreaded SMP cluster applications;exploiting unused time slots in list scheduling considering communication contention;an evaluation of partitioners for parallel SAMR applications;load balancing on networks with dynamically changing topology;approximation algorithms for scheduling independent malleable tasks;load redundancy elimination on executable code;using a swap instruction to coalesce loads and stores;data-parallel compiler support for multipartitioning;parallel and distributed databases, data mining and knowledge discovery;an experimental performance evaluation of join algorithms for parallel object databases;a classification of skew effects in parallel database systems;experiments in parallel clustering with DBSCAN;analysis of the cycle structure of permutations;scanning biosequence databases on a hybrid parallel architecture;experiences in using MPI-Io on top of GPFS for the IFS weather forecast code;improving conditional branch prediction on speculative multithreading architectures;performances of a dynamic threads scheduler and self-stabilizing neighborhood unique naming under unfair scheduler.

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parallel explicit finite element dynamics with nonlocal constitutive models

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COMPUTERS & STRUCTURES 2001年第26-28期79卷 2287-2297页

作者： Patzák, B Rypl, D Bittnar, Z Czech Tech Univ Fac Civil Engn Prague 16629 Czech Republic

the present paper deals with the parallelization of an explicit time stepping algorithm in a general finite element environment. Particular attention has been paid to nonlocal constitutive models. A central difference method has been used to discretize the governing equations in time. Modifications of both node-cut and element-cut strategies have been developed to provide an efficient support for nonlocal constitutive models. Efficiency of the proposed approach is demonstrated on different hardware platforms. (C) 2001 Civil-Comp Ltd. and Elsevier Science Ltd. All rights reserved.

关键词： parallel processing explicit dynamics nonlocal models

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parallel pruning for k-means clustering on shared memory architectures 7

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7th European conference on parallel Computing, Euro-Par 2001

作者： Gürsoy, Attila Cengiz, İlker Computer Engineering Department Bilkent University Ankara Turkey

ISBN: (纸本)3540424954

We have developed and evaluated two parallelization schemes for a tree-based k-means clustering method on shared memory machines. One scheme is to partition the pattern space across processors. We have determined that spatial decomposition of patterns outperforms random decomposition even though random decomposition has almost no load imbalance problem. the other scheme is the parallel traverse of the search tree. this approach solves the load imbalance problem and performs slightly better than the spatial decomposition, but the efficiency is reduced due to thread synchronizations. In both cases, parallel treebased k-means clustering is significantly faster than the direct parallel k-means. © Springer-Verlag Berlin Heidelberg 2001.

关键词： Clustering algorithms

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Gang scheduling with lightweight user-level communication

Gang scheduling with lightweight user-level communication

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30th international conference on parallel processing (ICPP Workshops)

作者： Frachtenberg, E Petrini, F Coll, S Feng, WC Los Alamos Natl Lab CCS3 Modeling Algorithms & Informat Grp Comp & Computat Sci CCS Div Los Alamos NM 87545 USA

ISBN: (纸本)0769512607

In this paper we explore the performance of gang scheduling on a cluster using the Quadrics interconnection network. In such a cluster the scheduler can take advantage of this network's unique capabilities, including a network interface card-based processor and memory and efficient user-level communication libraries. We developed a micro-benchmark to test the scheduler's performance under various aspects of parallel job workloads: memory usage, bandwidth and latency-bound communication, number of processes, timeslice quantum, and multiprogramming levels. Our experiments show that the gang scheduler performs relatively well under most workload conditions, is largely insensitive to the number of concurrent jobs in the system and scales almost linearly with number of nodes. On the other hand, the scheduler is very sensitive to the timeslice quantum, and values under 30 seconds can incur large overheads and fairness problems.

关键词： gang scheduling performance evaluation parallel architectures quadrics interconnect

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parallel algorithms for index-permutation graphs - An extension of Cayley graphs for multiple chip-multiprocessors (MCMP)

Parallel algorithms for index-permutation graphs - An extens...

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30th international conference on parallel processing (ICPP 01)

作者： Yeh, CH Parhami, B Queens Univ Dept Elect & Comp Engn Kingston ON K7L 3N6 Canada

ISBN: (纸本)0769512577;0769512585

the index-permutation graph (IPG) model is a natural extension of the Cayley graph model, and super-IPGs form an efficient class of IPGs that contain a wide variety of networks as subclasses. In this paper, we derive a number of efficient algorithms and embeddings for super-IPGs, proving their versatility. We show that a multitude of important networks can also be emulated in super-IPGs with optimal slowdown. Also, the intercluster diameter, average intercluster distance, and bisection bandwidth of suitably constructed super-IPGs are optimal within small constant factors. Finally, we show that when parallel computers, built as multiple chip-multiprocessors (MCMP), are based on super-IPGs, they can significantly outperform those based on hypercubes, k-ary n-cubes, and other networks in carrying out communication-intensive tasks.

关键词： Bandwidth Clustering algorithms Computer networks Concurrent computing Costs Hypercubes Network topology Packet switching parallel algorithms Routing

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