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检索条件"任意字段=7th International Conference on Algorithms and Architectures for Parallel Processing"
2992 条 记 录,以下是2641-2650 订阅
Realization of an airborne radar parallel signal processing system
Realization of an airborne radar parallel signal processing ...
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IEEE international conference on Radar
作者: Xu Junyi Wang Xiutan Peng Yingning Department of Electronic Engineering Tsinghua University Beijing China
In order to fulfil real time signal processing tasks such as clutter rejection, moving target detection (MTD) and constant false alarm rate (CFAR) control in airborne radar, an airborne radar parallel signal processin... 详细信息
来源: 评论
VLSI-based parallel architecture for block-matching motion estimation in low bit-rate video coding
VLSI-based parallel architecture for block-matching motion e...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: Donglai Xu J. Bentley School of Science and Technology University of Teesside Middlesbrough UK
In this paper, we proposed a flexible VLSI-based parallel processing architecture for an improved three-step search (ITSS) motion estimation algorithm that is superior to the existing three-step search (TSS) algorithm... 详细信息
来源: 评论
Power exploration of parallel embedded architectures implementing data-reuse transformations
Power exploration of parallel embedded architectures impleme...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: N. Kavvadias A. Zanikopoulos C. Voliotidis S. Kougia A. Chatzigeorgiou N. Zervas S. Nikolaidis Electronics and Computers Division Department of Physics Aristotle University of Thessaloniki Thessaloniki Greece VLSI Design Laboratory Department of Electrical Engineering University of Patras Patras Greece
Efficient use of data-reuse transformations combined with a custom memory hierarchy that exploits the temporal locality of data related memory accesses can have a significant impact on system power consumption, especi... 详细信息
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An optimal software-pipelining method for instruction-level parallel processors based on scaled retiming
An optimal software-pipelining method for instruction-level ...
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international Symposium on Image and Signal processing and Analysis
作者: F. Fernandez A. Sanchez A. Duarte Dept. Fotónica FI-UPM Campus Montegancedo Madrid Spain ESCET-URJC Campus de Móstoles Madrid Spain
Software pipelining is an instruction-level loop scheduling method for achieving high performance fine-grain parallelism on VLIW (very long instruction word) processors. this paper presents a novel software pipelining... 详细信息
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A VLSI architecture of 2D wavelet transforms
A VLSI architecture of 2D wavelet transforms
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7th IEEE international conference on Electronics, Circuits and Systems
作者: Achour, C Houle, JL Davidson, J Ecole Polytech Montreal PQ H3C 3A7 Canada
this paper presents a new implementation of a 2D wavelet transform in a VLSI circuit, for real-time digital signal processing. the parallel algorithm of the 2D wavelet transform (2D-WT) used for designing and implemen... 详细信息
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algorithms & architectures For parallel processing, 4th Intl Conf
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2000年
作者: Andrzej Marian Goscinski Horace Ho Shing Ip
ICA3PP 2000 was an important conference that brought together researchers and practitioners from academia, industry and governments to advance the knowledge of parallel and distributed computing. the proceedings const... 详细信息
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Choice of SM/DM parallel ANN implementation for embedded applications
Choice of SM/DM parallel ANN implementation for embedded app...
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7th IEEE international conference and Workshop on the Engineering of Computer Based Systems (ECBS 2000)
作者: Dvorak, Vaclav Cejka, Rudolf Brno Univ of Technology Brno Czech Republic
this paper examines implementations of a multi-layer perceptron (MLP) on bus-based shared memory (SM) and on distributed memory (DM) multiprocessor systems. the goal has been to optimize HW and SW architectures in ord... 详细信息
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An associative parallel algorithm for finding a critical cycle in directed graphs  7
An associative parallel algorithm for finding a critical cyc...
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7th international conference on parallel and Distributed Systems Workshops (ICPADS 2000)
作者: Nepomniaschaya, AS Russian Acad Sci Inst Computat Math & Math Geophys Siberian Div Novosibirsk 630090 Russia
In this paper we propose a novel associative parallel algorithm for selecting a critical cycle in directed weighted graphs by means of an abstract model of the SIMD type with vertical data processing (the STAR-machine... 详细信息
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7th international conference on High Performance Computing, HiPC 2000
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7th international conference on High Performance Computing, HiPC 2000
the proceedings contain 51 papers. the special focus in this conference is on System Software and algorithms. the topics include: Charon message-passing toolkit for scientific computations;dynamic slicing of concurren...
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Generation of scheduling functions supporting LSGP-partitioning
Generation of scheduling functions supporting LSGP-partition...
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12th IEEE international conference on Application-Specific Systems, architectures, and Processors
作者: Fimmel, D Tech Univ Dresden Dept Elect Engn IEE D-8027 Dresden Germany
In this paper we present an approach to determine scheduling functions suitable for the design of processor arrays. the considered scheduling functions support a followed LSGP-partitioning of the processor array by al... 详细信息
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