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检索条件"任意字段=7th International Conference on Algorithms and Architectures for Parallel Processing"

共 2975 条记录，以下是2861-2870 订阅

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Compact Deep Neural Networks for Computationally Efficient Gesture Classification From Electromyography Signals

Compact Deep Neural Networks for Computationally Efficient G...

引用

IEEE international conference on Biomedical Robotics and Biomechatronics

作者： Adam Hartwell Visakan Kadirkamanathan Sean R. Anderson Department of Automatic Control and Systems Engineering University of Sheffield Sheffield UK Sl 3JD Department of Automatic Control and Systems Eng

ISBN: (纸本)9781538681848

Machine learning classifiers using surface electromyography are important for human-machine interfacing and device control. Conventional classifiers such as support vector machines (SVMs) use manually extracted features based on e.g. wavelets. these features tend to be fixed and non-person specific, which is a key limitation due to high person-to-person variability of myography signals. Deep neural networks, by contrast, can automatically extract person specific features - an important advantage. However, deep neural networks typically have the drawback of large numbers of parameters, requiring large training data sets and powerful hardware not suited to embedded systems. this paper solves these problems by introducing a compact deep neural network architecture that is much smaller than existing counterparts. the performance of the compact deep net is benchmarked against an SVM and compared to other contemporary architectures across 10 human subjects, comparing Myo and Delsys Trigno electrode sets. the accuracy of the compact deep net was found to be 84.2 ±0.06% versus 70.5 ±0.07% for the SVM on the Myo, and 80.3 ±0.07% versus 67.8 ± 0.09% for the Delsys system, demonstrating the superior effectiveness of the proposed compact network, which had just 5,889 parameters - orders of magnitude less than some contemporary alternatives in this domain while maintaining better performance.

关键词： Electrodes Neural networks Feature extraction Support vector machines Graphics processing units Convolution Embedded systems Support Vector Network Neural network Embedded systems Convolution Feature extraction Electrodes Graphics processing Unit Compact Compact Pattern Electromyogram human subject Myography

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Simulation of a Dubai based 200 KW power plant using PVsyst Software

Simulation of a Dubai based 200 KW power plant using PVsyst ...

引用

international conference on Signal processing and Integrated Networks (SPIN)

作者： Malvika Satish Sharon Santhosh Apurv Yadav Solar and Alternater Energy Amity University Dubai Dubai United Arab Emirates

ISBN: (数字)9781728154756

ISBN: (纸本)9781728154763

With the exhaustion of fossil fuels, their dreadful effect on the environment and their soaring prices, renewable forms of energy like solar and wind power have emerged rapidly, as clean and sustainable sources of generating electricity. this paper studies the viability of deploying a 200 kWp on-grid monocrystalline silicon solar plant, by making use of PVsyst software for Dubai international academic city, Dubai. the system was designed to have 22 modules in series with 32 strings in parallel. And the total number of modules is computed as 704. the reports of the simulation were examined to determine the total production of energy and specific energy production which was found to be 352.6 MWh/year and 1757 kWh/kWp/year respectively. the annual performance ratio of the system was calculated as 81.67 %. Lastly, by identifying the main source of losses, the detailed loss for the entire year is estimated and represented by an arrow loss diagram.

关键词： Software Photovoltaic systems Production Inverters Tools Signal processing

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Deep Learning-based Text-in-Image Watermarking

Deep Learning-based Text-in-Image Watermarking

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IEEE conference on Multimedia Information processing and Retrieval (MIPR)

作者： Bishwa Karki Chun-Hua Tsai Pei-Chi Huang Xin Zhong Department of Computer Science University of Nebraska Omaha Omaha NE USA Information Systems and Quantitative Analysis University of Nebraska Omaha Omaha NE USA

ISBN: (数字)9798350351422

ISBN: (纸本)9798350351439

In this work, we introduce a novel deep learning- based approach to text-in-image watermarking, a method that embeds and extracts textual information within images to en-hance data security and integrity. Leveraging the capabilities of deep learning, specifically through the use of Transformer- based architectures for text processing and Vision Transformers for image feature extraction, our method sets new benchmarks in the domain. the proposed method represents the first application of deep learning in text-in-image watermarking that improves adaptivity, allowing the model to intelligently adjust to specific image characteristics and emerging threats. through testing and evaluation, our method has demonstrated superior robustness compared to traditional watermarking techniques, achieving enhanced imperceptibility that ensures the watermark remains undetectable across various image contents.

关键词： Deep learning Computer vision Data security Watermarking Information processing Transformers Feature extraction Robustness Data mining Text processing

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RC6 architecture-adaptive implementation for coarse-grained reconfiguration array

RC6 architecture-adaptive implementation for coarse-grained ...

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international conference on ASIC

作者： Anqi Yin Zibin Dai Longmei Nan Wei Li Department of Microelectronics Institute of Information Science and Technology Zhengzhou China School of Microelectronics Fudan University Shanghai China

there are a mass of advantages for mapping cryptographic algorithms on the Coarse-Grained Reconfiguration Array (CGRA), nevertheless it also have raised some challenges. the hardest one is how to map. In this paper, we present a set of mapping rules towards the targeted platform and verify its accuracy. In order to reduce the critical path delay and enhance the throughput density, we map 7 implementations of RC6 through architecture-adaptive improvement and task-level parallelism. the simplest method occupies only 4 computing units (CU), while the parallel-task schemes consume 64 CUs at most. the experimental results show that the throughput of optimal scheme is 4.50-10.16 times higher than the Intel Core2-the fastest platform in the literatures published.

关键词： throughput Delays Copper parallel processing Encryption Computer architecture

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Constructing a Mobility and Acceleration Computing Platform with NVIDIA Jetson TK1

Constructing a Mobility and Acceleration Computing Platform ...

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IEEE international Symposium on Cyberspace Safety and Security

作者： Min Su Jianjun Tan Chun-Yuan Lin Jin Ye Chung-Hung Wang Che-Lun Hung College of Life Science and Bioengineering Beijing University of Technology Department of Computer Science and Information Engineering Chang Gung University Department of Computer Science and Communication Engineering Providence University

ISBN: (纸本)9781479989386

Current high-end graphics processing units (GPUs), which contain up to thousand cores per-chip, are widely used in the high performance computing community. However, in the past, the cost and power consumption of constructing a high performance platform with graphics cards, such as Tesla and Fermi series, are high. Moreover, these graphics cards all installed in personal computers or servers, and then the immediate and mobility requirements can not be provided by this platform. NVIDIA Jetson TK1 (Tegra K1) is a full-featured platform for embedded applications and it contains 192 CUDA Cores (Kepler CPU). Due to its low cost, low power consumption and high applicability, NVIDIA Jetson TK1 has become a new research direction. In this paper, we construct a mobility and acceleration computing platform with NVIDIA Jetson TK1. Besides, two tools, ClustalWtk and MCCtk are designed based on NVIDIA Jetson TK1. these tools both can achieve 3 and 4 times speedup ratios on single NVIDIA Jetson TK1 by comparing with their CPU versions on Intel XEON E5-2650 CPU and ARM Cortex-A15 CPU, respectively. Moreover, the cost-performance ratio by NVIDIA Jetson TK1 is higher than that by NVIDIA Tesla K20m. In addition, the user friendly interfaces are also provided by these two tools, respectively.

关键词： NVIDIA Jetson TK1 CUDA Mutliple Sequence Alginment Compound Comparison parallel processing

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Innovative Traffic Optimization Techniques: Integrating Braess' Paradox and Vision Transformer architectures (ViT) for Novel Roadway Modalities 23

Innovative Traffic Optimization Techniques: Integrating Brae...

引用

Proceedings of the 2023 7th international conference on Natural Language processing and Information Retrieval

作者： Siddhant Singh Archit thanikella Memorial High School United States of America Panther Creek High School United States of America

ISBN: (纸本)9798400709227

the Traffic Management System employs Braess' paradox to reduce congestion by altering driving patterns and utilizes the Frank-Wolfe method to create efficient routes. Integrated with a state-of-the-art pothole detection model, which utilizes Vision Transformer and Transformer architectures, the system dynamically adapts to road conditions. this innovative approach, trained on a Mumbai Hyperloop station dataset, includes a Two-Way Transformer network for precise road condition analysis, enhancing traffic flow and safety. It has achieved a 35% decrease in traffic congestion, 47% faster incident response, and 33% shorter trip durations. the system's integration of advanced technologies paves the way for future autonomous vehicle networks and offers significant benefits for urban transportation and planning, simultaneously addressing the challenges of potholes and congestion.

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A PID-Optimized Olen Campton Beamforming Method

A PID-Optimized Olen Campton Beamforming Method

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IEEE international conference on Information Communication and Signal processing (ICICSP)

作者： Wei Si Hua Yi Xin Yang Yu Xuan Chen Xiang Hao Hou Shaanxi Key Laboratory of Underwater Information Technology Northwestern Polytechnical University Xi'an China

ISBN: (数字)9798350355895

ISBN: (纸本)9798350355901

An adaptive narrowband beamforming method based on proportional-integral-differential (PID) virtual interference control which is called PID-optimized Olen Campton beamforming method (PIDBF) is proposed, achieving high-precision and rapid low sidelobe beamforming. In the proposed algorithm, PID controlling gains are applied to iteratively adjust the virtual noise sources. thus, the Olen Campton beamforming method (OBF) is optimized by innovatively introducing PID control method in the iterative process of virtual interference sources, leading to faster and more stable sidelobe control. the superior performance of the proposed method is verified through a number of simulations.

关键词： PI control Array signal processing Optimization methods Process control Interference parallel processing Computational efficiency PD control Sensor arrays Convergence

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A High-Speed Pipelined Architecture for Block Motion Estimation Using Hexagon-Based Search Algorithm

A High-Speed Pipelined Architecture for Block Motion Estimat...

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IEEE India conference (INDICON)

作者： Raveesh Garg Karri Babu Ravi Teja Department of Electrical and Electronics Engineering Birla Institute of Technology and Science Pilani Pilani India

ISBN: (纸本)9781538682364

Motion Estimation is the most time-consuming part in an H.264 video codec. Accelerated motion estimation can reduce the video compression time significantly. In this paper, we propose a high-speed parallel and pipelined architecture for motion estimation using hexagon-based search algorithm and synthesized it for Kintex-7 FPGA. the clock frequency required for the architecture is 198 MHz. this architecture is capable of processing 780k macro blocks (MB) per second to 2302k macroblocks per second which means the it can process a 1080×720 video at 216 fps to 637 fps so it can easily process a high-resolution HD video.

关键词： Motion estimation Computer architecture Pipeline processing Hardware Field programmable gate arrays Signal processing algorithms Adders

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Real-Time Non-rigid Registration of Medical Images on a Cooperative parallel Architecture

Real-Time Non-rigid Registration of Medical Images on a Coop...

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IEEE international conference on Bioinformatics and Biomedicine (BIBM)

作者： Yixun Liu Andriy Fedorov Ron Kikinis Nikos Chrisochoides Department of Computer Science College of William and Mary Williamsburg USA Surgical Planning Laboratory Brigham and Women''s Hospital Boston USA

Unacceptable execution time of Non-rigid registration (NRR) often presents a major obstacle to its routine clinical use. parallel computing is an effective way to accelerate NRR. However, development of efficient parallel NRR codes is a very challenging task. One desirable approach is to map the existing sequential algorithm to the parallel architecture to gain speedup instead of designing a new parallel algorithm. Multicores and GPU provide us a cooperative architecture, in which both Single Instruction Multiple Data (SIMD) and Single Program Multiple Data (SPMD) programming models can co-exist and complement each other. We present a method to parallelize a NRR on this cooperative architecture. Our approach is first to separate the sequential algorithm into regular and irregular parts. We then map the regular part on GPU following SIMD paradigm and irregular part on multicores in a SPMD fashion. Unlike the approaches that use multicores or GPU alone, our approach leads to desirable speedup for the whole application by taking advantage of all components of the cooperative parallel architecture, for all individual parts of the application. this helps us to get closer to our goal: cheaper and faster NRR that leads to its more widespread use. the results on clinical brain MRI data show that the GPU-based Block Matching (regular part) can run at least 1.9 times faster than on a typical cluster of workstations with eight high-performance nodes. the multicores-based implementation of the incremental finite element solver (irregular part) achieves speedup of up to 7 times compared to its sequential version. As a result, the total run time of the NRR code can be reduced to less than 1 minute therefore satisfying the real time requirement for its clinical application.

关键词： Biomedical imaging parallel architectures Multicore processing parallel processing Acceleration Algorithm design and analysis parallel algorithms Magnetic resonance imaging Workstations Finite element methods

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GPU-Based acceleration of an automatic white matter segmentation algorithm using CUDA

GPU-Based acceleration of an automatic white matter segmenta...

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Annual international conference of the IEEE Engineering in Medicine and Biology Society

作者： Nicole Labra Miguel Figueroa Pamela Guevara Delphine Duclap Josselin Hoeunou Cyril Poupon Jean-Francois Mangin Dept. of Electrical Engineering Universidad de Concepcion I2BM Neurospin CEA Gif-sur-Yvette

ISBN: (纸本)9781457702150

this paper presents a parallel implementation of an algorithm for automatic segmentation of white matter fibers from tractography data. We execute the algorithm in parallel using a high-end video card with a Graphics processing Unit (GPU) as a computation accelerator, using the CUDA language. By exploiting the parallelism and the properties of the memory hierarchy available on the GPU, we obtain a speedup in execution time of 33.6 with respect to an optimized sequential version of the algorithm written in C, and of 240 with respect to the original Python/C++ implementation. the execution time is reduced from more than two hours to only 35 seconds for a subject dataset of 800,000 fibers, thus enabling applications that use interactive segmentation and visualization of small to medium-sized tractography datasets.

关键词： execution time White Matter Graphics processing Unit memory hierarchy segmentation Segmentation algorithms Speeding GRAPPER PICK UP Graphics Card AUTOMATIC parallel Lines COPPER ALLOY NO 240 Dataset Visualization

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