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检索条件"任意字段=7th International Conference on Algorithms and Architectures for Parallel Processing"
2929 条 记 录,以下是2871-2880 订阅
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A massively-parallel SIMD processor for neural network and machine vision applications  93
A massively-parallel SIMD processor for neural network and m...
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Proceedings of the 7th international conference on Neural Information processing Systems
作者: Michael A. Glover W. thomas Miller, III Current Technology Inc. Durham NH Department of Electrical and Computer Engineering The University of New Hampshire Durham NH
this paper describes the MM32k, a massively-parallel SIMD computer which is easy to program, high in performance, low in cost and effective for implementing highly parallel neural network architectures. the MM32k has ...
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A scalar architecture for pseudo vector processing based on slide-windowed registers  93
A scalar architecture for pseudo vector processing based on ...
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7th international conference on Supercomputing, ICS 1993
作者: Nakamura, Hiroshi Boku, Taisuke Wada, Hideo Imori, Hiromitsu Nakata, Ikuo Inagami, Yasuhiro Nakazawa, Kisaburo Yamashtta, Yoshiyuki Institute of Information Sciences and Electronics University of Tsukuba Tsukuba Ibaraki305 Japan General Purpose Computer Division Hitachi Ltd. Hadano Kanagawa259-13 Japan Central Research Laboratory Hitachi Ltd. Kokubunji Tokyo185 Japan
In this paper, we present a new scalar architecture for high-speed vector processing. Without using cache memory, the proposed architecture tolerates main memory access latency by introducing slide-windowed floating-p... 详细信息
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Incomplete Star Graph : An Economical Fault-tolerant Interconnection Network
Incomplete Star Graph : An Economical Fault-tolerant Interco...
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international conference on parallel processing (ICPP)
作者: CP. Ravikumar A. Kuchlous G. Manimaran Electrical Engineering Department Indian Institute of Technology New Delhi India National Informatics Centre (NIC) New Delhi India
A number of existing multiprocessors are based on the hypercube interconnection network. the popularity of the hypercube is due to its small communication diameter, which grows logarithmically with the cube size, its ... 详细信息
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Distributed modeling and implementation of high performance communication architectures
Distributed modeling and implementation of high performance ...
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international conference on Distributed Computing Systems
作者: K. Shafer M. Ahuja Office of Research Online Computer Library Center Inc. Dublin OH USA Department of Comp. Science and Engineering University of California San Diego CA USA
High performance distributed computing systems require high performance communication systems. Distributed modeling and implementation of these communication systems is important. Toward this goal, the authors refine ... 详细信息
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Efficient simulation of biological neural networks on massively parallel supercomputers with hypercube architecture  93
Efficient simulation of biological neural networks on massiv...
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Proceedings of the 7th international conference on Neural Information processing Systems
作者: Ernst Niebur Dean Brettle Computation and Neural Systems California Institute of Technology Pasadena CA Booz Allen and Hamilton Inc. McLean VA
We present a neural network simulation which we implemented on the massively parallel Connection Machine 2. In contrast to previous work, this simulator is based on biologically realistic neurons with nontrivial singl...
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VLSI phase locking architectures for feature linking in multiple target tracking systems  93
VLSI phase locking architectures for feature linking in mult...
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Proceedings of the 7th international conference on Neural Information processing Systems
作者: Andreas G. Andreou thomas G. Edwards Department of Electrical and Computer Engineering The Johns Hopkins University Baltimore MD Department of Electrical Engineering The University of Maryland College Park MD
Recent physiological research has shown that synchronization of oscillatory responses in striate cortex may code for relationships between visual features of objects. A VLSI circuit has been designed to provide rapid ...
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Inverse dynamics of speech motor control  93
Inverse dynamics of speech motor control
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Proceedings of the 7th international conference on Neural Information processing Systems
作者: Makoto Hirayama Eric Vatikiotis-Bateson Mitsuo Kawato ATR Human Information Processing Research Laboratories Kyoto Japan ATR Human Information Processing Research Laboratories Kyoto Japan and Laboratory of Parallel Distributed Processing Research Institute for Electronic Science Hokkaido University Sapporo Hokkaido Japan
Progress has been made in computational implementation of speech production based on physiological data. An inverse dynamics model of the speech articulator's musculo-skeletal system, which is the mapping from art...
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WINDOW-BASED DEDICATED parallel architectures FOR IMAGE-processing  11
WINDOW-BASED DEDICATED PARALLEL ARCHITECTURES FOR IMAGE-PROC...
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conference D: architectures for Vision and Pattern Recognition, at the 11th IAPR international conference on Pattern Recognition
作者: ANTOLA, A BREVEGLIERI, L POLITECN MILAN DIPARTIMENTO ELETTRI-20133 MILANITALY
Window-based parallel architectures are here considered as target structures for the computation of low and medium level image processing algorithms. their definition stems from a general reformulation of algorithms, ... 详细信息
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VISUAL DEBUGGING FOR A PYRAMIDAL MACHINE  11
VISUAL DEBUGGING FOR A PYRAMIDAL MACHINE
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conference D: architectures for Vision and Pattern Recognition, at the 11th IAPR international conference on Pattern Recognition
作者: BIANCARDI, A MOSCONI, M UNIV PAVIA DIPARTIMENTO INFORMAT & SISTEMATI-27100 PAVIAITALY
this paper proposes a novel approach to program development for highly parallel architectures, primarily as far as debugging is concerned. the visual nature of the debugging stage, when dealing with image-processing a... 详细信息
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Proceedings of the 6th international parallel processing Symposium
Proceedings of the 6th International Parallel Processing Sym...
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Proceedings of the 6th international parallel processing Symposium
the Symposium materials contain 118 papers on new developments in parallel processing. algorithms, architectures, mapping/scheduling, applications, special-purpose architectures, interconnection networks, software, an... 详细信息
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