this paper proposes a novel approach to program development for highly parallelarchitectures, primarily as far as debugging is concerned. the visual nature of the debugging stage, when dealing with image-processing a...
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this paper proposes a novel approach to program development for highly parallelarchitectures, primarily as far as debugging is concerned. the visual nature of the debugging stage, when dealing with image-processingalgorithms, is heavily supported so that all the relevant information, which is generally either hidden or presented without its logical structures, is made available to programmers. the authors present the modular and portable software system built, in Pavia University, for the PAPIA2 machine.< >
the performance of several cache architectures of tightly coupled multiprocessor mainframes has been evaluated by trace-driven simulations. the traces were obtained on a monoprocessor running a transaction processing ...
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the performance of the ASP computer on vision tasks has been evaluated by applying the Abingdon Cross benchmark using a number of different algorithms. In this paper, these algorithms are compared and contrasted on th...
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the performance of the ASP computer on vision tasks has been evaluated by applying the Abingdon Cross benchmark using a number of different algorithms. In this paper, these algorithms are compared and contrasted on the basis of their performance.< >
Studies the parallel recognition of 2D-images generated by parallel context-free image grammars. the authors show that the recognition of an n*n image can be done in O(log/sup 2/(n)) time with n/sup 6/ processors. For...
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Studies the parallel recognition of 2D-images generated by parallel context-free image grammars. the authors show that the recognition of an n*n image can be done in O(log/sup 2/(n)) time with n/sup 6/ processors. For unambiguous context-free and linear image grammars, they prove that only O(n/sup 3/) is needed. For deterministic parallel image grammars, the recognition can be done in O(log/sup 2/(n)) time by using n/sup 2/ processors.< >
作者：
Yeh, Hong-JinLIP-IMAG
Ecole Normale Supérieur de Lyon 46 Allée d’Italie Lyon Cédex 0769364 France
In this paper, we present a task scheduling algorithm which accounts for digit-level pipelines of on-line arithmetic units when a limited number of heterogeneous on-line arithmetic units can be connected totally with ...
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Describes a parallel computing system and a software algorithm for realtime interaction between a human user and a synthesized moving humanlike image or agent. the realistic human-like agent appearing on a display can...
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Describes a parallel computing system and a software algorithm for realtime interaction between a human user and a synthesized moving humanlike image or agent. the realistic human-like agent appearing on a display can recognize the palm position and finger motion (finger sign) of the human user, then tracks and gazes at the hand position and changes his/her facial expression in response to the recognized finger sign in realtime. this kind of interactive agent is expected to play an important role in advanced human interfaces. To realize realtime image recognition and image synthesis, a parallel image processing and synthesis system named 'TN-VIT' has been developed.< >
Quadtree region representation, image properties computation of binary image and moment invariants are implemented on a pyramid machine. Based on those algorithms a parallel pattern recognition technique is proposed. ...
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Quadtree region representation, image properties computation of binary image and moment invariants are implemented on a pyramid machine. Based on those algorithms a parallel pattern recognition technique is proposed. Exploiting the parallel quadtree representation on pyramid machine, moment invariants seems to be a good descriptor in a hierarchical coarse-fine matching strategy. For a particular image, the moment invariants always changes slightly at higher levels in the representation. A matching criteria of distance measure can be used to find dissimilarity in images.< >
In this paper, we consider the optima] loop scheduling and minimum storage allocation problems based on argument-fetching dataflow architecture model. Under the axgument-fetching model, the result generated by an acto...
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A method called concentration-contour method is presented. It transforms a compound pattern into an integral one where contour analysis can be used. the concentration-contour method consists of four phases: (1) concen...
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A method called concentration-contour method is presented. It transforms a compound pattern into an integral one where contour analysis can be used. the concentration-contour method consists of four phases: (1) concentration of pattern, (2) extraction of contour, (3) transformation of numerical features, and (4) classification. the diagonal-diagonal regional projection transformation (DDRPT), which converts a compound pattern into an integral object, has been used. A VLSI architecture to implement the concentration-contour approach has been designed. the time complexity of the method is only O(N) compared with O(N/sup 2/) when a uniprocessor is used.< >
Several methods for parallel affine image warping on a linear processor array are considered. the methods were implemented on the Carnegie Mellon Warp machine and the Carnegie Mellon-Intel Corporation iWarp computer (...
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Several methods for parallel affine image warping on a linear processor array are considered. the methods were implemented on the Carnegie Mellon Warp machine and the Carnegie Mellon-Intel Corporation iWarp computer (treated as a linear array), and performance figures are provided. Both systolic methods, which feed one of the images in a stream, and non-systolic methods, which partition both images, are treated. A scanline method that combines some of the features of both, but which requires a fast transposed method is also described. the authors articulate three characteristics that affect the design of parallel image warping algorithms: affine warping is easily invertible, the mapping is known at the start of execution, and nearby input pixels map to nearby output pixels. the authors conclude that non-systolic methods give slightly better execution time and are easier to programs than systolic methods but require much larger processor memories.< >
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