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Automated Ocular Artifacts Identification and Removal from EEG Data Using Hybrid Machine Learning Methods

Automated Ocular Artifacts Identification and Removal from E...

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international conference on Signal processing and Integrated Networks (SPIN)

作者： Mohit Sarin Akshat Verma Deepthi Hitesh Mehta Praveen Kumar Shukla Shrish Verma Department of Electronics and Communication Engineering National Institute of Technology Raipur India

ISBN: (数字)9781728154756

ISBN: (纸本)9781728154763

Brain Computer Interface (BCI) is an emerging field of research, which helps neuromuscular disabled people to communicate and control external devices with the brain. Electroencephalogram (EEG) signals have been used by doctors to diagnose brain activities. EEG signals are very sensitive to the physical movement of most of the body parts. Electrooculogram (EOG) are the signals which are directly related to eye movements. In the field of BCI, artifacts refer to those signals which are not required but will be present in data because of the involuntary actions of human muscles. In the proposed research, BCI Competition III Dataset IV A is used, which consists of two classes of signals right hand and right foot, so ocular artifacts were a prime hindrance for this type of data. the research involves the use of the following feature detection methods: ICA, ICA-RLS, ICA-LMS, ICA-DWT, EMD-ICA. the first common step is using ICA to obtain independent components(ICs). Using ICA, ICs that contain ocular artifacts can be identified and then further exposed to another round of ICA or adaptive filtering that uses LMS, RLS. the adaptive filtering technique reduces the need for parallel EOG recordings by removing the ocular ICs using reference signals. Hybrid' methods have gained much advantage over the traditional ICA process, which leads to better detection and removal of ocular artifacts with these techniques. Further, the research proposes a system involving the use of SVM-PSO for the classification of motor imagery signals obtained after the removal of artifacts. ICA-RLS and CSP as pre-processing and feature extraction techniques provided the best classification accuracy of 92.94%.

关键词： Signal processing conferences Noise reduction Tools Manganese

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ctapipe: a low-level data processing framework for the Cherenkov Telescope Array 36

ctapipe: a low-level data processing framework for the Chere...

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36th international Cosmic Ray conference (ICRC)

作者： Kosack, K. Peresano, M. CEA Paris Saclay Astrophys Dept Paris France

the low-level data processing of the Cherenkov Telescope Array (CTA) and indeed all other existing Cherenkov Telescopes can be broken into four general steps: 1) the processing of air-shower event image time-series, 2) the stereo reconstruction of the incident air showers, and 3) the discrimination of gamma-ray induced showers from those from cosmic rays 4) the determination of the overall system response. the final output for science users is a list of reconstructed gamma-ray-like events and their associated parameters, along with a set of instrumental response functions needed for doing astrophysics. We present a python-based framework, ctapipe, for writing the algorithms required for these processing steps along with a reference prototype pipeline. the code is written with a focus on simplicity and usability by developers with a diverse range of skill sets, and leverages existing code from the science community (AstroPy, SciPy/NumPy, SciKit-Learn, etc). this concept is intended to be a prototype for the final CTA low-level data processing pipeline, allowing physicists to quickly explore low-level Cherenkov telescope data and develop new algorithms. thanks to the framework modularity, computer engineers and data scientists will be able to simultaneously optimize the algorithms and parallelize them using modern computing and big-data architectures to support the high data volumes of CTA.

关键词： Gamma rays

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Technical Middleware Microservice Orchestration and Fault-Tolerant Mechanism algorithms for Containerized Deployment

Technical Middleware Microservice Orchestration and Fault-To...

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IEEE international conference on Civil Aviation Safety and Information Technology (ICCASIT)

作者： Haoqi Dai Shaoguang Liu Bo Liu Zhongkai Fan Jinhe Wang Guangdong Provincial Key Laboratory of Digital Grid Technology Southern Power Grid Digital Grid Research Institute Co. Ltd. Guangzhou China

ISBN: (数字)9798350389418

ISBN: (纸本)9798350389425

Due to the containerized deployment environment, microservice orchestration requires coordination of multiple independently running services. this highly decoupled and distributed architecture increases the complexity of orchestration, and existing static resource allocation strategies are difficult to provide sufficient fault tolerance in the face of sudden failures. therefore, this article introduced a dynamic fault-tolerant scheduling algorithm based on Qlearning, which monitored service status in real-time, predicted potential faults, and dynamically adjusted resource allocation to improve system stability and fault tolerance. Firstly, microservices are modularized using the container orchestration tool Kubernetes, and containerization technology is utilized to encapsulate each service in a separate Pod for operation. Elastic allocation of resources can be achieved through Kubernetes’ automated scheduling mechanism, while efficient service communication and load balancing can be achieved through service mesh; Secondly, a dynamic faulttolerant scheduling algorithm based on Q-learning is introduced, combined with real-time monitoring data of CPU (Central processing Unit), memory, network traffic, etc., deployed in containers, to establish a fault prediction model. Finally, long short-term memory networks can be used to dynamically analyze and predict the load status and historical fault records of each service node, identify potential faults in real time, and automatically adjust resource allocation strategies based on the prediction results, reallocate service loads or start backup instances. the experimental results show that the Q-learningbased dynamic fault-tolerant scheduling algorithm effectively improves the system’s fault tolerance and stability. the analysis of fault recovery time showed that the recovery time for CPU overload, memory leakage, and network congestion was significantly reduced within 48 hours, to 7 seconds, 9 seconds, and 12 seconds, respec

关键词： Fault tolerance Machine learning algorithms Scheduling algorithms Heuristic algorithms Fault tolerant systems Microservice architectures Dynamic scheduling Stability analysis Real-time systems Resource management

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A Scalable Method for Cross-Platform Merging of SNP Array Datasets

A Scalable Method for Cross-Platform Merging of SNP Array Da...

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the 7th international conference on Management and Service Science(MASS 2013)

作者： Peikai Chen Y.S.Hung Department of Electrical and Electronic Engineering The University of Hong Kong

Single nucleotide polymorphism(SNP) array is a recently developed biotechnology that is extensively used in the study of cancer *** various available platforms make cross-study validations/comparisons ***,sample sizes of the studies are fast increasing,which poses a heavy computational burden to even the fastest ***,we describe a novel method that can generate a platform-independent dataset given SNP arrays from multiple *** extracts the common probesets from individual platforms,and performs cross-platform normalizations and summarizations based on these *** different platforms may have different numbers of probes per probeset(PPP),the above steps produce preprocessed signals with different noise levels for the *** handle this problem,we adopt a platform-dependent smoothing strategy,and produce a preprocessed dataset that demonstrates uniform noise levels for individual *** increase the scalability of the method to a large number of samples,we devised an algorithm that split the samples into multiple tasks,and probesets into multiple segments before submitting to a parallel computing *** scheme results in a drastically reduced computation time and increased ability to process ultralarge sample sizes and arrays.

关键词： SNP Array Scalable processing Cross-Platform

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Application specific hardware architecture for high-throughput short-length LDPC decoders

Application specific hardware architecture for high-throughp...

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IEEE international conference on Intelligent Computer Communication and processing

作者： Bogdan Belean Sergiu Nedevschi Monica Borda National Institute for R&D of Isotopic and Molecular Technologies INCDTIM Computer Science Dept. Technical University of Cluj-Napoca Communication Dept. Technical University of Cluj-Napoca

ISBN: (纸本)9781479914920

LDPC codes have been intensively used in various wireless communication applications, due to their increased BER performance. the present paper summarizes the state of the art applications of short length LDPC codes and proposes FPGA based application specific hardware architectures for short-length LDPC decoders. the decoding algorithms considered for implementation are both belief propagation and min-sum algorithm. Due to the increased BER performances, the proposed architecture make use of parallel computation capabilities offered by FPGA technology in order to implement the belief propagation algorithm. In spite of the iterative nature and increased computational complexity of the LDPC decoding algorithm, the proposed architecture achieves high-throughput, mandatory in real-time application and data transmission. the architecture for the LDPC belief propagation based decoder is based on arctangent hyperbolic function approximation used for check nodes update.

关键词： LDPC codes FPGA Decoding algorithms Hardware implementations parallel computing

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Sequence-to-Sequence Multi-Hop Knowledge Reasoning Based on Retentive Network

Sequence-to-Sequence Multi-Hop Knowledge Reasoning Based on ...

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Computer Information Science and Application Technology (CISAT), international conference on

作者： Ruilin Su Wanshan Zhang Dunhui Yu Hubei University Wuhan China Wuhan China School of Computer Science and Information Engineering Hubei University Wuhan China Hubei Key Laboratory of Big Data Intelligent Analysis and Application Hubei University Wuhan China Engineering and Technical Research Center of Hubei Province in Software Engineering Wuhan China

ISBN: (数字)9798350375107

ISBN: (纸本)9798350375114

Multi-hop Knowledge Reasoning is a task that involves generating an answer given a query and a knowledge graph. Existing sequence-to-sequence reasoning models use the Transformer to encode and decode sequences, but these models have some flaws, such as the inability to effectively handle long-sequence reasoning and susceptibility to exposure bias. To address these issues, we provides a sequence-to-sequence reasoning model named STSR, which is based on Retentive Network. Aiming at improving training efficiency through parallel training, this model leverages the advantages in Retentive Network, reduce time overhead, and enhance reasoning efficiency through iterative reasoning. It effectively mitigates the problems of high spatial overhead and low efficiency in long-sequence reasoning faced by the Transformer. Moreover, it retains and updates historical information during the encoding and decoding process, enhancing the model’s memory and generalization capabilities. Additionally, the Scheduled Sampling method is adopted to alleviate the exposure bias introduced during reasoning, which involves using the model’s own output as the input for the next moment with a certain probability during training, instead of using the true label. We conduct the experiment on six public datasets, with the results showing that the proposed model outperforms existing baseline models in terms of precision and generation quality. this paper provides a new solution for the task of sequence-to-sequence multihop knowledge reasoning and also demonstrates the potential application of the Retentive Network in natural language processing.

关键词： Training Knowledge engineering Accuracy Spread spectrum communication Knowledge graphs Transformers Sampling methods Cognition Natural language processing Iterative decoding

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Stereo Matching Algorithm Based on DACVNet

Stereo Matching Algorithm Based on DACVNet

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international conference on Information Systems and Computer Aided Education (ICISCAE)

作者： Lixin Zhao Xu Wang Fanliang Bu Yao Zhou Lin Tan People's Public Security University of China Beijing China

ISBN: (数字)9798350350760

ISBN: (纸本)9798350350777

Stereo matching is the most important step in binocular vision 3D reconstruction, and the matching effect directly affects the result of 3D reconstruction. In this paper, ACVNet is used as the benchmark network, and the network model is improved. the reference network uses the three-layer ResNet structure in the image classification task in the process of feature extraction, and there are some problems such as insufficient edge and texture information extraction and inaccurate feature information extraction. To solve these problems, based on ACVNet, a lightweight DFA module is introduced, which is more suitable for feature extraction in stereoscopic matching tasks. Considering the poor effect of the fine texture region, an inter-dimensional multi-scale module is introduced into the construction of the matching cost, and the feature map obtained after feature extraction is processed to enhance the effect of the weak texture region. the parallax completion module and parallel multi-scale module are introduced into the cost aggregation to reduce the errors in the occlusion region and obtain a denser high-precision parallax map. the results of training and evaluation on SceneFlow, KITTI2012 and KITTI2015 data sets show that the accuracy of the proposed improved algorithm is improved compared with the benchmark model. Finally, the three-dimensional matching method is used to reconstruct the real scene, and good results are obtained.

关键词： Training Solid modeling Costs three-dimensional displays Accuracy Stereo image processing Benchmark testing Feature extraction Information retrieval Information systems

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Prediction of irrigation water requirement based on parallel CNN-LSTM model and Mann-Kendall test

Prediction of irrigation water requirement based on parallel...

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Industrial Cyber-Physical Systems (ICPS)

作者： Hao Wen Haochen Ma Yu Du Jinchao Zhang Li He College of Mechatronics and Control Engineering Shenzhen University Shenzhen China Guangdong Laboratory of Artificial Intelligence and Digital Economy (SZ) Shenzhen China Dongshen Intelligent Water Technology Company LTD Shenzhen China

ISBN: (数字)9798350363012

ISBN: (纸本)9798350363029

Accurate prediction of irrigation water requirement is the basis for irrigation water conservation. However, the widely used machine learning prediction methods do not utilize spatiotemporal information between related features effectively, and the abrupt mutation data processing method for environmental factors requires improvement. this study proposes an irrigation water requirement prediction method using a parallel Convolutional Neural Network (CNN) and Long Short-Term Memory network (LSTM) based on the Mann-Kendall test. In this study, the non-stationary data is segmented into subsequences based on the mutation points of meteorological data detected by the Mann-Kendall test. then, to satisfy the requirement of extracting the spatiotemporal information of input features, a parallel CNN-LSTM network is built. the CNN is used to reextract and down-sample the spatial information of features. Furthermore, the LSTM network is used for regression fitting in the time dimension to realize farmland irrigation water requirement prediction. Compared with CNN, LSTM, and CNNLSTM with data from 2020 to 2023 in Beijing, the results show that the proposed model can effectively improve the accuracy and stability of irrigation water requirement prediction. this study can provide a reference for intelligent water-saving irrigation and optimal allocation of water resources in irrigation areas.

关键词： Irrigation Accuracy Predictive models Water conservation Data models Stability analysis Convolutional neural networks

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Research on Power Attack Comprehensive Experiment Platform Based on SAKURA-G Hardware Circuit

Research on Power Attack Comprehensive Experiment Platform B...

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CENet 2017-the 7th international conference on Computer Engineering and Networks

作者： Ge Jiao Lang Li Yi Zou College of Computer Science and Technology Hengyang Normal UniversityHunan Provincial Engineering Laboratory for Technology of Traditional Settlements DigitalizationHunan Provincial Key Laboratory of Intelligent Information Processing and Application College of Computer Science and Technology Hengyang Normal University

the power attack of the hardware circuit is going through the steps of algorithm writen in FPGA,power consumption,data processing and *** order to solve the problem of the existing power attack experimental platform because the processing steps are too scattered,feature complex operations and other issues,we've thus developed a higher degree of integration of the experimental *** advanced encryption standard(AES) algorithm is taken as an example to illustrate the whole process of implementing the correlation power analysis(CPA)attack on the experimental *** AES algorithm will be downloaded to the SAKURA-G experiment board,acquire the algorithm runtime power leakage,carry out the energy analysis because related attacks on information may leak location,and restore the AES first round of the first byte of the *** results show that the comprehensive experimental platform will integrate these steps into a platform,simplify the operation process,ensure the accuracy of power acquisition,realize the parallel data processing and improve the accuracy and efficiency of power attack.

关键词： CPA AES Research on Power Attack Comprehensive Experiment Platform Based on SAKURA-G Hardware Circuit

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Performance Prediction for parallel Applications Running on HPC architectures through Petri Net Modelling and Simulation

Performance Prediction for Parallel Applications Running on ...

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IEEE international conference on Intelligent Computer Communication and processing

作者： Ion Dan MIRONESCU Lucian VINTAN Computer Science Department Technical University of Cluj-Napoca

ISBN: (纸本)9781479914920

the paper presents the development of a model and a simulation technique for the prediction of the performance of a concurrent application running on a HPC architecture. Models for the hardware and software were developed using the Coloured Petri Net formalism and then coupled for the simulation. Timed simulations were performed in the Coloured Petri Net tools environment and in the Charm++ respectively the BigSim simulator. the results of both simulations for the same optimization problem show similar trends.

关键词： Modelling and Simulation Performance prediction Petri net parallel Application HPC

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