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检索条件"任意字段=7th International Conference on Algorithms and Architectures for Parallel Processing"

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Design and Implementation of a Target Detection and Tracking System Based on FPGA

Design and Implementation of a Target Detection and Tracking...

引用

international conference on Information Science and Control Engineering (ICISCE)

作者： Yang QianYu Qian Yi Ruixin Academy of Classical Learning Beijing Institute of Technology Beijing China College of Information Science and Technology Taishan University Taian China

In order to meet the real-time detection and tracking of moving target, a hardware platform based on Field Programmable Gate Array (FPGA) is built. After analyzing Sum of Absolute Difference (SAD) algorithm and cross search algorithm, this paper focuses on the design of parallel search structure of tracking module, parallel matching structure of search module and parallel computing structure of SAD unit. through the analysis of real-time video processing results, the effectiveness of the design scheme is proved.

关键词： Target tracking System performance Process control Object detection Streaming media parallel processing Logic gates

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HyperPRAW: Architecture-Aware Hypergraph Restreaming Partition to Improve Performance of parallel Applications Running on High Performance Computing Systems 19

HyperPRAW: Architecture-Aware Hypergraph Restreaming Partiti...

引用

48th international conference on parallel processing (ICPP)

作者： Musoles, Carlos Fernandez Coca, Daniel Richmond, Paul Univ Sheffield Sheffield S Yorkshire England

ISBN: (纸本)9781450362955

High Performance Computing (HPC) demand is on the rise, particularly for large distributed computing. HPC systems have, by design, very heterogeneous architectures, both in computation and in communication bandwidth, resulting in wide variations in the cost of communications between compute units. If large distributed applications are to take full advantage of HPC, the physical communication capabilities must be taken into consideration when allocating workload. Hypergraphs are good at modelling total volume of communication in parallel and distributed applications. To the best of our knowledge, there are no hypergraph partitioning algorithms to date that are architecture-aware. We propose a novel restreaming hypergraph partitioning algorithm (HyperPRAW) that takes advantage of peer to peer physical bandwidth profiling data to improve distributed applications performance in HPC systems. Our results show that not only the quality of the partitions achieved by our algorithm is comparable with state-of-the-art multilevel partitioning, but that the runtime performance in a synthetic benchmark is significantly reduced in 10 hypergraph models tested, with speedup factors of up to 14x.

关键词： datasets neural networks gaze detection text tagging

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parallel processing of Improved KNN Text Classification Algorithm Based on Hadoop 7

Parallel Processing of Improved KNN Text Classification Algo...

引用

7th international conference on Information, Communication and Networks, ICICN 2019

作者： Du, Shaobo Li, Jing School of Computer and Information Engineering Guizhou University of Commerce Guiyan China

ISBN: (纸本)9781728104263

With the rapid development of mobile Internet, the network has become an important medium for people to exchange information. the research on text classification has practical significance. Using the Hadoop platform to parallelize the KNN classification algorithm can quickly and accurately classify the text, but when calculating the similarity or distance of the sample points, the KNN algorithm will increase with the increase of the sample data, which will lead to the algorithm time. Increased complexity and reduced classification accuracy. therefore, parallel processing of Improved KNN text classification algorithm based on Hadoop platform is proposed. the CLARA clustering algorithm is used to cut out the samples with low similarity in the dataset, and the calculation of sample distance in the dataset is reduced. then design the parallel KNN MapReduce program to classify the network public opinion data. the experimental results show that the improved parallel KNN algorithm improves the accuracy and time of text classification. © 2019 IEEE.

关键词： MapReduce

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Demand Side Managment Electric Energy Consumption Data processing architectures Within Internet of things Context 19

Demand Side Managment Electric Energy Consumption Data Proce...

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19th IEEE Joint international Symposium on Computational Intelligence and Informatics and 7th international conference on Recent Achievements in Mechatronics, Automation, Computer Sciences and Robotics, CINTI-MACRo 2019 - Proceedings

作者： Marales, Razvan Cristian Preda, Stefan School of Economics Informatics Bucharest University of Economic Studies Bucharest Romania

ISBN: (纸本)9781728156255

the paper starts with a summary presentation of the demand side management in the context of electric energy consumption. After that, the concept of Internet of things integration in demand side management is presented together with its benefits, followed by two main architectures that can be used as solutions for data processing, Lambda and Kappa. the architectures are described in detail and compared between them based on advantages and disadvantages. the paper will end with the presentation of the prototype, which is describing the implementation of both architectures into a demand side management application, in context of Internet of things. Afterwards, the conclusions over the paper are stated. © 2019 IEEE.

关键词： Internet of things

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Local partition subdivision algorithm for approximate nearest neighbor query

Local partition subdivision algorithm for approximate neares...

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international conference on Information Science and Control Engineering (ICISCE)

作者： Penghui Dong Yan Yang School of Computer Science and Technology Heilongjiang University Harbin China Key Laboratory of Database and Parallel Computing Heilongjiang Province Harbin China

this paper solves the problem of approximate nearest neighbor queries on high-dimensional large data sets. the two most representative methods to solve the approximate nearest neighbor query problem on high-dimensional and large-scale data sets are based on inverted multi-index and based on inverted index. the query algorithm based on the inverted multi-index requires frequent access operations to the memory, which causes more waste of resources than the query operation based on the distance order. Traditional query algorithms based on inverted indexes need to divide the entire feature space into a large number of regions to ensure the accuracy of query results when solving the problem of high-dimensional large data sets, so a large amount of space resources are required. Based on the inverted index, a query algorithm is proposed. through the subdivision process of Voronoi Cells that are initially divided into part of the original data set, the purpose is to significantly improve the high-dimensional data set without dividing a large number of regions. On the query performance, and avoid frequent access operations to the random access memory. theoretical analysis and experimental results show that the proposed method not only effectively improves the query processing efficiency, but also ensures the accuracy of the query.

关键词： Information science Control engineering Query processing Memory management Random access memory Approximation algorithms Partitioning algorithms

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parallelization of Uniformization Algorithm with CUDA-Aware MPI 7

Parallelization of Uniformization Algorithm with CUDA-Aware ...

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7th international conference on Information and Communication Technology (ICOICT)

作者： Farhatuaini, Lia Pulungan, Reza Univ Gadjah Mada Fac Math & Nat Sci Dept Comp Sci & Elect Yogyakarta Indonesia

ISBN: (纸本)9781538680520

Uniformization is one of the best methods for computing the transient probabilities of continuous-time Markov chains. In this paper, we propose a method for parallelizing uniformization by performing its computation on graphic processing units residing on several computers communicating with each other via message passing interface. Since Markov chain models are usually sparse, hypergraph partition is used to reduce communications among the computers when performing repeated sparse matrix-vector multiplication operations. this method of parallelization in principle allows for unlimited scalability while still maintains computation speed. Indeed, our results show that the proposed method can solve large models faster. However, our results also show that up to 90% of the computation time is actually still spent for communications between computers.

关键词： parallel computation CUDA-aware MPI CTMCs uniformization hypergraph partitioning transient analysis

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Fast RTL Implementation of A* Path Planning Algorithm

Fast RTL Implementation of A* Path Planning Algorithm

引用

international conference on Microelectronics, ICM

作者： Adham Osama Ahmed Mostafa Eslam Mamdouh Mohamed Gamal Usama Imam Mohamed Taha Ahmed Khalil Islam Ahmed Hassan Mostafa Cairo University Giza IC Verification Solutions Siemens EDA Cairo Egypt Nanotechnology and Nanoelectronics Program Zewail City of Science and Technology University of Science and Technology 6th of October Giza Egypt

ISBN: (纸本)9781665408400

the conventional A* algorithm consumes a lot of time due to its large number of iterations. In every iteration, the memory is accessed for multiple data structures, functions are evaluated then sorted into queues which makes it sometimes not suitable for real-time applications. this paper proposes a fast implementation for the A* algorithm to meet requirements of real-time applications. the proposed implementation uses parallelism and caching to achieve better performance. We used Register Transfer Level (RTL) simulation and formal verification to do functional verification of the implemented *** design is implemented on Xilinx Virtex-7 to be evaluated. Experiments prove that this implementation achieves 100 times enhancement for low obstacle maps and 50 times for high ones relative to software implementation. the design is suitable for real-time applications.

关键词： Software algorithms parallel processing Shift registers Data structures Real-time systems Path planning Software

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De(con)struction of the lazy-F loop: improving performance of Smith Waterman alignment 19

De(con)struction of the lazy-F loop: improving performance o...

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19th Annual IEEE international conference on Bioinformatics and Bioengineering (BIBE)

作者： Snytsar, Roman Microsoft Res & AI Redmond WA 98052 USA

ISBN: (纸本)9781728146171

Striped variation of the Smith-Waterman algorithm is known as extremely efficient and easily adaptable for the SIMD architectures. However, the potential for improvement has not been exhausted yet. the popular Lazy-F loop heuristic requires additional memory access operations, and the worst-case performance of the loop could be as bad as the nonvectorized version. We demonstrate the progression of the lazy-F loop transformations that improve the loop performance, and ultimately eliminate the loop completely. Our algorithm achieves the best asymptotic performance of all scan-based SW algorithms O(n/p+log(p)), and is very efficient in practice.

关键词： parallel processing Vectorization Bioinformatics Smith-Waterman

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parallel SAT Simplification on GPU architectures 25th

Parallel SAT Simplification on GPU Architectures

引用

25th international conference on Tools and algorithms for the Construction and Analysis of Systems (TACAS) held as part of the 22nd European Joint conferences on theory and Practice of Software (ETAPS)

作者： Osama, Muhammad Wijs, Anton Eindhoven Univ Technol NL-5600 MB Eindhoven Netherlands

ISBN: (纸本)9783030174620;9783030174613

the growing scale of applications encoded to Boolean Satisfiability (SAT) problems imposes the need for accelerating SAT simplifications or preprocessing. parallel SAT preprocessing has been an open challenge for many years. therefore, we propose novel parallel algorithms for variable and subsumption elimination targeting Graphics processing Units (GPUs). Benchmarks show that the algorithms achieve an acceleration of 66x over a state-of-the-art SAT simplifier (SatELite). Regarding SAT solving, we have conducted a thorough evaluation, combining both our GPU algorithms and SatELite with MiniSat to solve the simplified problems. In addition, we have studied the impact of the algorithms on the solvability of problems with Lingeling. We conclude that our algorithms have a considerable impact on the solvability of SAT problems.

关键词： Satisfiability Variable elimination Subsumption elimination parallel SAT preprocessing GPU

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Performance Estimation on Heterogeneous Systems: Making the most of Static Analysis

Performance Estimation on Heterogeneous Systems: Making the ...

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international conference on Signal processing and Integrated Networks (SPIN)

作者： K. Vanishree Madhura Purnaprajna Amrita School of Engineering Amrita Vishwa Vidyapeetham India

ISBN: (数字)9781728154756

ISBN: (纸本)9781728154763

Heterogeneous Computing System (HCS) comprising of accelerators such as GPU, FPGA and DSP are extensively used in the parallel computing domain. the diversity in their micro-architectures makes them suitable for the various parallel scientific applications. Most of the existing systems that address data distribution in HCS heavily depend on the target architecture that limits the design space exploration to a known device micro-architecture. In contrast, this work uses static code analysis to develop a target-independent performance model to suggest the suitability of a data-parallel regular application to CPU or GPU in an heterogeneous node. this model uses information available at compile time to estimate the performance and the objective is to statically obtain relative performance. With the performance estimates for both the CPU and GPU code for varied problem sizes, an application is classified as CPU-GPU or GPU-only. Furthermore, the approach also gives an optimal data distribution ratio for the application. this approach is evaluated using data-parallel applications that have varied speedups on GPU w.r.t. multi-core CPU. Using the proposed technique, an average performance improvement of 38.44% is seen across CPU-GPU benchmarks, with the co-execution of CPU+GPU as compared to CPU alone.

关键词： Graphics processing units Performance evaluation Kernel Instruction sets Static analysis Estimation Analytical models

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