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7th international conference on Software Process Improvement, CIMPS 2018

7th International Conference on Software Process Improvement...

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7th international conference on Software Process Improvement, CIMPS 2018

ISBN: (纸本)9783030011703

the proceedings contain 26 papers. the special focus in this conference is on Software Process Improvement. the topics include: Identifying the orientations of sustainable supply chain research using data mining techniques: Contributions and new developments;a systematic literature review on word embeddings;model for the improvement of knowledge management processes based on the use of gamification principles in companies in the software sector;intelligent mathematical modelling agent for supporting decision-making at industry 4.0;MBT4J: Automating the model-based testing process for java applications;Identification of UIDPs for developing medical apps;conceptual modelling of a mobile app for occupational safety using process and objectives patterns;pulAm: An app for monitoring crops;a computational measure of saliency of the texture based a saliency map by color;Methodologies, methods, techniques and tools used on SLR elaboration: A mapping study;automating an image processing chain of the sentinel-2 satellite;automated configuration of monitoring systems in an immutable infrastructure;using convolutional neural networks to recognition of dolphin images;a smart city’s model secured by blockchain;framework for the analysis of smart cities models;performance analysis of monolithic and micro service architectures – containers technology;a proposal for an electronic negotiation platform for tourism in low-density regions: Characterizing a functional analysis and prototype for the douro valley;from craftsmen into engineers during undergraduate education;gamification for improving software project management processes: A systematic literature review;information technology service management processes for very small organization: A proposed model.

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Design and Hardware Implementation of Bit Length Adjustable Cosine and Sine Generator with CORDIC Algorithm in FPGA

Design and Hardware Implementation of Bit Length Adjustable ...

引用

international conference on Electrical and Electronics Engineering, ELECO

作者： Bahadır Özkılbaç Tevhit Karacalı Atatürk Üniversitesi

ISBN: (数字)9786050113310

ISBN: (纸本)9781665414654

Today, the need for hardware architectures with fast calculation, high usage area efficiency and accuracy are increasing in digital systems. therefore, the algorithm used for the hardware to be designed and the number format in which this algorithm operates are quite important. In this study the hardware that calculates the cosine and sinus trigonometric functions commonly used in digital applications is designed in FPGA with Coordinate Rotation Digital Computer (CORDIC) algorithm which combines the three feature mentioned. the designed hardware operates in a two-complement signed integer format and the bit length is adjustable by the user. thus, a design with the advantages of high speed and usage area efficiency as well as flexibility has been created. Simulation and implementation of the design is done for the Xilinx Artix-7 FPGA model in Vivado software.

关键词： Field programmable gate arrays Hardware Table lookup Signal processing algorithms Silicon compounds Generators Digital computers

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Optimized FPGA Implementation of Elliptic Curve Cryptosystem over Prime Fields

Optimized FPGA Implementation of Elliptic Curve Cryptosystem...

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IEEE international conference on Trust, Security and Privacy in Computing and Communications (TrustCom)

作者： Guoqiang Yang Fanyu Kong Qiuliang Xu School of Software Shandong University Jinan China

ISBN: (数字)9781665403924

ISBN: (纸本)9781665403931

Elliptic curve cryptosystem has been widely applied in a lot of fields, such as finance, E-commerce and E-government. In this paper, we propose an optimized FPGA implementation of elliptic curve cryptosystem over 256-bit prime fields, which has high computational performance and low resource consumption. Specifically, we design a novel modular multiplier supporting four-level pipelining, which only needs 7 clock cycles to complete a single modular multiplication. It can process 4 modular multiplication operations (4 MMPO) simultaneously. We further design, on the basis of 4MMPO, a parallel architecture to efficiently implement point doubling and point addition operation. Finally, we testify the validity of our ECC processor on Xilinx's Virtex-7 FPGA platform. the result shows that it takes only 0.15ms for an elliptic curve point multiplication, the maximum frequency of the processor is about 123.27Mhz and the resource only needs 22938 look-up tables (LUTs).

关键词： Elliptic curves NIST Elliptic curve cryptography Table lookup parallel architectures Field programmable gate arrays Pipeline processing

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Reliability and Modelability Advantages of Distributed Switching for Reconfigurable 2D Processor Arrays

Reliability and Modelability Advantages of Distributed Switc...

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international conference and Workshop on Computing and Communication (IEMCON)

作者： Behrooz Parhami University of California Santa Barbara CA USA

ISBN: (数字)9781728184166

ISBN: (纸本)9781728184173

Processor arrays have been used, either as the main computation engine or as special-purpose adjuncts, for a variety of applications requiring very high performance. As the size of such an array increases, the possibility of processor malfunctions, leading to loss of computational capabilities, can no longer be ignored. While many switching architectures and reconfiguration algorithms have been proposed for building processor arrays, modeling of their reliability has been inadequately addressed. In this paper, I study differences between 2D processor arrays with centralized and distributed switching, pointing to advantages of the latter in terms of reliability, regularity, modularity, and VLSI realizability. As important side results, I formulate the notions of reliability inversion (a less reliable system prevailing over a more reliable one due to modeling uncertainties) and modelability (the property of a system that makes it possible to derive tight reliability bounds, thus making reliability inversion less likely).

关键词： Uncertainty Systematics Two dimensional displays Switches parallel processing Very large scale integration Reliability engineering

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Mapping Exceptions to High-Level Source Code on a Heterogeneous Architecture 9

Mapping Exceptions to High-Level Source Code on a Heterogene...

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9th international conference on parallel architectures, algorithms and Programming (PAAP)

作者： Duncan, Ralph Gougol, Nima Frandeen, Jim LookingGlass Cyber Solut San Jose CA 95134 USA

ISBN: (纸本)9781538694039

Network packet processing architectures use heterogeneous processors as accelerators to speed-up classic application domain tasks. Our platform compiles applications to bytecodes for a generalized packet processing machine, then uses microcoded interpreters running in parallel to trigger accelerators as needed. To make the system effective requires helping users debug apps, which includes tracking runtime exceptions. Exception tracking is complicated when a system-thrown exception is detected on an accelerator and the current binary form is far removed from the original high-level language source or associated assembly code. We tackle this problem by (1) instrumenting the compiler and a low-level bytecode tool, (2) reporting exceptions with the interpreter, (3) creating a specialized tool to collate the higher-level program forms with the lower-level bytecode forms. this functionality provides data needed for post-mortem program analysis.

关键词： parallel processing exceptions accelerators debugging software tools packet processing

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Automatic Identification Methods on a Corpus of Twenty Five Fine-Grained Arabic Dialects 7th

Automatic Identification Methods on a Corpus of Twenty Five ...

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7th international conference on Arabic Language processing (ICALP)

作者： Harrat, Salima Meftouh, Karima Abidi, Karima Smaili, Kamel Ecole Normale Super Bouzareah Algiers Algeria Badji Mokhtar Univ Annaba Algeria Loria Univ Lorraine Nancy France

ISBN: (纸本)9783030329594;9783030329587

this research deals with Arabic dialect identification, a challenging issue related to Arabic NLP. Indeed, the increasing use of Arabic dialects in a written form especially in social media generates new needs in the area of Arabic dialect processing. For discriminating between dialects in a multi-dialect context, we use different approaches based on machine learning techniques. To this end, we explored several methods. We used a classification method based on symmetric Kullback-Leibler, and we experimented classical classification methods such as Naive Bayes Classifiers and more sophisticated methods like Word2Vec and Long Short-Term Memory neural network. We tested our approaches on a large database of 25 Arabic dialects in addition to MSA.

关键词： Arabic dialects Automatic dialect identification Dialect resources parallel dialectal corpora

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Real Time Key Frame Extraction through parallel Computation of Entropy Difference 18th

Real Time Key Frame Extraction Through Parallel Computation ...

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18th international conference on Computer Information Systems and Industrial Management

作者： Gautam, Nandita Das, Debdoot Khatua, Sunirmal Saha, Banani Univ Calcutta Comp Sci Dept Kolkata 700098 India

ISBN: (纸本)9783030289560;9783030289577

the advancement of image processing in the field of Artificial Intelligence has created various research prospects in the area of object detection, pattern recognition etc. Capturing real time video stream for multiple cameras within a region of interest has become a common phenomenon for an Intelligent Situation Awareness System. Video processing is an important application which is rapidly developing nowadays as an area of extensive research. Content retrieval as well as information collection from a video requires both syntactic and semantic analysis. For a large video data, some set of frames are used to represent the video content. these are identified as key frames. Several algorithms have been defined to extract key frames from a stored video file. the existing algorithms that have been defined for key frame extraction are based on sequential mode. this paper looks into the extraction of key frames for any real time video stream. the experimental results show that there is an effective reduction in the execution time to a huge extent in the case of distributed processing as compared to the sequential processing of frames. In this paper, we propose a distributed framework to regulate the speed of key frame generation for heterogeneous speed of incoming video.

关键词： Real time streaming Key frames parallel computing Entropy

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Comparison of Neural Network Optimizers for Relative Ranking Retention Between Neural architectures 1

引用

15th IFIP WG 12.5 international conference on Artificial Intelligence Applications and Innovations, AIAI 2019

作者： Kyriakides, George Margaritis, Konstantinos University of Macedonia Thessaloniki55236 Greece

ISBN: (数字)9783030198237

ISBN: (纸本)9783030198220

Autonomous design and optimization of neural networks is gaining increasingly more attention from the research community. the main barrier is the computational resources required to conduct experimental and production project. Although most researchers focus on new design methodologies, the main computational cost remains the evaluation of candidate architectures. In this paper we investigate the feasibility of using reduced epoch training, by measuring the rank correlation coefficients between sets of optimizers, given a fixed number of training epochs. We discover ranking correlations of more than 0.75 and up to 0.964 between Adam with 50 training epochs, stochastic gradient descent with nesterov momentum with 10 training epochs and Adam with 20 training epochs. Moreover, we show the ability of genetic algorithms to find high-quality solutions of a function, by searching in a perturbed search space, given that certain correlation criteria are met. © 2019, IFIP international Federation for Information processing.

关键词： Genetic algorithms

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Implementation of ZYNQ for image defogging

Implementation of ZYNQ for image defogging

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IEEE Joint international Information Technology and Artificial Intelligence conference (ITAIC)

作者： Chao Zhang Shujie Bi Tao Jiang Jing Wang Weiming Mao School of Physics and Electronic Information Yunnan Normal University Kunming China Yunnan Normal University Kunming Yunnan People’s Republic of China

ISBN: (数字)9781728152448

ISBN: (纸本)9781728152455

In this paper, we propose a Zynq-based defogging algorithm for low-light images, firstly, we explain the background and significance of this topic, then we study several algorithms in Retinex, analyze and compare them to get the ideal algorithm. the VDMA module sends data to the 7-inch LCD LCD module (AN070) for control display; then use the mainstream pipeline design, parallel processing for the best FPGA to efficiently implement the Retinex-based image de-fogging algorithm porting, which mainly uses Vivado HLS to generate Retinex algorithm IP cores, including From RGB to HSV color space conversion, linear stretching of the S-space part of the attribute parameters and V-space part of the logarithmic operation, Gaussian fuzzy and other related algorithm modules, and finally download the debugging, optimization and summary of the system de-mist effect of various aspects of the algorithm.

关键词： System performance Pipelines Process control parallel processing Liquid crystal displays Field programmable gate arrays Optimization

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Performance of some image processing algorithms in TensorFlow 25

Performance of some image processing algorithms in TensorFlo...

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25th international conference on Systems, Signals and Image processing (IWSSIP)

作者： Demirovic, Damir Skejic, Emir Serifovic-Trbalic, Amira Univ Tuzla Fac Elect Engn Franjevacka 2 Tuzla 75000 Bosnia & Herceg

ISBN: (纸本)9781538669792

Signal, image and Synthetic Aperture Radar imagery algorithms in recent time are used in a daily routine. Due to huge data and complexity, their processing is almost impossible in a real time. Often image processing algorithms are inherently parallel in nature, so they fit nicely into parallel architectures multicore Central processing Unit (CPU) and Graphics processing Unit GPUs. In this paper image processing algorithms were evaluated, which are capable to execute in parallel manner on several platforms CPU and GPU. All algorithms were tested in TensorFlow, which is a novel framework for deep learning, but also for image processing. Relative speedups compared to CPU were given for all algorithms. TensorFlow GPU implementation can outperform multi-core CPUs for tested algorithms, obtained speedups range from 3.6 to 15 times.

关键词： image processing tensorflow parallel processing central processing unit graphics processing unit

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