检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

2,872 篇 会议
64 册 图书
45 篇 期刊文献

馆藏范围

2,980 篇 电子文献
1 种 纸本馆藏

日期分布

学科分类号

2,088 篇 工学
- 1,866 篇 计算机科学与技术...
- 969 篇 软件工程
- 351 篇 电气工程
- 271 篇 信息与通信工程
- 267 篇 电子科学与技术（可...
- 109 篇 控制科学与工程
- 76 篇 机械工程
- 63 篇 生物工程
- 50 篇 仪器科学与技术
- 48 篇 生物医学工程（可授...
- 41 篇 动力工程及工程热...
- 37 篇 光学工程
- 33 篇 建筑学
- 30 篇 材料科学与工程（可...
- 30 篇 土木工程
- 25 篇 化学工程与技术
- 25 篇 交通运输工程
- 24 篇 网络空间安全
- 23 篇 安全科学与工程
601 篇 理学
- 397 篇 数学
- 115 篇 物理学
- 68 篇 生物学
- 62 篇 系统科学
- 41 篇 化学
- 32 篇 统计学（可授理学、...
239 篇 管理学
- 160 篇 管理科学与工程(可...
- 101 篇 图书情报与档案管...
- 72 篇 工商管理
55 篇 医学
- 48 篇 临床医学
25 篇 经济学
- 25 篇 应用经济学
21 篇 法学
15 篇 文学
14 篇 农学
4 篇 军事学
3 篇 教育学
1 篇 艺术学

主题

365 篇 parallel process...
190 篇 graphics process...
170 篇 computer archite...
135 篇 parallel archite...
121 篇 graphics process...
113 篇 hardware
106 篇 parallel algorit...
104 篇 parallel process...
83 篇 computational mo...
79 篇 instruction sets
78 篇 image processing
75 篇 signal processin...
70 篇 multicore proces...
69 篇 parallel program...
68 篇 field programmab...
63 篇 concurrent compu...
63 篇 gpu
62 篇 algorithm design...
62 篇 kernel
60 篇 optimization

机构

9 篇 natl univ def te...
6 篇 hosei univ dept ...
6 篇 school of comput...
6 篇 inria rennes
6 篇 national laborat...
5 篇 college of compu...
5 篇 univ aizu dept c...
5 篇 college of compu...
5 篇 karlsruhe instit...
5 篇 city university ...
5 篇 st francis xavie...
4 篇 queens univ belf...
4 篇 nanyang technol ...
4 篇 chinese acad sci...
4 篇 univ chinese aca...
4 篇 hainan internati...
4 篇 department of co...
4 篇 universidad carl...
4 篇 sun yat-sen univ...
4 篇 institute of com...

作者

11 篇 jack dongarra
8 篇 roman wyrzykowsk...
8 篇 quintana-orti en...
7 篇 hannig frank
7 篇 teich juergen
7 篇 nakano koji
7 篇 konrad karczewsk...
6 篇 ito yasuaki
6 篇 liu jie
6 篇 carretero jesus
6 篇 peng shietung
6 篇 li yamin
6 篇 chu wanming
6 篇 wang gang
5 篇 dongarra jack
5 篇 wanlei zhou
5 篇 qian depei
5 篇 namyst raymond
5 篇 ewa deelman
5 篇 dolz manuel f.

语言

2,907 篇 英文
63 篇 其他
16 篇 中文
2 篇 俄文

检索条件"任意字段=7th International Conference on Algorithms and Architectures for Parallel Processing"

共 2981 条记录，以下是731-740 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

12th international conference on parallel processing and Applied Mathematics, PPAM 2017

12th International Conference on Parallel Processing and App...

引用

12th international conference on parallel processing and Applied Mathematics, PPAM 2017

ISBN: (纸本)9783319780238

the proceedings contain 101 papers. the special focus in this conference is on parallel processing and Applied Mathematics. the topics include: Performance and energy analysis of scientific workloads executing on LPSoCs;Energy Efficient dynamic load balancing over multiGPU heterogeneous systems;scheduling data gathering with maximum lateness objective;Fair scheduling in grid VOs with anticipation heuristic;a security-driven approach to online job scheduling in IaaS cloud computing systems;dynamic load balancing algorithm for heterogeneous clusters;multi-objective extremal optimization in processor load balancing for distributed programs;pardis: A process calculus for parallel and distributed programming in haskell;towards high-performance python;Using GPGPU accelerated interpolation algorithms for marine bathymetry processing with on-premises and cloud based computational resources;actor model of a new functional language - Anemone;Almost optimal column-wise prefix-sum computation on the GPU;A combination of intra- and inter-place work stealing for the APGAS library;Benchmarking molecular dynamics with OpenCL on many-core architectures;efficient language-based parallelization of computational problems using cilk plus;a taxonomy of task-based technologies for high-performance computing;Interoperability of GASPI and MPI in large scale scientific applications;Evaluation of the parallel performance of the java and PCJ on the intel KNL based systems;Fault-tolerance mechanisms for the java parallel codes implemented with the PCJ library;Exploring graph analytics with the PCJ toolbox;Relaxing the correctness conditions on concurrent data structures for multicore CPUs. A numerical case study;Big data analytics in java with PCJ library: Performance comparison with hadoop;parallel exact diagonalization approach to large molecular nanomagnets modelling.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Compact Deep Neural Networks for Computationally Efficient Gesture Classification From Electromyography Signals 7

Compact Deep Neural Networks for Computationally Efficient G...

引用

7th IEEE international conference on Biomedical Robotics and Biomechatronics (BIOROB)

作者： Hartwell, Adam Kadirkamanathan, Visakan Anderson, Sean R. Univ Sheffield Dept Automat Control & Syst Engn Sheffield S13JD S Yorkshire England

ISBN: (纸本)9781538681831

Machine learning classifiers using surface electromyography are important for human-machine interfacing and device control. Conventional classifiers such as support vector machines (SVMs) use manually extracted features based on e.g. wavelets. these features tend to be fixed and non-person specific, which is a key limitation due to high person-to-person variability of myography signals. Deep neural networks, by contrast, can automatically extract person specific features - an important advantage. However, deep neural networks typically have the drawback of large numbers of parameters, requiring large training data sets and powerful hardware not suited to embedded systems. this paper solves these problems by introducing a compact deep neural network architecture that is much smaller than existing counterparts. the performance of the compact deep net is benchmarked against an SVM and compared to other contemporary architectures across 10 human subjects, comparing Myo and Delsys Trigno electrode sets. the accuracy of the compact deep net was found to be 84.2 +/- 0.06% versus 70.5 +/- 0.07% for the SVM on the Myo, and 80.3 +/- 0.07% versus 67.8 +/- 0.09% for the Delsys system, demonstrating the superior effectiveness of the proposed compact network, which had just 5,889 parameters - orders of magnitude less than some contemporary alternatives in this domain while maintaining better performance.

关键词： Electrodes Neural networks Feature extraction Support vector machines Graphics processing units Convolution Embedded systems

来源：评论

学校读者我要写书评

暂无评论

A Survey on parallel Database Systems from a Storage Perspective: Rows Versus Columns 3rd

A Survey on Parallel Database Systems from a Storage Perspec...

引用

29th international conference on Database and Expert Systems Applications (DEXA)

作者： Ordonez, Carlos Bellatreche, Ladjel Univ Houston Houston TX 77004 USA LIAS ISAE ENSMA Poitiers France

ISBN: (纸本)9783319991337;9783319991320

Big data requirements have revolutionized database technology, bringing many innovative and revamped DBMSs to process transactional (OLTP) or demanding query workloads (cubes, exploration, preprocessing). parallel and main memory processing have become important features to exploit new hardware and cope with data volume. With such landscape in mind, we present a survey comparing modern row and columnar DBMSs, contrasting their ability to write data (storage mechanisms, transaction processing, batch loading, enforcing ACID) and their ability to read data (query processing, physical operators, sequential vs parallel). We provide a unifying view of alternative storage mechanisms, database algorithms and query optimizations used across diverse DBMSs. We contrast the architecture and processing of a parallel DBMS with an HPC system. We cover the full spectrum of subsystems going from storage to query processing. We consider parallel processing and the impact of much larger RAM, which brings back main-memory databases. We then discuss important parallel aspects including speedup, sequential bottlenecks, data redistribution, high speed networks, main memory processing with larger RAM and fault-tolerance at query processing time. We outline an agenda for future research.

关键词： Query processing

来源：评论

学校读者我要写书评

暂无评论

Towards Embedded Heterogeneous FPGA-GPU Smart Camera architectures for CNN Inference 2019

Towards Embedded Heterogeneous FPGA-GPU Smart Camera Archite...

引用

Proceedings of the 13th international conference on Distributed Smart Cameras

作者： Walther Carballo-Hernández François Berry Maxime Pelcat Miguel Arias-Estrada Department of Images Perception Systems and Robotics Institut Pascal Aubière France Department of Images Institut National des Sciences Appliquées (INSA) des Rennes IETR UMR CNRS Rennes France Department of Computer Science Instituto Nacional de Astrofísica (Óptica y Electrónica (INAOE) Puebla Mexico

ISBN: (纸本)9781450371896

the success of Deep Learning (DL) algorithms in computer vision tasks have created an on-going demand of dedicated hardware architectures that could keep up with the their required computation and memory complexities. this task is particularly challenging when embedded smart camera platforms have constrained resources such as power consumption, processing Element (PE) and communication. this article describes a heterogeneous system embedding an FPGA and a GPU for executing CNN inference for computer vision applications. the built system addresses some challenges of embedded CNN such as task and data partitioning, and workload balancing. the selected heterogeneous platform embeds an Nvidia® Jetson TX2 for the CPU-GPU side and an Intel Altera® Cyclone10GX for the FPGA side interconnected by PCIe Gen2 with a MIPI-CSI camera for prototyping. this test environment will be used as a support for future work on a methodology for optimized model partitioning.

关键词： Internet of things Field Programmable Gate Array (FPGA) Graphic processing Unit (GPU) Deep Learning (DL) Edge Computing processing Elements (PE) Artificial Neural Networks (ANN) Single Instruction Multiple Data Convolutional Neural Networks (CNN) Models of Computation and Architecture Pipelining Heterogeneous Computing parallel Programming

来源：评论

学校读者我要写书评

暂无评论

SODA: Stencil with Optimized Dataflow Architecture 18

SODA: Stencil with Optimized Dataflow Architecture

引用

37th IEEE/ACM international conference on Computer-Aided Design (ICCAD)

作者： Chi, Yuze Cong, Jason Wei, Peng Zhou, Peipei Univ Calif Los Angeles Los Angeles CA 90095 USA

ISBN: (纸本)9781450359504

Stencil computation is one of the most important kernels in many application domains such as image processing, solving partial differential equations, and cellular automata. Many of the stencil kernels are complex, usually consist of multiple stages or iterations, and are often computation-bounded. Such kernels are often offloaded to FPGAs to take advantages of the efficiency of dedicated hardware. However, implementing such complex kernels efficiently is not trivial, due to complicated data dependencies, difficulties of programming FPGAs with RTL, as well as large design space. In this paper we present SODA, an automated framework for implementing Stencil algorithms with Optimized Dataflow Architecture on FPGAs. the SODA microarchitecture minimizes the on-chip reuse buffer size required by full data reuse and provides flexible and scalable fine-grained parallelism. the SODA automation framework takes high-level user input and generates efficient, high-frequency dataflow implementation. this significantly reduces the difficulty of programming FPGAs efficiently for stencil algorithms. the SODA design-space exploration framework models the resource constraints and searches for the performance-optimized configuration with accurate models for post-synthesis resource utilization and on-board execution throughput. Experimental results from on-board execution using a wide range of benchmarks show up to 3.28x speed up over 24-thread CPU and our fully automated framework achieves better performance compared with manually designed state-of-the-art FPGA accelerators.

关键词： Kernel Field programmable gate arrays parallel processing Microarchitecture System-on-chip throughput Programming

来源：评论

学校读者我要写书评

暂无评论

Self Parking car prototype 7

Self Parking car prototype

引用

7th international conference on Computing, Communications and Informatics (ICACCI)

作者： Singh, Anukriti Chandra, Aditi Priyadarshni, Divya Joshi, Nisheeth Banasthali Vidyapith Bajaj Sch Automat Jaipur Rajasthan India Banasthali Univ Bajaj Sch Automat Jaipur Rajasthan India Banasthali Univ Dept Comp Sci Jaipur Rajasthan India

ISBN: (纸本)9781538653142

With the increase in population, the parking space is swarming with cars, which lead to collision accidents. People wait in long queues to get their cars parked. To solve this issue, we present a simple yet effective method for implementing low cost self-parking car. Hardware like raspberry pi 3, infrared sensors and webcam are used. We experimented other methods of parking the car with our prototype like parallel and perpendicular parking. the formula for perfect parallel parking is also discussed. the car is planned to be made smarter by data handling and machine learning. We propose to store the information from Google maps in the computer system of the car, also with machine learning and image processing the car learns about different scenarios. the results show how self-parking can be implemented to regular cars and an ample amount of time and money can be saved.

关键词： self-parking raspberry pi parallel- parking perpendicular- parking sideways- parking

来源：评论

学校读者我要写书评

暂无评论

Efficient filter-based algorithms for exact set similarity join on GPUs 19th

Efficient filter-based algorithms for exact set similarity j...

引用

19th international conference on Enterprise Information Systems, ICEIS 2017

作者： Quirino, Rafael David Ribeiro-Junior, Sidney Ribeiro, Leonardo Andrade Martins, Wellington Santos Alameda Palmeiras Quadra D Campus Samambaia GoianiaGoias74001-970 Brazil

ISBN: (纸本)9783319933740

Set similarity join is a core operation for text data integration, cleaning, and mining. Most state-of-the-art solutions rely on inherently sequential, CPU-based algorithms. In this paper, we propose a parallel algorithm for the set similarity joins harnessing the power of GPU systems through filtering techniques and divide-and-conquer strategies that scale well with data size. Furthermore, we also present parallel algorithms for all data pre-processing phases. As a result, we have an end-to-end solution to the set similarity join problem, which receives input text data and outputs pairs of similar strings and is entirely executed on the GPU. Our experimental results on standard datasets show substantial speedups over the fastest algorithms in the literature. © Springer international Publishing AG, part of Springer Nature 2018.

关键词： Graphics processing unit

来源：评论

学校读者我要写书评

暂无评论

Performance Evaluation of DBN Learning on Intel Multi- and Manycore architectures 12th

Performance Evaluation of DBN Learning on Intel Multi- and M...

引用

12th international conference on parallel processing and Applied Mathematics (PPAM)

作者： Olas, Tomasz Mleczko, Wojciech K. Wozniak, Marcin Nowicki, Robert K. Gepner, Pawel Czestochowa Tech Univ Inst Comp & Informat Sci Dabrowskiego 69 PL-42201 Czestochowa Poland Czestochowa Tech Univ Inst Computat Intelligence Armii Krajowej 36 PL-42201 Czestochowa Poland Intel Corp Santa Clara CA USA

ISBN: (纸本)9783319780245;9783319780238

In our previous papers [12,13], we proposed the parallel realization of the Deep Belief Network (DBN). this research confirmed the potential usefulness of the first generation of the Intel MIC architecture for implementing DBN and similar algorithms. In this work, we investigate how the Intel MIC and CPU platforms can be applied to implement efficiently the complete learning process using DBNs with layers corresponding to the Restricted Boltzman Machines. the focus is on the new generation of Intel MIC devices known as Knights Landing. Unlike the previous generation, called Knights Corner, they are delivered not as coprocessors, but as standalone processors. the learning procedure is based on the matrix approach, where learning samples are grouped into packages, and represented as matrices. We study the possible ways of improving the performance taking into account features of the Knights Landing architecture, and parameters of the learning algorithm. In particular, the influence of the package size on the accuracy of learning, as well as on the performance of computations are investigated using conventional CPU and Intel Xeon Phi. the performance advantages of Knights Landing over Knights Corner are presented and discussed.

关键词： Deep Belief Network Restricted Boltzman Machine Multi- and manycore architectures OpenMP Intel Xeon Phi Knights Landing

来源：评论

学校读者我要写书评

暂无评论

A GPU-based WFST Decoder with Exact Lattice Generation 19

A GPU-based WFST Decoder with Exact Lattice Generation

引用

19th Annual conference of the international-Speech-Communication-Association (INTERSPEECH 2018)

作者： Chen, Zhehuai Luitjens, Justin Xu, Hainan Wang, Yiming Povey, Daniel Khudanpur, Sanjeev Shanghai Jiao Tong Univ Dept Comp Sci & Engn SpeechLab Shanghai Peoples R China NVIDIA Santa Clara CA USA Johns Hopkins Univ Ctr Language & Speech Proc Baltimore MD 21218 USA

ISBN: (纸本)9781510872219

We describe initial work on an extension of the Kaldi toolkit that supports weighted finite-state transducer (WFST) decoding on Graphics processing Units (GPUs). We implement token recombination as an atomic GPU operation in order to fully parallelize the Viterbi beam search, and propose a dynamic load balancing strategy for more efficient token passing scheduling among GPU threads. We also redesign the exact lattice generation and lattice pruning algorithms for better utilization of the GPUs. Experiments on the Switchboard corpus show that the proposed method achieves identical 1-best results. and lattice quality in recognition and confidence measure tasks, while running 3 to 15 times faster than the single process Kaldi decoder. the above results are reported on different GPU architectures. Additionally we obtain a 46-fold speedup with sequence parallelism and multi-process service (MPS) in GPU.

关键词： ASR Decoder parallel Computing WFST GPU Lattice processing Confidence Measure

来源：评论

学校读者我要写书评

暂无评论

Implementation of beamforming for large-scale circular array sonar based on parallel FIR filter structure in FPGA 18th

Implementation of beamforming for large-scale circular array...

引用

18th international conference on algorithms and architectures for parallel processing - ICA3PP 2018 Collocated Workshops: ICA3PP 2018 Workshop on Intelligent algorithms for Large-scale Complex Optimization Problems, IALCOP 2018, ICA3PP 2018 Workshop on Security and Privacy in Data processing, SPDP 2018

作者： Wang, Jun Jiao, Junsheng Science and Technology on Sonar Laboratory Hangzhou Applied Acoustics Research Institute Hangzhou China

ISBN: (纸本)9783030052331

In this paper, the directivity of the circular array is analyzed, real-time beamforming algorithm of circular array in frequency domain similar to parallel FIR filter structure is proposed by using the characteristic of the same directivity in different directions and the characteristic of steer vector symmetry. the coefficients of parallel FIR (Finite Impulse Response) filters are constant, while the steer vector of each frequency in the beamforming algorithm is variable, so the coefficients (steer vector) of the beamforming parallel filter need to be dynamically changed according to the frequency points. For frequency domain beamforming of high frequency large-scale circular array sonar, this algorithm only needs two shift registers, complex multipliers which is half the number of elements used in beamforming and a few logic resources to calculate steer vector in FPGA (Field Programmable Gate Array), and the algorithm can run at a higher working frequency. the lake-trial result shows that this parallel algorithm satisfies the real-time requirements of high-frequency large-scale circular array sonar, and the sonar has good azimuth resolution and detection performance. © Springer Nature Switzerland AG 2018.

关键词： Beamforming

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共299页 << < 70 71 72 73 74 75 76 77 78 79 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：