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Adaptive Pattern Matching with Reinforcement Learning for Dynamic Graphs 25

Adaptive Pattern Matching with Reinforcement Learning for Dy...

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25th IEEE international conference on High Performance Computing, Data and Analytics (HiPC)

作者： Kanezashi, Hiroki Suzumura, Toyotaro Garcia-Gasulla, Dario Oh, Min-hwan Matsuoka, Satoshi Tokyo Inst Technol Meguro Ku 2-12-1 Ookayama Tokyo 1528550 Japan IBM TJ Watson Res Ctr 1101 Kitchawan Rd Yorktown Hts NY 10598 USA Barcelona Supercomp Ctr 29-31 Carrer Jordi Girona Barcelona Spain Columbia Univ 500 W 120th St New York NY 10027 USA RIKEN Ctr Computat Sci Chuo Ku 7-1-26 Minatojima Minamimachi Kobe Hyogo 6500047 Japan

ISBN: (纸本)9781538683866

Graph pattern matching algorithms to handle million-scale dynamic graphs are widely used in many applications such as social network analytics and suspicious transaction detections from financial networks. On the other hand, the computation complexity of many graph pattern matching algorithms is expensive, and it is not affordable to extract patterns from million-scale graphs. Moreover, most real-world networks are time-evolving, updating their structures continuously, which makes it harder to update and output newly matched patterns in real time. Many incremental graph pattern matching algorithms which reduce the number of updates have been proposed to handle such dynamic graphs. However, it is still challenging to recompute vertices in the incremental graph pattern matching algorithms in a single process, and that prevents the real-time analysis. We propose an incremental graph pattern matching algorithm to deal with time-evolving graph data and also propose an adaptive optimization system based on reinforcement learning to recompute vertices in the incremental process more efficiently. then we discuss the qualitative efficiency of our system with several types of data graphs and pattern graphs. We evaluate the performance using million-scale attributed and time-evolving social graphs. Our incremental algorithm is up to 10.1 times faster than an existing graph pattern matching and 1.95 times faster with the adaptive systems in a computation node than naive incremental processing.

关键词： Data Science Big Data Systems and Software Big Data algorithms and Analytics Network theory (graphs) Pattern matching Data mining Iterative learning control

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RiBoSOM: Rapid Bacterial Genome Identification Using Self-Organizing Map implemented on the Synchoros SiLago Platform 18

RiBoSOM: Rapid Bacterial Genome Identification Using Self-Or...

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18th international conference on Embedded Computer Systems - architectures, Modeling, and Simulation (SAMOS)

作者： Yang, Yu Stathis, Dimitrios Sharma, Prashant Paul, Kolin Hemani, Ahmed Grabherr, Manfred Ahmad, Rafi Royal Inst Technol KTH Stockholm Sweden Indian Inst Technol Delhi Delhi India Uppsala Univ Uppsala Sweden Inland Norway Univ Appl Sci Hamar Norway

ISBN: (纸本)9781450364942

Artificial Neural Networks have been applied to many traditional machine learning applications in image and speech processing. More recently, ANNs have caught attention of the bioinformatics community for their ability to not only speed up by not having to assemble genomes but also work with imperfect data set with duplications. ANNs for bioinformatics also have the added attraction of better scaling for massive parallelism compared to traditional bioinformatics algorithms. In this paper, we have adapted Self-organizing Maps for rapid identification of bacterial genomes called BioSOM. BioSOM has been implemented on a design of two coarse grain reconfigurable fabrics customized for dense linear algebra and streaming scratchpad memory respectively. these fabrics are implemented in a novel synchoros VLSI design style that enables composition by abutment. the synchoricity empowers rapid and accurate synthesis from Matlab models to create near ASIC like efficient solution. this platform, called SiLago (Silicon Lego) is benchmarked against a GPU implementation. the SiLago mentation of BioSOMs in four different dimensions, 128, 256, 512 and 1024 Neurons, were trained for two E Coli strains of bacteria with 40K training vectors. the results of SiLago implementation were benchmarked against a GPU GTX 1070 implementation in the CUDA framework. the comparison reveals 4 to 140x speed up and 4 to 5 orders of improvement in energy-delay product compared to implementation on GPU. this extreme efficiency comes with the added benefit of automated generation of GDSII level design from Matlab by using the Synchoros VLSI design style.

关键词： Neural networks Self-Organizing Maps SiLago Synchoros VLSI Design parallel architecture 3D DRAM GPU

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A Storm-Based parallel Clustering Algorithm of Streaming Data 25th

A Storm-Based Parallel Clustering Algorithm of Streaming Dat...

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25th international conference on Neural Information processing (ICONIP)

作者： Xu, Fang-Zhu Jiang, Zhi-Ying He, Yan-Lin Wang, Ya-Jie Zhu, Qun-Xiong Beijing Univ Chem Technol Coll Informat Sci & Technol Beijing 100029 Peoples R China Minist Educ China Engn Res Ctr Intelligent PSE Beijing 100029 Peoples R China Guizhou Food Safety Testing Engn Technol Res Ctr Guiyang Guizhou Peoples R China

ISBN: (纸本)9783030042127;9783030042110

Aiming at solving the shortcomings of traditional Single-Pass clustering algorithms, such as low accuracy and large amount of computation, a novel Storm-based parallel Single-Pass clustering algorithm is proposed to discovery of hot events in the food field. In order to solve the problem of data inconsistency in parallel computing, a method of dynamically acquiring cluster increments and random delays is adopted to improve the Single-Pass algorithm. In order to validate the performance of the proposed method, a case study of news events classification is carried out. Simulation results show that the proposed algorithm can effectively improve the cluster repetition in clustering results and greatly improve the accuracy and efficiency of clustering compared with the traditional Single-Pass algorithm.

关键词： parallel clustering Streaming data Single-Pass algorithm

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ACM international conference Proceeding Series

ACM International Conference Proceeding Series

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18th Annual international conference on Embedded Computer Systems: architectures, MOdeling and Simulation, SAMOS 2018

ISBN: (纸本)9781450364942

the proceedings contain 33 papers. the topics discussed include: a performance evaluation of multi-FPGA architectures for computations of information transfer;massively parallel computation of linear recurrence equations with graphics processing units;a first-order approximation of microarchitecture energy-efficiency;delays and states in dataflow models of computation;communication-aware scheduling algorithms for synchronous dataflow graphs on multicore systems;towards power management verification of time-triggered systems using virtual platforms;architectural considerations for FPGA acceleration of machine learning applications in MapReduce;and fast parallel simulation of a manycore architecture with a flit-level on-chip network model.

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Evaluating Dynamic Scheduling of Tasks in Mobile architectures Using parallelME Framework 18th

Evaluating Dynamic Scheduling of Tasks in Mobile Architectur...

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18th international conference on Computational Science (ICCS)

作者： Carvalho, Rodrigo Andrade, Guilherme Santana, Diogo Silveira, thiago Madeira, Daniel Sachetto, Rafael Ferreira, Renato Rocha, Leonardo Univ Fed Sao Joao del Rei Sao Joao Del Rei Brazil Univ Fed Minas Gerais Belo Horizonte MG Brazil Tsinghua Univ Technol Beijing Peoples R China

ISBN: (纸本)9783319937137;9783319937120

Recently we observe that mobile phones stopped being just devices for basic communication to become providers of many applications that require increasing performance for good user experience. Inside today's mobile phones we find different processing units (PU) with high computational capacity, as multicore architectures and co-processors like GPUs. Libraries and run-time environments have been proposed to improve applications' performance by taking advantage of different PUs in a transparent way. Among these environments we can highlight the parallelME. Despite the importance of task scheduling strategies in these environments, parallelME has implemented only the First Come Firs Serve (FCFS) strategy. In this paper we extended the parallelME framework by implementing and evaluating two different dynamic scheduling strategies, Heterogeneous Earliest Finish Time (HEFT) and Performance-Aware Multiqueue Scheduler (PAMS). We evaluate these strategies considering synthetic applications, and compare the proposals with the FCFS. For some scenarios, PAMS was proved to be up to 39% more efficient than FCFS. these gains usually imply on lower energy consumption, which is very desirable when working with mobile architectures.

关键词： Dynamic scheduling parallel mobile architectures

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Multi-BSP vs. BSP: A Case of Study for Dell AMD Multicores

Multi-BSP vs. BSP: A Case of Study for Dell AMD Multicores

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Euromicro international conference on parallel, Distributed and Network-Based processing

作者： Guillermo Trabes Veronica Gil-Costa Marcela Printista Mauricio Marin LIDIC-Departamento de Informática Universidad Nacional de San Luis CCT San Luis Universidad Nacional de San Luis and CONICET CeBiB Universidad de Santiago de Chile

Computer models have been used as a bridge between parallel algorithms and hardware architectures. the Bulk-Synchronous parallel (BSP) is a well-known computing model originally devised for distributed algorithms running on clusters of single-core processors. the Multi-BSP model, that extends the classic BSP model, was recently proposed for multi-core processors. However, this model -implemented through the MulticoreBSP-for-C library-presents some restrictions such as the explicit synchronizations between the cores, introducing some challenges on which the hardware characteristics should be taken into account to properly model the parallel algorithms. therefore, we explore the suitability of these models for the Dell multi-core architecture. the objectives of this contribution are twofold. First, we model two different multi-core Dell architectures. Second, we show that a simple model with few parameters can be easily adapted to each Dell platform rather than complex models which tends to use tricky hardware parameters.

关键词： parallel computing models Bulk-synchronous parallel - BSP Multi-BSP Dell multi-cores

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Distanceless Label Propagation: an Efficient Direct Connected Component Labeling Algorithm for GPUs 7

Distanceless Label Propagation: an Efficient Direct Connecte...

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7th international conference on Image processing theory, Tools and Applications (IPTA)

作者： Cabaret, Laurent Lacassagne, Lionel Etiemble, Daniel Cent Supelec MICS Paris France UPMC CNRS LIP6 Paris France Univ Paris Sud LRI Paris France

ISBN: (纸本)9781538618424

Modern computer architectures are mainly composed of multi-core processors and GPUs. Consequently, solely providing a sequential implementation of algorithms or comparing algorithm performance without regard to architecture is no longer pertinent. Today, algorithms have to address parallelism, multithreading and memory topology (private/shared memory, cache or scratchpad, ...). Most Connected Component Labeling (CCL) algorithms are sequential, direct and optimized for processors. Few were designed specifically for GPU architectures and none were designed to be adapted to different architectures. the most efficient GPU implementations are iterative;in order to manage synchronizations between processing units, but the number of iterations depends on the image shape and density. this paper describes the DLP (Distanceless Label Propagation) algorithms, an adaptable set of algorithms usable both on GPU and multi-core architectures, and DLP-GPU, an efficient direct CCL algorithm for GPU based on DLP mechanisms.

关键词： Computer architecture Labeling Graphics processing units Shape Optimization Iterative algorithms

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7th CCF international conference on Natural Language processing and Chinese Computing, NLPCC 2018

7th CCF International Conference on Natural Language Process...

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7th CCF international conference on Natural Language processing and Chinese Computing, NLPCC 2018

ISBN: (纸本)9783319995007

the proceedings contain 86 papers. the special focus in this conference is on Natural Language processing and Chinese Computing. the topics include: Learning Dialogue History for Spoken Language Understanding;a Neural Question Generation System Based on Knowledge Base;projR: Embedding Structure Diversity for Knowledge Graph Completion;BiTCNN: A Bi-Channel Tree Convolution Based Neural Network Model for Relation Classification;using Entity Relation to Improve Event Detection via Attention Mechanism;Five-Stroke Based CNN-BiRNN-CRF Network for Chinese Named Entity Recognition;Learning BLSTM-CRF with Multi-channel Attribute Embedding for Medical Information Extraction;distant Supervision for Relation Extraction with Neural Instance Selector;complex Named Entity Recognition via Deep Multi-task Learning from Scratch;perception and Production of Mandarin Monosyllabic Tones by Amdo Tibetan College Students;hierarchical Attention Based Semi-supervised Network Representation Learning;joint Binary Neural Network for Multi-label Learning with Applications to Emotion Classification;accelerating Graph-Based Dependency Parsing with Lock-Free parallel Perceptron;memory-Based Matching Models for Multi-turn Response Selection in Retrieval-Based Chatbots;NEUTag’s Classification System for Zhihu Questions Tagging Task;Otem&Utem: Over- and Under-Translation Evaluation Metric for NMT;improved Neural Machine Translation with Chinese Phonologic Features;coarse-To-Fine Learning for Neural Machine Translation;source Segment Encoding for Neural Machine Translation;Youdao’s Winning Solution to the NLPCC-2018 Task 2 Challenge: A Neural Machine Translation Approach to Chinese Grammatical Error Correction;effective Character-Augmented Word Embedding for Machine Reading Comprehension;target Extraction via Feature-Enriched Neural Networks Model;A Novel Attention Based CNN Model for Emotion Intensity Prediction;Recurrent Neural CRF for Aspect Term Extraction with Dependency Transmission.

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7th CCF international conference on Natural Language processing and Chinese Computing, NLPCC 2018

7th CCF International Conference on Natural Language Process...

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7th CCF international conference on Natural Language processing and Chinese Computing, NLPCC 2018

ISBN: (纸本)9783319994949

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Greed is Good: parallel algorithms for Bipartite-Graph Partial Coloring on Multicore architectures 46

Greed is Good: Parallel Algorithms for Bipartite-Graph Parti...

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46th international conference on parallel processing Workshops (ICPPW)

作者： Tas, Mustafa Kemal Kaya, Kamer Saule, Erik Sabanci Univ Comp Sci & Engn Istanbul Turkey Ohio State Univ Dept Biomed Informat Columbus OH 43210 USA Univ N Carolina Comp Sci Charlotte NC 28223 USA

ISBN: (纸本)9781538610428

In parallel computing, a valid graph coloring yields a lock-free processing of the colored tasks, data points, etc., without expensive synchronization mechanisms. However, coloring is not free and the overhead can be significant. In particular, for the bipartite-graph partial coloring (BGPC) and distance-2 graph coloring (D2GC) problems, which have various use-cases within the scientific computing and numerical optimization domains, the coloring overhead can be in the order of minutes with a single thread for many real-life graphs. In this work, we propose parallel algorithms for bipartite-graph partial coloring on shared-memory architectures. Compared to the existing shared-memory BGPC algorithms, the proposed ones employ greedier and more optimistic techniques that yield a better parallel coloring performance. In particular, on 16 cores, the proposed algorithms are more than 4x faster than their counterparts in the ColPack library which is, to the best of our knowledge, the only publicly-available coloring library for multicore architectures. In addition to BGPC, the proposed techniques are employed to devise parallel distance-2 graph coloring algorithms and similar performance improvements have been observed. Finally, we propose two costless balancing heuristics for BGPC that can reduce the skewness and imbalance on the cardinality of color sets (almost) for free. the heuristics can also be used for the D2GC problem and in general, they will probably yield a better color-based parallelization performance especially on many-core architectures.

关键词： Greedy graph coloring bipartite-graph coloring distance-2 coloring shared-memory parallel algorithms

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