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检索条件"任意字段=7th International Conference on Functional Programming"

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Dynamic programming: NFA simulation 02

Dynamic programming: NFA simulation

引用

Proceedings of the 7th international conference on Implementation and application of automata

作者： Jan Holub Department of Computer Science and Engineering Czech Technical University Czech Republic

ISBN: (纸本)9783540403913

Nondeterministic finite automaton (NFA) cannot be directly used because of its nondeterminism. One way how to use NFA is to determinize NFA and the second way is to use one of simulation methods. this paper deals with one of the simulation method called dynamic programming. We present the method on one of the pattern matching problems as well as modifications for several other tasks.

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Extending WSDL to facilitate Web services testing

Extending WSDL to facilitate Web services testing

引用

IEEE international Symposim on High Assurance Systems Engineering

作者： W.T. Tsai R. Paul Yamin Wang Chun Fan Dong Wang Department of Computer Science and Engineering Arizona State University Tempe AZ USA Department of Defense Washington D.C. DC USA Department of Computer Science and Engineering University of Minnesota Minneapolis MN USA

Web services might be the most popular and powerful software development technology in today's software world. Yet it brings software developers and testers a lot of challenges also. this is mainly caused by the insufficient information provided by the WSDL file of a Web service. From the WSDL file, we can not get the information useful for testing, such as dependence information. To solve this problem, we proposed and practiced to extend the WSDL to support this kind of information description. In this paper, four kinds of extension are considered: input-output dependency, invocation sequence, hierarchical functional description and concurrent sequence specifications. Also their advantages are discussed.

关键词： Web services Software testing Computer science Power engineering and energy System testing programming Simple object access protocol Standards development Runtime Java

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Assisting decision making in requirements reconciliation

Assisting decision making in requirements reconciliation

引用

international conference on Computer Supported Cooperative Work in Design

作者： D. Richards K. Boettger Department of Computing Division of Information and Communications Sciences Macquarie University Sydney Australia

Capturing a consistent, complete and valid set of requirements is a critical prerequisite for designing systems that are useful and usable. One popular technique for capturing the main chunks of functionality from the user's point of view is the specification of use cases by the development team. While there may be agreement at this high level, there are often differences in what each stakeholder perceives as the steps of the use case description. Often the description reflects the views of one or a few dominant individuals resulting in incomplete use case descriptions that do not represent the requirements of the whole group. In our approach, known as RECOCASE as we use a CASE tool to assist requirements reconciliation, the group identify and then asynchronously capture multiple requirements viewpoints. the use case descriptions are entered in natural language and automatically processed by our system to produce a concept lattice. the concept lattice is used to reveal common ground and differences between the stakeholders. Our group process enables conflicts to be identified and resolved, where possible, using our negotiation strategies and resolution operators.

关键词： Decision making Jacobian matrices Computer aided software engineering Natural languages Lattices Unified modeling language programming Brain modeling Object oriented modeling Software engineering

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Using randomized rounding to satisfy timing constraints of real-time preemptive tasks

Using randomized rounding to satisfy timing constraints of r...

引用

Asia and South Pacific Design Automation conference

作者： A. Datta S. Choudhury A. Basu Computer Science Department University of Stanford USA Department of Computer Sciences University of Texas Austin USA Department of Computer Science & Engineering Indian Institute of Technology Kharagpur India

ISBN: (纸本)0769514413

In preemptive real-time systems, a tighter estimate of the Worst Case Response Time (WCRT) of the tasks can be obtained if the layout of the tasks in memory is included in the estimation procedure. this is because the Cache Related Preemption Delay (CRPD) depends on the inter-task interference in the cache. We develop a response time analysis framework which takes the layout of the tasks into account. We present an ILP formulation which generates a layout of the tasks such that all timing constraints are satisfied. To overcome the issue of non-scalability associated with an ILP solution, we also present a linear programming relaxation of the ILP formulation, which offers an approximate solution. the performance of the proposed formulation is demonstrated.

关键词： Timing Real time systems Computer science Linear programming Interference constraints Resumes Delay effects Integer linear programming Dynamic programming Polynomials

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A novel isomorphism based on nearest neighbours for efficient graph matching algorithm

A novel isomorphism based on nearest neighbours for efficien...

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international conference on Control, Automation, Robotics and Vision (ICARCV)

作者： D.A.L. Piriyakumar P. Levi IPVS. Depertment of computer science University of stuttgart Germany

For many applications in the fields of robotics, satellite imagery and medical imaging demanding real-time solutions, recognizing the crucial parts or structures in the given images continues to attract more attention. Tims, the paramount factor in these computer vision related fields is matching the objects in the images. Often graphs are used to represent the objects. It is well-known that graph matching is NT-complete problem in general. To accomplish the need of real-time solutions, various lower order complexity algorithms are developed with specific conditions. Here, a novel Node Neighbour Isomorphism (NNI) is introduced which efficiently matches two graphs in O(n/sup 4/) where n is the number of vertices in both the graphs which can be weighted and attributed. Using tliis NNI, the vertices of the graphs are grouped mutually exclusively. Instead of matching all the vertices, only the relevant NNI vertices alone are matched paving way for ample efficiency by reducing the number of matching operations. the algorithm is implemented on Sun Ultra 10 and results of crucial examples and random graphs are also tabled. the run-time performance and novality of the algorithm exemplifies the efficiency of the algorithm which also exhibits parallelism. the algorithm is compared with standard methods and requires the minimal time for matching the graphs.

关键词： Error correction Robots Runtime Medical robotics Satellites Biomedical imaging Linear programming Image retrieval Tiles

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Towards the evaluation of awareness information support applied to peer reviews of software engineering diagrams

Towards the evaluation of awareness information support appl...

引用

international conference on Computer Supported Cooperative Work in Design

作者： M.A.S. Mangan R.M. de Araujo M. Kalinowski M.R.S. Borges C.M.L. Werner Faculdade de Informática PUCRS Brazil Programa de Engenharia de Sistemas e Computação COPPE/UFRJ Brazil Departamento de Ciências da Computao/IM e Nucleo de Computao Eletr6nica UFRJ Brazil Programa de Engenharia de Sistemas e Cornputagio COPPE/UFRJ Brazil Departamento de Cidncias da Computao/IM e Nucleo de Computação Eletrônica UFRJ Brazil Programa de Engenharia de Sistemas e Cornputação COPPE/UFRJ Brazil

Evaluation of group support is a complex task and its design must be carefully planned in order to produce useful results. Many factors may influence evaluation design, some of which have been suggested in the literature. However, in a particular evaluation context, additional factors may arise, influencing and even compromising the evaluation design. We argue that preliminary evaluations must be performed before they are conducted in a real setting in order to verify if its design will provide the expected measurements and results. this paper presents the evaluation process of awareness information resources within software diagram peer reviews. the paper describes the evaluation context, objectives, plan and design together with enactment of a preliminary case study following this design. From this preliminary study, we outline issues that arose during its enactment that influenced refinement of the evaluation design.

关键词： programming Collaborative software Collaboration Software engineering Collaborative tools Collaborative work Performance evaluation Information resources Cultural differences Proposals

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RTL-datapath verification using integer linear programming

RTL-datapath verification using integer linear programming

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Asia and South Pacific Design Automation conference

作者： R. Brinkmann R. Drechsler Corporate Technology Siemens AG Munich Germany University of Brethemen Bremen Germany

ISBN: (纸本)0769514413

Satisfiability of complex word-level formulas often arises as a problem informal verification of hardware designs described at the register transfer level (RTL). Even though most designs are described in a hardware description language (HDL), like Verilog or VHDL, usually this problem is solved in the Boolean domain, using Boolean solvers, these engines often show a poor performance for data path verification. Instead of solving the problem at the bit-level, a method is proposed to transform conjunctions of bitvector equalities and inequalities into sets of integer linear arithmetic constraints. It is shown that it is possible to correctly model the modulo semantics of HDL operators as linear constraints. Integer linear constraint solvers are used as a decision procedure for bitvector arithmetic. In the implementation we focus on verification of arithmetic properties of Verilog-HDL designs. Experimental results show considerable performance advantages over high-end Boolean SAT solver approaches. the speed-up on the benchmarks studied is several orders of magnitude.

关键词： Integer linear programming Arithmetic Hardware design languages Logic testing Hybrid power systems Formal verification Engines Data mining Design automation Logic design

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Buffered routing tree construction under buffer placement blockages

Buffered routing tree construction under buffer placement bl...

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Asia and South Pacific Design Automation conference

作者： Wei Chen M. Pedram P. Buch University of Southern California Los Angeles CA USA Magma Design-Automation Inc. Cupertino CA USA

ISBN: (纸本)0769514413

Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful approaches to improve circuit speed and correct timing violations after global placement. this paper presents a dynamic-programming based algorithm for performing net topology construction and buffer insertion and sizing simultaneously under the given buffer-placement blockages. the differences from some previous works are that (1) the buffer locations are not pre-determined, (2) the multi-pin nets are easily handled, and (3) a line-search routing algorithm is implemented to speed up the process. Heuristics are used to reduce the problem complexity, which include limiting number of intermediate solutions, using a continuous buffer sizing model, and restricting the buffer locations along the Hanan graph. the resulting algorithm, named BRBP, was applied to a number of industrial designs and achieved an average of 7.9% delay improvement compared to a conventional design flow.

关键词： Routing Integrated circuit interconnections Delay Timing Heuristic algorithms Circuit topology Algorithm design and analysis Wire Design automation Dynamic programming

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Regex and extended regex 02

Regex and extended regex

引用

Proceedings of the 7th international conference on Implementation and application of automata

作者： Cezar Câmpeanu Kai Salomaa Sheng Yu Department of Mathematics and Computer Science UPEI Charlottetown PE Computing and Information Science Department Queen's University Kingston Ontario Canada Department of Computer Science University of Western Ontario London Ontario Canada

ISBN: (纸本)9783540403913

Regex are used in many programs such as Perl, Awk, Python, egrep, vi, emacs etc. It is known that regex are different from regular expressions. In this paper, we give regex a formal treatment. We make a distinction between regex and extended regex; while regex present regular languages, extended regex present a family of languages larger than regular languages. We prove a pumping lemma for the languages expressed by extended regex. We show that the languages represented by extended regex are incomparable with context-free languages and a proper subset of context-sensitive languages.

关键词： regex regular expressions extended regex formal languages programming languages

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On test scheduling for core-based SOCs

On test scheduling for core-based SOCs

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Asia and South Pacific Design Automation conference

作者： S. Koranne ED&T/Test Philips Research Laboratories Eindhoven Netherlands

ISBN: (纸本)0769514413

Presents a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of test resources (e.g., test access mechanisms (TAM)), we determine the test plan for the application of the tests to the SOC. Test planning in this paper refers to the combined activities of test access architecture partitioning and test scheduling. these activities must be performed in conjunction as the choice of the test access architecture influences the test schedule. We justify the formulation of test scheduling w.r.t. minimum average completion time criterion as compared to minimum makespan. We show that then the problem of scheduling tests on TAMs can be mapped onto a graph theoretic problem which has a polynomial time optimal solution. We have implemented our algorithm as a test planner tool TPLAN. We present the theoretical analysis of our approach in this paper and compare our results against those published earlier using integer linear programming techniques with encouraging results.

关键词： System testing Integrated circuit testing Very large scale integration Integer linear programming Firewire Knowledge transfer Pins Mathematical model System-on-a-chip Performance evaluation

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