A unification algorithm is said to be minimal for a unification problem if it generates exactly a complete set of minimal unifiers, without instances, without repetitions. Aim of this paper is to describe a new set un...
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the principal technique for enhancing the speed of clause resolution in logicprogramming languages, such as Prolog, is indexing. Given a goal, the primary objective of indexing is to quickly eliminate clauses whose h...
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In this paper, we present an efficient and effective approach for checking synthesized RTL designs. this approach uses a hybrid numeric/symbolic simulation to extract the functional behavior of a design while taking i...
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ISBN:
(纸本)0818657855
In this paper, we present an efficient and effective approach for checking synthesized RTL designs. this approach uses a hybrid numeric/symbolic simulation to extract the functional behavior of a design while taking into account the interaction between the data and control paths as well as the clocking scheme and delays, and employs a graph-comparison procedure to perform the checking task. the value of this work was shown by its ability to identify problems with an early version of the ADAM Control Signal Generator (CSG) software, which was then corrected accordingly.
Existing algorithms in high-level synthesis (HLS) typically assume a direct mapping of hardware description language (HDL) operators to RT units. this assumption simplifies synthesis to generic RT components, but prev...
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Existing algorithms in high-level synthesis (HLS) typically assume a direct mapping of hardware description language (HDL) operators to RT units. this assumption simplifies synthesis to generic RT components, but prevents effective use of complex databook components, custom designed cells, previously synthesized RT modules and RT module generators. We present an algorithm for allocation in HLS for reuse of existing RT-level components. this approach can be used to customize HLS tools to user-specific RT libraries. the experiments show improvements of 10-37% in area over conventional approaches.< >
this paper describes an implementation scheme that maps sequences (lists) in the functional language FP onto a data-parallel SIMD multiprocessor. the mapping is dynamic (i.e., self-organizing at run-time via an atom v...
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the idea of introducing logical variables into functionalprogramming languages has been proposed for some years, and many concrete languages withthis feature have been developed. Recently the semantic features of th...
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We continue the investigations of [Ra90, Ra91, RM89] and study the automated theorem proving for reasoning about perception of reasoning agents and their consensus reaching. Using the techniques of [Ra91] and of logic...
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We propose to use the logic of only knowing (OL) by Levesque [6] as a unified framework that encompasses various non-monotonic formalisms and logicprogramming. OL is a modal logic which can be used to formalize an ag...
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Given the wide range and diversity of proposed architectures for autonomous robotic agents, an essential role can be played by a programming environment not hardwired to any particular architecture. this paper discuss...
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this paper proposes an update language for logicprogramming based knowledge systems. the language is built upon two basic update operators denoting insertions and deletions of positive titerals (atoms), respectively....
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