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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： J. Muller D. Fimmel R. Merker Department of Electrical Engineering Dresden University of Technology Dresden Germany

We present a novel loop scheduling approach using a generalized flow graph model of the resource constraints. From this model we derive a new flow graph to incorporate register constraints. Our linear programming implementation produces an optimum loop schedule, respecting the constraints on functional units and registers in a single optimization problem. Moreover, the iteration interval is treated as a rational number, and the approach supports heterogeneous processor architectures and pipelined functional units. Compared to earlier approaches, the solution can reduce the problem complexity and solution time, and provide faster loop schedules.

关键词： Flow graphs Registers Resource management Intelligent networks parallel architectures Digital filters Delay Adders Writing Pipelines

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Weaving parallel threads searching for useful parallelism in functional programs 7th

Weaving parallel threads searching for useful parallelism in...

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7th international symposium on Search-Based Software Engineering, SSBSE 2015

作者： Trilla, José Manuel Calderón Poulding, Simon Runciman, Colin University of York York United Kingdom Blekinge Institute of Technology Karlskrona Sweden

ISBN: (纸本)9783319221823

As the speed of processors is starting to plateau, chip manufacturers are instead looking to multi-core architectures for increased performance. the ubiquity of multi-core hardware has made parallelism an important tool in writing performant programs. Unfortunately, parallel programming is still considered an advanced technique and most programs are written as sequential programs. We propose that we lift this burden from the programmer and allow the compiler to automatically determine which parts of a program can be executed in parallel. Historically, most attempts at auto-parallelism depended on static analysis alone. While static analysis is often able to find safe parallelism, it is difficult to determine worthwhile parallelism. this is known as the granularity problem. Our work shows that we can use static analysis in conjunction with search techniques by having the compiler execute the program and then alter the amount of parallelism based on execution speed. We do this by annotating the program with parallel annotations and using search to determine which annotations to enable. this allows the static analysis to find the safe parallelism and shift the burden of finding worthwhile parallelism to search. Our results show that by searching over the possible parallel settings we can achieve better performance than static analysis alone. © Springer international Publishing Switzerland 2015.

关键词： Static analysis

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Optimal Performance Prediction of ADAS algorithms on Embedded parallel architectures

Optimal Performance Prediction of ADAS Algorithms on Embedde...

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IEEE international Conference on High Performance Computing and Communications (HPCC)

作者： Romain Saussard Boubker Bouzid Marius Vasiliu Roger Reynaud Renault S.A.S Guyancourt France Instutut d'Electronique Fondamentale Université Paris Sud Orsay France

ADAS (Advanced Driver Assistance Systems) algorithms increasingly use heavy image processing operations. To embed this type of algorithms, semiconductor companies offer many heterogeneous architectures. these SoCs (System on Chip) are composed of different processing units, with different capabilities, and often with massively parallel computing unit. Due to the complexity of these SoCs, predicting if a given algorithm can be executed in real time on a given architecture is not trivial. In fact it is not a simple task for automotive industry actors to choose the most suited heterogeneous SoC for a given application. Moreover, embedding complex algorithms on these systems remains a difficult task due to heterogeneity, it is not easy to decide how to allocate parts of a given algorithm on the different computing units of a given SoC. In order to help automotive industry in embedding algorithms on heterogeneous architectures, we propose a novel approach to predict performances of image processing algorithms applicable on different types of computing units. Our methodology is able to predict a more or less wide interval of execution time with a degree of confidence using only high level description of algorithms, and a few characteristics of computing units.

关键词： Kernel Computer architecture Image processing Graphics processing units Prediction algorithms parallel processing Computational modeling

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GPregel: A GPU-Based parallel Graph Processing Model

GPregel: A GPU-Based Parallel Graph Processing Model

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IEEE international Conference on High Performance Computing and Communications (HPCC)

作者： Siyan Lai Guangda Lai Guojun Shen Jing Jin Xiaola Lin School of Information Science and Technology Sun Yat-sen University Guangzhou China

ISBN: (纸本)9781479989386

With the development of information technology, graph computing becomes an increasingly important tool for information processing. Recently, GPU has been adopted to accelerate various graph processing algorithms. However, since the architecture of GPU is very different from traditional computing model, the learning threshold for developing GPU-based applications is high. In this paper, we propose a GPU-based parallel graph processing system named GPregel. GPregel harnesses a lightweight complier to hide the underlying complexity of the parallel details and simplifies programming. It greatly reduces the difficulty in utilizing the GPU to solve graph computing problems. We also design a special storage model for BSP model running on GPU, which overcomes the execution divergence and irregular memory access by coarse-grained designs. Experiments demonstrate that GPregel can achieve high performance with little work for developers.

关键词： Graphics processing units Computational modeling programming Algorithm design and analysis Acceleration Complexity theory Computer architecture

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Evaluation of Hybrid parallel Cell List algorithms For Monte Carlo Simulation

Evaluation of Hybrid Parallel Cell List Algorithms For Monte...

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IEEE international symposium on Cyberspace Safety and Security

作者： Kamel Rushaidat Loren Schwiebert Brock Jackman Jason Mick Jeffrey Potoff Department of Computer Science Wayne State University Department of Chemical Engineering and Materials Science Wayne State University

ISBN: (纸本)9781479989386

this paper describes efficient, scalable parallel implementations of the conventional cell list method and a modified cell list method to calculate the total system intermolecular Lennard-Jones force interactions in the Monte Carlo Gibbs ensemble. We targeted this part of the Gibbs ensemble for optimization because it is the most computationally demanding part of the force interactions in the simulation, as it involves all the molecules in the system. the modified cell list implementation reduces the number of particles that are outside the interaction range by making the cells smaller, thus reducing the number of unnecessary distance evaluations. Evaluation of the two cell list methods is done using a hybrid MPI+OpenMP approach and a hybrid MPI+CUDA approach. the cell list methods are evaluated on a small cluster of multicore CPUs, Intel Phi coprocessors, and GPUs. the performance results are evaluated using different combinations of MPI processes, threads, and problem sizes.

关键词： Cell List Monte Carlo Simulations Hybrid parallel architectures Gibbs Ensemble

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Realistic Task parallelization of the H.264 Decoding Algorithm for Multiprocessors

Realistic Task Parallelization of the H.264 Decoding Algorit...

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IEEE international Conference on High Performance Computing and Communications (HPCC)

作者： Xiaohao Lin Weichen Liu Chunming Xiao Jie Dai Xianlu Luo Dan Zhang Duo Liu Kaijie Wu Qingfeng Zhuge Edwin H.-M. Sha College of Computer Science Chongqing University Chongqing China Chongqing University Chongqing Sichuan CN

there is a phenomenon that hardware technology has developed ahead of software technology in recent years. Companies lack of software techniques that can fully utilize the modern multi-core computing resources, mainly due to the difficulty of investigating the inherent parallelism inside a software. this problem exists in products ranging from energy-sensitive smartphones to performance-eager data centers. In this paper, we present a case study on the parallelization of the complex industry standard H.264 HDTV decoder application in multi-core systems. An optimal schedule of the tasks is obtained and implemented by a carefully-defined software parallelization framework (SPF). the parallel software framework is proposed together with a set of rules to direct parallel software programming (PSPR). A pre-processing phase based on the rules is applied to the source code to make the SPF applicable. the task-level parallel version of the H.264 decoder is implemented and tested extensively on a workstation running Linux. Significant performance improvement is observed for a set of benchmarks composed of 720p videos. the SPF and the PSPR will together serve as a reference for future parallel software implementations and direct the development of automated tools.

关键词： Software Decoding parallel processing Industries Software algorithms Videos parallel programming

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Application Modeling for Scalable Simulation of Massively parallel Systems

Application Modeling for Scalable Simulation of Massively Pa...

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IEEE international Conference on High Performance Computing and Communications (HPCC)

作者： Eric Anger Damian Dechev Gilbert Hendry Jeremiah Wilke Sudhakar Yalamanchili Georgia Institute of Technology Atlanta Georgia University of Central Florida Orlando Florida Sandia National Laboratories Livermore California

Macro-scale simulation has been advanced as one tool for application -- architecture co-design to express operation of exascale systems. these simulations approximate the behavior of system components, trading off accuracy for increased evaluation speed. Application skeletons serve as the vehicle for these simulations, but they require accurately capturing the execution behavior of computation. the complexity of application codes, the heterogeneity of the platforms, and the increasing importance of simulating multiple performance metrics (e.g., execution time, energy) require new modeling techniques. We propose flexible statistical models to increase the fidelity of application simulation at scale. We present performance model validation for several exascale mini-applications that leverage a variety of parallel programming frameworks targeting heterogeneous architectures for both time and energy performance metrics. When paired with these statistical models, application skeletons were simulated on average 12.5 times faster than the original application incurring only 6.08% error, which is 12.5% faster and 33.7% more accurate than baseline models.

关键词： Computational modeling Skeleton Analytical models Load modeling Hardware Predictive models Data models

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parallel genetic algorithm with social interaction for solving constrained global optimization problems

Parallel genetic algorithm with social interaction for solvi...

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international Conference of Soft Computing and Pattern Recognition (SOCPAR)

作者： Rodrigo Lisbôa Edson Koiti Yasojima Rodrigo M. S. de Oliveira Marco A. Florenzano Mollinetti Otávio Noura Teixeira Roberto C. Limão de Oliveira Pereira Electrical Engineering Post Graduation Program Federal University of Pará (UFPA) Belém Pará Brazil Systems Optimization Laboratory Tsukuba University Tsukuba Ibaraki Japan Electrical Engineering Post Graduation Program Federal University of Pará (UFPA) Belém Pará Brazil Laboratory of Electromagnetics (LeMag) Federal University of Pará (UFPA) Belém Pará Brazil Laboratory of Bionspired Computing (LCBIO) Federal University of Pará (UFPA) Belém Brazil Pará

the following paper introduces a parallel approach to a social variant of the Genetic Algorithm, called parallel Genetic Algorithm with Social Interaction (PSIGA). the algorithm is based on social games involving game theory, and it is implemented using the OpenMP API, which is based on the shared memory programming model for multiple processor architectures. the main contribution of this approach is the parallelization using the Shared Memory of the Social Interaction Genetic Algorithm (SIGA) in order to achieve faster and better optimality than its nonparallel counterpart for global optimization problems with restrictions. For means of performance assessment, the algorithm is tested on four instances of engineering design problems and the obtained results compared with the Genetic Algorithm with Social Interaction (SIGA) implemented in sequential programming model.

关键词： Genetic algorithms Sociology Statistics Optimization Games Game theory Instruction sets

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JParEnt: parallel entropy decoding for JPEG decompression on heterogeneous multicore architectures

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2017年第15期29卷

作者： Sodsong, Wasuwee Jung, Minyoung Park, Jinwoo Burgstaller, Bernd Yonsei Univ Dept Comp Sci Seoul South Korea

the JPEG format employs Huffman codes to compress the entropy data of an image. Huffman codewords are of variable length, which makes parallel entropy decoding a difficult problem. To determine the start position of a codeword in the bitstream, the previous codeword must be decoded first. We present JParEnt, a new approach to parallel entropy decoding for JPEG decompression on heterogeneous multicores. JParEnt conducts JPEG decompression in two steps: (1)an efficient sequential scan of the entropy data on the CPU to determine the start-positions (boundaries) of coefficient blocks in the bitstream, followed by (2)a parallel entropy decoding step on the graphics processing unit (GPU). the block boundary scan constitutes a reinterpretation of the Huffman-coded entropy data to determine codeword boundaries in the bitstream. We introduce a dynamic workload partitioning scheme to account for GPUs of low compute power relative to the CPU. this configuration has become common with the advent of SoCs with integrated graphics processors (IGPs). We leverage additional parallelism through pipelined execution across CPU and GPU. For systems providing a unified address space between CPU and GPU, we employ zero-copy to completely eliminate the data transfer overhead. Our experimental evaluation of JParEnt was conducted on six heterogeneous multicore systems: one server and two desktops with dedicated GPUs, one desktop with an IGP, and two embedded systems. For a selection of more than 1000JPEG images, JParEnt outperforms the SIMD-implementation of the libjpeg-turbo library by up to a factor of 4.3x, and the previously fastest JPEG decompression method for heterogeneous multicores by up to a factor of 2.2x. JParEnt's entropy data scan consumes 45% of the entropy decoding time of libjpeg-turbo on average. Given this new ratio for the sequential part of JPEG decompression, JParEnt achieves up to97% of the maximum attainable speedup (95% on average). On the IGP-based desktop platform,

关键词： JPEG decoding entropy decoding prefix codes heterogeneous multicores GPU programming

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