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共 568 条记录，以下是161-170 订阅

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Using the General Intensional programming System (GIPSY) for evaluation of higher-order intensional logic (HOIL) expressions

Using the General Intensional Programming System (GIPSY) for...

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8th International conference on Software Engineering Research, Management and Applications, SERA 2010

作者： Mokhov, Serguei A. Paquet, Joey Department of Computer Science and Software Engineering Concordia University 1455 De Maisonneuve Blvd. W. Montreal QC H3G 1M8 Canada

ISBN: (纸本)9780769540757

the General Intensional programming System (GIPSY) has been built around the Lucid family of intensional programming languages that rely on the higher-order intensional logic (HOIL) to provide context-oriented multidimensional reasoning of intensional expressions. HOIL combines functional programming with various intensional logics to allow explicit context expressions to be evaluated as first-class values that can be passed as parameters to functions and return as results with an appropriate set of operators defined on contexts. GIPSY's frameworks are implemented in Java as a collection of replaceable components for the compilers of various Lucid dialects and the demand-driven eductive evaluation engine that can run distributively. GIPSY provides support for hybrid programming models that couple intensional and imperative languages for a variety of needs. Explicit context expressions limit the scope of evaluation of math expressions (effectively a Lucid program is a mathematics or physics expression constrained by the context) in tensor physics, regular math in multiple dimensions, etc., and for cyberforensic reasoning as one of the use-cases of interest. thus, GIPSY is a support testbed for HOIL-based languages some of which enable such reasoning, as in formal cyberforensic case analysis with event reconstruction. In this paper we discuss the GIPSY architecture, its evaluation engine and example use-cases. © 2010 IEEE.

关键词： Engines

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Proceedings - 2011 8th International conference on Information Technology: New Generations, ITNG 2011

Proceedings - 2011 8th International Conference on Informati...

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2011 8th International conference on Information Technology: New Generations, ITNG 2011

ISBN: (纸本)9780769543673

the proceedings contain 210 papers. the topics discussed include: development and evaluation of a large-scale agent-based system for information literacy education - improving the automatic collection of learning results through template matching;using a collaborative programming methodology to incorporate social computing projects into introductory computer science courses;an approach to XML tag recommendation;a location-based mobile advertisement publishing system for vendors;a greedy approach to text steganography using properties of sentences;predicting the reliability of software systems using fuzzy logic;evolutionary prediction for cumulative failure modeling: a comparative study;a police force facing an e-transparency project;algorithmic design and implementation of an automated testing tool;putting search in context: using dynamically-weighted information fusion to improve search results;and interactive visualization and analysis of hurricane data.

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8th International Workshop on Rewriting logic and its Applications, WRLA 2010 held as a Satellite Event of European Joint conferences on theory and Practice of Software, ETAPS 2010

8th International Workshop on Rewriting Logic and its Applic...

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8th International Workshop on Rewriting logic and its Applications, WRLA 2010 held as a Satellite Event of European Joint conferences on theory and Practice of Software, ETAPS 2010

ISBN: (纸本)9783642163098

the proceedings contain 16 papers. the special focus in this conference is on Rewriting logic and its Applications. the topics include: A Formal Pattern Architecture for Safe Medical Systems;on the Behavioral Semantics of Real-Time Domain Specific Visual Languages;multiset Rewriting: A Semantic Framework for Concurrency with Name Binding;the Linear Temporal logic of Rewriting Maude Model Checker;enhancing the Debugging of Maude Specifications;the third Rewrite Engines Competition;twenty Years of Rewriting logic;proving Termination in the Context-Sensitive Dependency Pair Framework;a Dependency Pair Framework for A ∨ C-Termination;folding Variant Narrowing and Optimal Variant Termination;a Church-Rosser Checker Tool for Conditional Order-Sorted Equational Maude Specifications;a Maude Coherence Checker Tool for Conditional Order-Sorted Rewrite theories;k-Maude: A Rewriting Based Tool for Semantics of programming Languages;collecting Semantics under Predicate Abstraction in the K Framework.

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8th Asian Symposium on programming Languages and Systems, APLAS 2010

8th Asian Symposium on Programming Languages and Systems, AP...

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8th Asian Symposium on programming Languages and Systems, APLAS 2010

ISBN: (纸本)9783642171635

the proceedings contain 30 papers. the special focus in this conference is on programming Languages and Systems. the topics include: Simple and precise widenings for H-polyhedra;metric spaces and termination analyses;amortized resource analysis with polymorphic recursion and partial big-step operational semantics;interprocedural control flow reconstruction;data structure fusion;categorical descriptional composition;bisimulation proof methods in a path-based specification language for polynomial coalgebras;Context-preserving XQuery fusion;index-compact garbage collection;foundations of quantum programming;live heap space bounds for real-time systems;a quick tour of the verifast program verifier;verification of tree-processing programs via higher-order model checking;automatically inferring quantified loop invariants by algorithmic learning from simple templates;relational parametricity for a polymorphic linear lambda calculus;A certified implementation of ML with structural polymorphism;type inference for sublinear space functional programming;liveness of communicating transactions;model independent order relations for processes;concurrency can’t be observed, asynchronously;from a verified kernel towards verified systems;a logical mix of approximation and separation;reasoning about computations using two-levels of logic;typechecking higher-order security libraries;towards deriving type systems and implementations for coroutines;liberal typing for functional logic programs;a provably correct stackless intermediate representation for Java bytecode;JNI light: An operational model for the core JNI.

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the Evolution of Fuzzy Classifier for Data Mining with Applications

The Evolution of Fuzzy Classifier for Data Mining with Appli...

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8th International conference of Simulated Evolution and Learning

作者： Snasel, Vaclav Kroemer, Pavel Platos, Jan Abraham, Ajith VSB Tech Univ Ostrava Fac Elect Engn & Comp Sci Dept Comp Sci 17 Listopadu 15 Ostrava 70833 Czech Republic MIR Labs Washington DC 98071 USA

ISBN: (纸本)9783642172977

Fuzzy classifiers and fuzzy rules can be informally defined as tools that use fuzzy sets or fuzzy logic for their operations. In this paper, we use genetic programming to evolve a fuzzy classifier in the form of a. fuzzy search expression to predict product quality. We interpret the data mining task as a fuzzy information retrieval problem and we apply a. successful information retrieval method for search query optimization to the fuzzy classifier evolution. We demonstrate the ability of the genetic programming to evolve useful fuzzy classifiers on two use cases in which we detect faulty products of a product processing plant and discover intrusions in a computer network.

关键词： genetic programming information retrieval classifier evolution fuzzy systems

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A formal specification language for PLC-based control logic

A formal specification language for PLC-based control logic

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IEEE International conference on Industrial Informatics (INDIN)

作者： Oscar Ljungkrantz Knut Åkesson Martin Fabian Chengyin Yuan Department of Signals and Systems Chalmers University of Technology Goteborg Sweden Research and Development General Motors Warren MI USA

Formal verification, using model checking tools, is promising in developing (IEC 61131) industrial control logic. Formal verification requires a formal specification of the properties to be verified. Specifications in model checking tools are typically expressed using temporal logic. However, the standard temporal logic dialects are not well suited for control engineers who do rarely have a background within computer science. In this paper a new dialect of linear temporal logic, ST-LTL, is introduced that intends to be easier to use for control engineers than the existing dialects. the relation of ST-LTL compared to existing temporal logic dialects is analyzed.

关键词： Formal specifications Programmable control Specification languages Formal verification IEC standards logic programming Computer errors Boolean functions Industrial control Manufacturing industries

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PLC-statecharts: An approach to integrate umlstatecharts in open-loop control engineering

PLC-statecharts: An approach to integrate umlstatecharts in ...

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IEEE International conference on Industrial Informatics (INDIN)

作者： Daniel Witsch Maria Ricken Benjamin Kormann Birgit Vogel-Heuser Chair of Information Technology in Mechanical Engineering Technische Universität München Garching Germany

this paper defines an adaptation of UML-statecharts which can be used as a visual programming language for PLCs. those PLC-statecharts combine the advantages of UML-statecharts with a strict formal basis and dedicated... 详细信息

关键词： Control engineering Programmable control IEC standards Unified modeling language Automata Object oriented modeling Computer languages logic Real time systems Automatic control

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8th International Symposium on Automated Technology for Verification and Analysis, ATVA 2010

8th International Symposium on Automated Technology for Veri...

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8th International Symposium on Automated Technology for Verification and Analysis, ATVA 2010

ISBN: (纸本)9783642156427

the proceedings contain 33 papers. the special focus in this conference is on Automated Technology for Verification and Analysis. the topics include: What’s decidable about sequences?;a study of the convergence of steady state probabilities in a closed fork-join network;lattice-Valued Binary Decision Diagrams;a specification logic for exceptions and beyond;non-monotonic Refinement of Control Abstraction for Concurrent Programs;an approach for class testing from class contracts;Efficient on-the-fly emptiness check for timed Büchi automata;reachability as derivability, finite countermodels and verification;LTL can be more succinct;abstraction Learning;automatic generation of history-based access control from information flow specification;auxiliary constructs for proving liveness in compassion discrete systems;symbolic unfolding of parametric Stopwatch Petri Nets;recursive timed automata;probabilistic contracts for component-based design;Model-checking web applications with Web-TLR;GAVS: Game arena visualization and synthesis;CRI: Symbolic debugger for MCAPI applications;MCGP: A software synthesis tool based on model checking and genetic programming;ECDAR: An environment for compositional design and analysis of real time systems;synthesis: Words and traces;Developing model checkers using PAT;YAGA: Automated analysis of quantitative safety specifications in probabilistic B;COMBINE: A tool on Combined formal Methods for Bindingly Verification;rbminer: A tool for discovering Petri nets from transition systems;promptness in ω-regular automata;using redundant constraints for refinement;methods for knowledge based controlling of distributed systems;composing reachability analyses of hybrid systems for safety and stability;the complexity of codiagnosability for discrete event and timed systems;on scenario synchronization.

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High-speed decision method of combination of risk-reducing plans using Branch and Bound

High-speed decision method of combination of risk-reducing p...

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IEEE International conference on Industrial Informatics (INDIN)

作者： Keisuke Kawaratani Kouta Itakura Masaki Samejima Masanori Akiyoshi School of Engineering Osaka University Japan Graduate School of Information Science and Technology Osaka University Japan

ISBN: (纸本)9781424472987;9781424473007

this paper addresses a problem to decide the combination of risk-reducing plans quickly. the combinatorial problem is formulated as one of the 0-1 integer programming and Branch and Bound is applied. On Branch and Bound, Simplex method for deciding a branching variable and the lower bound, which takes much time. therefore, we propose the high-speed decision reducing calculations of a combination using Branch and Bound. the proposed method decides the combination quickly based on approximate solutions by greedy algorithm instead of solutions by Simplex method. In order to derive the optimal combination with certainty, when nodes are bounded with the approximate solutions, the validity of the bounding is confirmed by Simplex method. As a result of evaluation experiments, the proposed method can reduce the computational time by 65% in comparison with the existing method.

关键词： Linear programming Greedy algorithms Cost function Information science Paper technology Communications technology logic programming

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Reengineering of IEC 61131 into IEC 61499 Function Blocks

Reengineering of IEC 61131 into IEC 61499 Function Blocks

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IEEE International conference on Industrial Informatics (INDIN)

作者： Gareth D. Shaw Partha S. Roop Zoran Salcic Department of Electrical and Computer Engineering University of Auckland New Zealand

In order for industrial automation manufacturers to remain competitive, they must utilise modern design approaches. Existing approaches using IEC 61131 languages are not object oriented and are difficult to reconfigure for other applications. IEC 61499 is an open standard aimed at replacing IEC 61131, adding modern design features and hardware abstraction. therefore there is a need to migrate existing code bases using IEC 61131 technologies into the newer IEC 61499 language for future development. IEC 61499 is appealing to developers because of the simplified specification approach and benefits related to the language's abstraction. the basic design unit or function block provides a graphical method for control flow design, and uses algorithms written in any programming language. this object oriented approach enables easy block reuse and simple reconfigurability. this paper presents a semi-automated process for the reengineering of Ladder logic routines, from Rockwell, into a function block system. the process automatically translates all data types, variable declarations and ladder logic routines into their C equivalents. the function block architecture for the desired system components must be developed, but into which the generated code is encapsulated and used. the approach enables manufacturers using IEC 61131 to migrate their code base into a modern framework, with no loss of previous design efforts and minimal once-off overhead. IEC 61499 then allows for a more stream lined development process with reusable components.

关键词： IEC standards Manufacturing automation Algorithm design and analysis Reconfigurable logic logic programming Manufacturing industries Design automation Hardware Automatic control Computer languages

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