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Proceedings of the 1996 8th ieee symposium on parallel and distributed processing

作者： Kormicki, Maciek Mahmood, Ausif Carlson, Bradley S. Washington State Univ at Tri-Cities Richland United States

parallel processing is recognized as a practical way to achieve high performance in logic simulation. Instead of using high cost parallel computers or special purpose hardware simulation engines, we explore the implementation of parallel logic simulation on an existing network of workstations using parallel Virtual Machine (PVM). We carry out a novel parallel implementation of an output event-driven logic simulation algorithm such that a global control processor or workstation is not needed to synchronize the advancement of simulation time to the next time step. Further advantages of our new approach include a random partitioning of the circuit on to available workstations and a pipelined execution of the different phases of the simulation algorithm. To achieve a better load balance we employ a semi-optimistic scheme for gate evaluations such that no rollback is required. the performance of our implementation has been evaluated in real time using the ISCAS combinational and sequential benchmark circuits. Speedups obtained improve with the size of the circuit and the activity level in the circuit. Analyses of the communication overhead shows that the techniques developed here will yield even higher gains as newer networking technologies such as fast and switched Ethernet or ATM are employed to connect workstations.

关键词： parallel processing systems

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DVS based energy minimization algorithm for parallel machines

DVS based energy minimization algorithm for parallel machine...

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10th Workshop on Advances in parallel and distributed Computational Models/22nd ieee International parallel and distributed processing symposium

作者： Kang, Jaeyeon Ranka, Sanjay Univ Florida Dept Comp & Informat Sci & Engn Gainesville FL 32611 USA

ISBN: (纸本)9781424416936

Energy consumption is a critical issue in parallel and distributed embedded systems. We present a novel algorithm for energy efficient scheduling of Directed Acyclic Graph (DAG) based applications on Dynamic Voltage Scaling (DVS) enabled systems. Experimental results show that our algorithm provides near optimal solutions for energy minimization with considerably smaller computational time and memory requirements compared to an existing algorithm that provides near optimal solutions.

关键词： Voltage scaling

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Barrier synchronization techniques for distributed process creation

Barrier synchronization techniques for distributed process c...

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Proceedings of the 8th International parallel processing symposium

作者： DeMara, R. Motlagh, B. Univ of Central Florida Orlando United States

ISBN: (纸本)0818656026

Synchronization techniques are proposed for algorithms which spawn processes remotely on loosely coupled processors based on run-time characteristics. the performance of the proposed synchronization schemes are measured on the iPSC/2 and SNAP-1 multiprocessors and their implementation cost is discussed. Results show that processes created dynamically throughout a distributed system can be synchronized at comparable overhead and cost to that required for fixed location process creation.

关键词： Computer networks

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A parallel discrete event IP network emulator 8

A parallel discrete event IP network emulator

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8th International symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems

作者： Bradford, R Simmonds, R Unger, B Univ Bath Dept Math Sci Bath BA2 7AY Avon England

ISBN: (纸本)076950728X

Testing distributed applications over the Internet is fraught with problems: due to the inability to control a wide area network consistent, reproduceable performance experiments are not possible. Here a system is described that uses a parallel discrete evens simulator that can act as a real-time network emulator Real Internet Protocol (IP) traffic generated by application programs running on user workstations carl interact with modelled traffic in the emulator thus providing a controlled test environment for distributed applications, parallel execution enables the emulator to simulate lar ge virtual networks and to model traffic interactions that could nor be done in real-time sequentially: this paper gives an overview of the emulator and explores the various external data routing methods that the emulator supports. these routing methods allow the emulator to be operated in shared environments with certain constraints, as well as in dedicated test environments. Preliminary performance results are included.

关键词： parallel discrete event simulation (PDES) computer network emulation real-time simulation Internet Protocol (IP)

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Efficient implementation of Edmonds' algorithm for finding optimum branchings on associative parallel processors

Efficient implementation of Edmonds' algorithm for finding o...

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8th International Conference on parallel and distributed Systems (ICPADS 2001)

作者： Nepomniaschaya, AS Russian Acad Sci Inst Computat Math & Math Geophys Siberian Div Novosibirsk 630090 Russia

ISBN: (纸本)0769511538

In this paper we propose an efficient parallel implementation of Edmonds' algorithm for finding optimum branchings on a model of the SIMD type with vertical data processing (the STAR-machine). To this end for a directed graph given as a list of triples (edge vertices and the weight), we construct a new associative version of Edmonds' algorithm. this version is represented as the corresponding STAR procedure whose correctness is proved. We obtain that on vertical processing systems Edmonds' algorithm takes O(n log n) time, where n is the number of graph vertices.

关键词： parallel algorithms

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parallel Implementation of OpenVX on Firefly2 GPU 8

Parallel Implementation of OpenVX on Firefly2 GPU

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8th International symposium on Computational Intelligence and Design (ISCID)

作者： Guo, Zhiquan Han, Jun Gang Che, Fang Li, Tao Xian Univ Posts & Telecommun Sch Comp Sci Xian Peoples R China Xian Univ Posts & Telecommun Sch Elect Engn Xian Peoples R China

ISBN: (纸本)9781467395878

Given the fact that the traditional GPU mainly supports the parallel computing with SIMD (Single Instruction Multiple Data) and SIMT (Single Instruction Multiple thread) mode, the Firefly2 GPU (Graphic processing Unit) has special hardware configuration mechanism and can be used for paralleling computing on data-level, thread-level and operatedlevel. this paper presents parallel implementation of OpenVX kernels on Firefly2 GPU with the method by combing the operation level parallelism with data level parallelism. Experimental results indicate satisfactory speedup of the parallel implementation and show that the Firefly2 is suitable for graphics and image processing.

关键词： GPU OpenVX parallel image processing

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Modeling and Simulation of the Automatic Control System of the Residual Water Blunting Process from a Metallurgical Factory

Modeling and Simulation of the Automatic Control System of t...

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8th ieee International symposium on Applied Computational Intelligence and Informatics (SACI)

作者： Muresan, V. Abrudean, M. Colosi, T. Tech Univ Cluj Napoca Dept Automat Cluj Napoca Romania

ISBN: (纸本)9781467364003;9781467363976

this paper presents a method for the pH control of the residual water from a metallurgical factory. the blunting process is decomposed in two sub-processes connected in parallel, both viewed as distributed parameters processes and modeled through equations with partial derivatives. the mathematical model of the two sub-processes considers the delays introduced by the liquids circulation in the plant. the modeling-simulation procedure is an application of the matrix of partial derivatives of the state vector (M-pdx) method associated with Taylor series.

关键词： Automatic control systems pH control Industrial Plants Taylor series modeling and simulation RESIDUAL two-photon processes phonon-phonon interactions duotone processes control systems distributed parameter Modeling Partial derivative parallel Lines

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MTracer: A Trace-Oriented Monitoring Framework for Medium-Scale distributed Systems

MTracer: A Trace-Oriented Monitoring Framework for Medium-Sc...

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8th ieee International symposium on Service Oriented System Engineering (SOSE)

作者： Zhou, Jingwen Chen, Zhenbang Mi, Haibo Wang, Ji Sci & Technol Parallel & Distributed Proc Lab Changsha Hunan Peoples R China Natl Univ Def Technol Coll Comp Changsha Hunan Peoples R China

ISBN: (纸本)9781479936168

Trace-oriented runtime monitoring is a very effective method to improve the reliability of distributed systems. However, for medium-scale distributed systems, existing trace-oriented monitoring frameworks are either not powerful or efficient enough, or too complex and expensive to deploy and maintain. In this paper, we present MTracer1, which is a lightweight trace-oriented monitoring system for medium-scale distributed systems. We have proposed and implemented several optimizations to improve the efficiency of the monitor server in MTracer. A web-based frontend is also provided to visualize a monitored system from different perspectives. We have validated MTracer in a real medium-scale environment. the results indicate that MTracer has a very lower overhead, and can handle more than 4000 events per second.

关键词： monitoring trace-oriented visualization parallelization distributed system

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Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines

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JOURNAL OF parallel AND distributed COMPUTING 2009年第9期69卷 778-789页

作者： Jiang, Weirong Prasanna, Viktor K. Univ So Calif Ming Hsieh Dept Elect Engn Los Angeles CA 90089 USA

SRAM (static random access memory)-based pipelined algorithmic solutions have become competitive alternatives to TCAMs (ternary content addressable memories) for high-throughput IP lookup. Multiple pipelines can be utilized in parallel to improve the throughput further. However, several challenges must be addressed to make such solutions feasible. First, the memory distribution over different pipelines, as well as across different stages of each pipeline, must be balanced. Second, the traffic among these pipelines should be balanced. third, the intra-flow packet order (i.e. the sequence) must be preserved. In this paper, we propose a parallel SRAM-based multi-pipeline architecture for IP lookup. A two-level mapping scheme is developed to balance the memory requirement among the pipelines as well as across the stages in each pipeline. To balance the traffic, we propose an early caching scheme to exploit the data locality inherent in the architecture. Our technique uses neither a large reorder buffer nor complex reorder logic. Instead, a flow-aware queuing scheme exploiting the flow information is used to maintain the intra-flow sequence. Extensive simulation using real-life traffic traces shows that the proposed architecture with 8 pipelines can achieve a throughput of up to 10 billion packets per second, i.e. 3.2 Tbps for minimum size (40 bytes) packets, while preserving intra-flow packet order. (c) 2009 Elsevier Inc. All rights reserved.

关键词： IP lookup Pipeline SRAM Router

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Performance of parallel I/O scheduling strategies on a network of workstations

Performance of parallel I/O scheduling strategies on a netwo...

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8th International Conference on parallel and distributed Systems (ICPADS 2001)

作者： Chen, FY Majumdar, S Carleton Univ Dept Syst & Comp Engn Ottawa ON K1S 5B6 Canada

ISBN: (纸本)0769511538

Techniques for scheduling parallel I/O for both uniprogrammed systems that run single jobs in isolation and multiprogrammed environments that execute multiple parallel jobs simultaneously ate presented. the performance of the scheduling algorithms is evaluated on a network of workstations. A new scheduling algorithm proposed in this paper is observed to perform very well for systems running single jobs in isolation. the algorithms that use knowledge of job characteristics are observed to produce a superior performance in multiprogrammed parallel environments.

关键词： parallel processing systems

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