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Sorting N items using a p-sorter in optimal time

Sorting N items using a p-sorter in optimal time

引用

8th ieee symposium on parallel and distributed processing

作者： Olariu, S Zheng, SQ Old Dominion Univ Norfolk United States

ISBN: (纸本)0818676833

A sorting device capable of sorting p items in constant time is cabled a p-sorter. It is known that the task of sorting N items using a p-sorter requires at least Omega (N log N/p log p) applications of the p-sorter. this bound is tight: there exist algorithms that use O (N log N/p log p) calls to the p-sorter to sort N items. However, there is no known implementable algorithm that can sort N items in O (N log N/p log p) time using a p-sorter. the main contribution of this paper is to propose a simple VLSI architecture and to show that in our architecture N items can be sorted in O (N log N/p log p) calls to the p-sorter, while enforcing conflict-free memory accesses. An important feature of our design is that the total additional VLSI area for hardware, other than the memory for data and the p-sorter, is kept to a minimum.

关键词： special-purpose architectures VLSI sorting p-sorter optimal algorithms parallel algorithms reconfigurable mesh

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On the Effectiveness of Communication-Centric Modelling of Complex Embedded Systems 16

On the Effectiveness of Communication-Centric Modelling of C...

引用

16th ieee ISPA / 17th ieee IUCC / 8th ieee BDCloud / 11th ieee SocialCom / 8th ieee SustainCom

作者： Meyer, Hugo Odyurt, Uraz Polstra, Simon Paradas, Evangelos Alonso, Ignacio Gonzalez Pimentel, Andy D. Univ Amsterdam Informat Inst IvI Amsterdam Netherlands ASML Netherlands BV Veldhoven Netherlands

ISBN: (纸本)9781728111414

Performance anomaly detection and prevention in complex industrial systems, involving many distributed embedded computing nodes, is an ever-present challenge. Understanding such complex systems using purely analytical, or experimental techniques is neither sufficient, nor cost efficient. Efficient high-level models that allow the study of current system behaviour, predict performance trends and assess possible optimisation measures, are in demand. this paper presents an approach to automatically infer such high-level system models by using system-level tracing and to represent the current state of the system using Discrete Event Simulation (DES) techniques. the current behaviour pattern of the system is followed by replaying observations, while behavioural potentials under alternative sets of circumstances are considered by exploring what-if questions. Our results are applicable to anomaly detection and anomaly prevention solutions for complex systems. the main approach in keeping our workflow as efficient and as compact as possible is the use of a communication-centric modelling approach for complex embedded systems. As our use-case, we discuss the main challenges of modelling software processes and resource utilisation in semiconductor photolithography machines produced by ASML and how such complex systems can be mimicked with high-level event-based simulation. An automatically inferred OMNEST simulation model is presented and the different steps that were taken to simulate the behaviour of this production grade system are described. Initial evaluations show the maximum difference in application process lifetimes between real and simulated executions is less than 1%.

关键词： System of systems Modelling and simulation Performance monitoring distributed Cyber-Physical Systems (DCPS)

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Empirical study of dynamic scheduling on rings of processors

Empirical study of dynamic scheduling on rings of processors

引用

Proceedings of the 1996 8th ieee symposium on parallel and distributed processing

作者： Gregory, Dawn E. Gao, Lixin Rosenberg, Arnold L. Cohen, Paul R. Univ of Massachusetts Amherst United States

We empirically analyze and compare two distributed, low-overhead policies for scheduling dynamic tree-structured computations on rings of identical PEs. Our experiments show that both policies give significant parallel speedup on large classes of computations, and that one yields almost optimal speedup on moderate size rings. We believe that our methodology of experiment design and analysis will prove useful in other such studies.

关键词： parallel processing systems

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parallel algorithms for fast computation of normalized edit distances

Parallel algorithms for fast computation of normalized edit ...

引用

8th ieee symposium on parallel and distributed processing

作者： Egecioglu, O Ibel, M Univ of California Santa Barbara United States

ISBN: (纸本)0818676833

We give work-optimal and polylogarithmic time parallel algorithms for solving the normalized edit distance problem the normalized edit distance between two strings X and Y with lengths n greater than or equal to m is the minimum quotient of the sum of the costs of edit operations transforming X into Y by the length of the edit path corresponding to those edit operations. Marzal and Vidal proposed a sequential algorithm with a time complexity of O(nm(2)). Ne show that this algorithm can be parallelized work-optimally on an array of n (or m) processors, and on a mesh of n x m processors. We then propose a sublinear time algorithm that is almost work-optimal: using O(mn(1.75)) processors, the time complexity of the algorithm is O(n(0.75) log n) and the total number of operations is O(mn(2.5) log n). this algorithm runs on a CREW PRAM, but is likely to work an weaker PRAM models and hypercubes with minor modifications. Finally, we present a polylogarithmic O(log(2) n) time algorithm based an matrix multiplication which runs on a O(n(6)/log n) processor hypercube.

关键词： dynamic programming edit distance normalized edit distance parallel algorithm matrix multiplication fractional programming information retrieval pattern matching

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Efficient parallel CTL Model-Checking for Pushdown Systems 16

Efficient Parallel CTL Model-Checking for Pushdown Systems

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16th ieee ISPA / 17th ieee IUCC / 8th ieee BDCloud / 11th ieee SocialCom / 8th ieee SustainCom

作者： Chen, Xinyu Wei, Hansheng Ye, Xin Hao, Li Huang, Yanhong Shi, Jianqi East China Normal Univ Natl Trusted Embedded Software Engn Technol Res C Shanghai Peoples R China Hardware Software Codesign Technol & Applicat Eng Shanghai Peoples R China Shanghai Key Lab Trustworthy Comp Shanghai Peoples R China LIPN Paris France Paris Univ 7 Paris France

ISBN: (纸本)9781728111414

A Pushdown system (PDS) is a finite transition system equipped with stacks that are allowed to accurately model procedure calls and mimic the program's stack. therefore, a PDS is extensively used for the analysis and verification of sequential programs. the computational tree logic (CTL) model checking for PDS is reduced to an emptiness problem, which consists of computing the set of accepting configurations of an alternating Buchi PushDown System(ABPDS). When the PDSs are very large, the emptiness analysis can be time-consuming. In this study, we use the features of a Compute Unified Device Architecture (CUDA) to achieve the parallelism. First, we propose a parallel algorithm to conduct the emptiness analysis of the ABPDS in multi-threads. thus we propose a partitioned alternating multi automaton, which is a parallel extension of the alternating multi automaton (AMA) to represent the infinite set of configurations for the alternating Pushdown System and demonstrate how the emptiness analysis can be conducted in parallel based on a partitioned alternating multi automaton. Second, the process of the emptiness analysis is irregular, which means it is difficult to allocate resources dynamically. In order to effectively utilize the graphics processing unit (GPU), we design a new data structure and use thread scheduling to fit the computing model. the algorithm is implemented in a tool and is compared to the PDS model checker PuMoC as a benchmark. the results demonstrate a significant performance speedup (average 50X and up to 180X).

关键词： Pushdown Systems CTL CUDA model-checking

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Human Activity Recognition Using Federated Learning 16

Human Activity Recognition Using Federated Learning

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16th ieee ISPA / 17th ieee IUCC / 8th ieee BDCloud / 11th ieee SocialCom / 8th ieee SustainCom

作者： Sozinov, Konstantin Vlassov, Vladimir Girdzijauskas, Sarunas KTH Royal Inst Technol Stockholm Sweden

ISBN: (纸本)9781728111414

State-of-the-art deep learning models for human activity recognition use large amount of sensor data to achieve high accuracy. However, training of such models in a data center using data collected from smart devices leads to high communication costs and possible privacy infringement. In order to mitigate aforementioned issues, federated learning can be employed to train a generic classifier by combining multiple local models trained on data originating from multiple clients. In this work we evaluate federated learning to train a human activity recognition classifier and compare its performance to centralized learning by building two models, namely a deep neural network and a softmax regression trained on both synthetic and real-world datasets. We study communication costs as well as the influence of erroneous clients with corrupted data in federated learning setting. We have found that federated learning for the task of human activity recognition is capable of producing models with slightly worse, but acceptable, accuracy compared to centralized models. In our experiments federated learning achieved an accuracy of up to 89 % compared to 93 % in centralized training for the deep neural network. the global model trained with federated learning on skewed datasets achieves accuracy comparable to centralized learning. Furthermore, we identified an important issue of clients with corrupted data and proposed a federated learning algorithm that identifies and rejects erroneous clients. Lastly, we have identified a trade-off between communication cost and the complexity of a model. We show that more complex models such as deep neural network require more communication in federated learning settings for human activity recognition compared to less complex models, such as multinomial logistic regression.

关键词： Federated Learning Human Activity Recognition Privacy distributed Machine Learning

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APHID parallel αβ search algorithm

APHID parallel αβ search algorithm

引用

Proceedings of the 1996 8th ieee symposium on parallel and distributed processing

作者： Brockington, Mark G. Schaeffer, Jonathan Univ of Alberta Edmonton Canada

this paper introduces the APHID (Asynchronous parallel Hierarchical Iterative Deepening) game-tree search algorithm. APHID represents a departure from the approaches used in practice. Instead of parallelism based on the minimal search tree, APHID uses a truncated game-tree and all of the leaves of that tree are searched in parallel. APHID has been programmed as an easy to implement, game-independent αβ library, and has been tested on several game-playing programs. Results for an Othello program are presented here. the algorithm yields good parallel performance on a network of workstations, without using a shared transposition table.

关键词： parallel processing systems

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Towards Transparent parallel/distributed Support for Real-Time Embedded Applications

Towards Transparent Parallel/Distributed Support for Real-Ti...

引用

8th ieee International symposium on Industrial Embedded Systems (SIES)

作者： Garibay-Martinez, Ricardo Ferreira, Luis Lino Maia, Claudio Pinho, Luis Miguel Polytech Inst Porto ISEP CISTER INESC TEC Oporto Portugal

ISBN: (纸本)9781479906581

An increasing number of real-time embedded applications present high computation requirements which need to be realized within strict time constraints. Simultaneously, architectures are becoming more and more heterogeneous, programming models are having difficulty in scaling or stepping outside of a particular domain, and programming such solutions requires detailed knowledge of the system and the skills of an experienced programmer. In this context, this paper advocates the transparent integration of a parallel and distributed execution framework, capable of meeting real-time constraints, based on OpenMP programming model, and using MPI as the distribution mechanism. the paper also introduces our modified implementation of GCC compiler, enabled to support such parallel and distributed computations, which is evaluated through a real implementation. this evaluation gives important hints, towards the development of the parallel/distributed fork-join framework for supporting real-time embedded applications.

关键词： parallel execution real-time distributed embedded systems compiler support GCC OpenMP MPI

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T3C: A temporally correct concurrency control algorithm for distributed databases 8

T3C: A temporally correct concurrency control algorithm for ...

引用

8th International symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems

作者： Boukerche, A Tuck, TW Univ N Texas Parallel Simulat & Distributed Syst PARADISE Res Dept Comp Sci Denton TX 76203 USA

ISBN: (纸本)076950728X

In some scenarios involving on-line transaction processing within a distributed database, it is desirable to synchronize transactions in a manner that guarantees conflict equivalence with a serial schedule ordered by original transaction start times while providing each transaction with an anomaly serializable isolation. Few theoretical concurrency control algorithms guarantee such a conflict equivalence, and we are unaware of any protocol that accomplishes this while supporting real-world issues such as out-of-order transaction messages, out-of-order operation executions, and out-of-order transaction committals without the burden of explicit readset and writeset declarations We describe an algorithm that provides this guarantee mid supports these issues while requiring only table-level writeset declarations.

关键词： Concurrency control

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Deterministic parallel algorithm for the homing sequence problem

Deterministic parallel algorithm for the homing sequence pro...

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Proceedings of the 1996 8th ieee symposium on parallel and distributed processing

作者： Ravikumar, B. Univ of Rhode Island Kingston United States

Homing sequences play an important role in the testing of finite state systems and have been used in a number of applications such as hardware fault-detection, protocol verification, and learning algorithms etc. Recent applications of homing sequences involve large DFA's with thousands of states. Such applications motivate the design of a parallel algorithm for this problem. Here we present a deterministic parallel algorithm of time complexity O(√nlog2n) using a polynomial number of processors on CREW PRAM model. No faster deterministic parallel algorithm is known for this problem. We also discuss the parallel complexity of some related problems.

关键词： parallel algorithms

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