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ieee International symposium on parallel and distributed processing Workshops and Phd Forum (IPDPSW)

作者： Daniel Diaz Florian Richoux Yves Caniou Philippe Codognet Salvador Abreu Université de Paris 1-Sorbonne France JFLI CNRS/ UPMC University of Tokyo Japan JFLI CNRS / NII Japan Universidade de Évora and CENTRIA FCT/UNL Portugal

ISBN: (纸本)9781467309745

the Costas Array Problem is a highly combinatorial problem linked to radar applications. We present in this paper its detailed modeling and solving by Adaptive Search, a constraint-based local search method. Experiments have been done on both sequential and parallel hardware up to several hundreds of cores. Performance evaluation of the sequential version shows results outperforming previous implementations, while the parallel version shows nearly linear speedups up to 8,192 cores.

关键词： Arrays Search problems Program processors Adaptation models Benchmark testing Supercomputers

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Performance analysis of pC++: a portable data-parallel programming system for scalable parallel computers

Performance analysis of pC++: a portable data-parallel progr...

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International symposium on parallel processing

作者： A. Malony B. Mohr P. Beckman D. Gannon S. Yang F. Bodin Department of Comp. and Info. Sci. University of Oregon Eugene OR USA Department of Comp. Sci. Indiana University Bloomington IN USA Irisa University of Rennes I Rennes France

pC++ is a language extension to C++ designed to allow programmers to compose distributed data structures with parallel execution semantics. these data structures are organized as "concurrent aggregate" collection classes which can be aligned and distributed over the memory hierarchy of a parallel machine in a manner consistent with the High Performance Fortran Forum (HPF) directives for Fortran 90. pC++ allows the user to write portable and efficient code which will run on a wide range of scalable parallel computers. We discuss the performance analysis of the pC++ programming system. We describe the performance tools developed and include scalability measurements for four benchmark programs: a "nearest neighbor" grid computation, a fast Poisson solver, and the "Embar" and "Sparse" codes from the NAS suite. In addition to speedup numbers, we present a detailed analysis highlighting performance issues at the language, runtime system, and target system levels.< >

关键词： Performance analysis parallel programming Concurrent computing Scalability Runtime environment Programming profession Data structures parallel machines Portable computers Grid computing

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Mixed and augmented reality: “Scary and wondrous” 09

Mixed and augmented reality: “Scary and wondrous”

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International symposium on Mixed and Augmented Reality (ISMAR)

作者： Vernor Vinge Science Fiction Novelist

ISBN: (纸本)9781424453900

Summary form only given. Mixed and augmented reality is the nature of the supporting *** current incarnation is cloud computing versus microcontrollers distributed throughout the *** has always been a catchword of the distributed processing enthusiasts, and each new generation has pushed the idea beyond the horizons of the previous generation. Imagine an environment where most physical objects know where they are, what they are, and can (in principle) network with any other object. With this infrastructure, reality becomes its own *** consensual virtual environments are possible, each oriented to the needs of its constituency. If we also have open standards, then bottom-up social networks and even bottom-up advertising become *** the physical world becomes much more like a software construct. the possibilities are both scary and wondrous.

关键词： Augmented reality Cloud computing Microcontrollers distributed processing Image databases Object oriented databases Virtual environment Software standards Social network services Advertising

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Hardware support for synchronization in the Scalable Coherent Interface (SCI)

Hardware support for synchronization in the Scalable Coheren...

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International symposium on parallel processing

作者： N.M. Aboulenein J.R. Goodman S. Gjessing P.J. Woest Computer Sciences Department University of Wisconsin Madison USA Department of Informatics University of Oslo Norway Department of EECS Northwestern University USA

the exploitation of the inherent parallelism in applications written for shared-memory systems depends critically on the efficiency of the synchronization and data exchange primitives provided by the hardware. the authors discuss and analyze such primitives as they are implemented in the Scalable Coherent Interface (SCI). the SCI synchronization primitives are based on QOLB, a hardware primitive that shows much promise for reducing/eliminating the synchronization and access latencies of shared data. Introducing finer-grained programs in the absence of such latency reduction will have little or no benefit. In particular, the authors discuss how QOLB fits the underlying linked-list cache coherence protocol of SCI. they also show how, for some important scenarios (critical sections and pairwise-sharing, the QOLB primitives in SCI can greatly reduce data communication latencies.< >

关键词： Hardware Delay Access protocols Computer interfaces Informatics parallel processing Data communication distributed computing Prefetching Bandwidth

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parallelizing post-placement timing optimization 06

Parallelizing post-placement timing optimization

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International symposium on parallel and distributed processing (IPDPS)

作者： Jiyoun Kim M.C. Papaefthymiou J.L. Neves Advanced Computer Architecture Laboratory University of Michigan Ann Arbor MI USA IBM Server Group Poughkeepsie NY USA

ISBN: (纸本)9781424400546

this paper presents an efficient modeling scheme and a partitioning heuristic for parallelizing VLSI post-placement timing optimization. Encoding the paths with timing violations into a task graph, our novel modeling scheme provides an efficient representation of the timing and spatial relations among timing optimization tasks. Our new partitioning algorithm then assigns the task graph into multiple sessions of parallel processes, so that interprocessor communication is completely eliminated during each session. this partitioning scheme is especially useful for parallelizing processes with heavily connected tasks and, therefore, high communication requirements. For circuits with 20-130 thousand cells, the partitioning heuristic achieves speedups in excess of 5times without degrading solution quality by dynamically utilizing 1-8 processors

关键词： Timing Design optimization Very large scale integration Degradation Delay Partitioning algorithms Circuits parallel processing Design automation Computer architecture

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MANIP - A parallel COMPUTER SYSTEM FOR IMPLEMENTING BRANCH AND BOUND ALGORIthMS.

Conference Proceedings - Annual Symposium on Computer Archit...

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Conference Proceedings - Annual symposium on Computer Architecture 1981年 239-262页

作者： Wah, Benjamin W. Ma, Y.W.

the authors propose and analyze the design of MANIP, a parallel machine for processing nondeterministic polynomial complete problems. the most general technique that can be used to solve a wide variety of NP-complete problems on a uniprocessor system, optimally or suboptimally, is the branch and bound algorithm. the authors also have adapted and extended the branch and bound algorithm for parallel processing. the parallel branch and bound algorithm requires a combination of sorting and merging. A common memory to sort for a large number of processors can become a bottleneck in the system. Also proposed is a system with distributed intelligence so that sorting can be carried out in a distributed fashion. A unidirectional ring network is proved to be the optimal and most cost-effective interprocessor communication network when sorting is done by a hardware priority queue in each processor.

关键词： Computer architecture

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Communication and computation patterns of large scale image convolutions on parallel architectures

Communication and computation patterns of large scale image ...

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International symposium on parallel processing

作者： S.G. Dykes Xiaodong Zhang Yan Zhou Haixu Yang High Performance Computing and Software Laboratory University of Texas San Antonio San Antonio TX USA

Segmentation and other image processing operations rely on convolution calculations with heavy computational and memory access demands. the article presents an analysis of a texture segmentation application containing a 96/spl times/96 convolution. Sequential execution required several hours an single processor systems with over 99% of the time spent performing the large convolution. 70% to 75% of execution time is attributable to cache misses within the convolution. We implemented the same application on CM-5, iPSC/860 and PVM distributed memory multicomputers, tailoring the parallel algorithms to each machine's architecture. parallelization significantly reduced execution time, taking 49 seconds on a 512 node CM-5 and 6.5 minutes on a 32 node iPSC/860. the results indicate for large kernel convolutions the size and bandwidth of the fast memory store is more important than processor power or communication overhead.< >

关键词： Concurrent computing Large-scale systems parallel architectures Image segmentation Image processing Kernel Laboratories Bandwidth Pixel Smoothing methods

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distributed data structures in Linda 86

Distributed data structures in Linda

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13th AnnuaJ ACM symposium on the Principles of Programming Languages, POPL 1986

作者： Carriero, Nicholas Gelernter, David Leichter, Jerry Yale University Department O F Computer Science New HavenCT United States

ISBN: (纸本)089791175X

A distributed data structure Is a data structure that can be manipulated by many paralisi processes simultaneously. distributed data structures are the natural complement to parallel program structures, where a parallel program (for our purposes) is one that is made up of many simultaneously active, communicating processes. distributed data structures are impossible in most parallel programming languages, but they are supported In the parallel language Linda and they are central to .Linda programming style. We outline Linda, then discuss some distributed data structures that have arisen In Linda programming experiments to date. Our intent is neither to discuss the design of the Linda system nor the performance of Linda programs, though we do comment on both topics;we are concerned instead with a few of the simpler and more basic techniques made possible by a language model that, we argue, is subtly but fundamentally different in its implications from most others.

关键词： Data structures

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Enabling a Metric Space for Content Search in Information-Centric Networks

Enabling a Metric Space for Content Search in Information-Ce...

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8th International Conference on P2P, parallel, Grid, Cloud and Internet Computing (3PGCIC)

作者： Truong, Patrick Peltier, Jean-Francois Orange F-22307 Lannion France

ISBN: (纸本)9780769550947

the emergence of vivacious bandwidth-consuming services leveraged by the overwhelmingly content-centric usage on Internet has fostered over last years a new foundation for networking architecture design. Several Information-Centric Networking (ICN) architectures have then been proposed to tackle the challenging problems for content dissemination and distribution. those architectures propose a forwarding plane based on a naming scheme that uniquely identifies content objects in the network regardless of their location. Routing in ICN is thus performed on content names by means of a name resolution service that can be operated independently on the current endpoint-centric networking infrastructure. In order to sketch out the efficient design of such information-centric networks, an important functionality need to be taken into account for resolving information usability which consists in finding appropriate content objects matching users' interest. We propose in this paper a novel forwarding scheme which integrates content search in the network path when resolving content names into locators (where content is actually stored). the content indexing and discovery function relies on distance sensitive hashing based DHT for similarity search between content objects. the proposed routing algorithm can be used for better performance than using classical DHTs for resolving names in ICN. We conceptually embed the high-dimension set of content objects into a low-dimension for reducing processing complexity, which allows us to design an efficient and scalable information-centric forwarding plane with in-network content search.

关键词： Information Centric Networking (ICN) in-network content search name resolution distributed Hash Table (DHT) routing indexing distance similarity

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parallel evaluation of a parallel architecture by means of calibrated emulation

Parallel evaluation of a parallel architecture by means of c...

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International symposium on parallel processing

作者： H.L. Muller P.W.A. Stallard D.H.D. Warren S. Raina Department of Computer Science University of Bristol Bristol UK

A parallel transputer-based emulator has been developed to evaluate the Data Diffusion Machine (DDM)/spl minus/a highly parallel virtual shared memory architecture. the emulator provides performance results of a hardware implementation of the DDM using a calibrated virtual clock. Unlike the virtual clock of a simulator, the emulator clock is bound to a fixed fraction of real time, so individual processors may time actions independently without the need for a global clock value. Each component of the emulator is artificially slowed down, so that the balance of the speeds of all components reflects the balance of the expected hardware implementation. the calibrated emulator runs an order of magnitude faster than a simulator (the application program is executed directly and there is no overhead for the maintenance of event lists) and, more importantly, the emulator is inherently parallel. this results in a peak emulation speed of 27 MIPS when simulating a machine with 81 leaf nodes on a 121-node transputer system.< >

关键词： parallel architectures Emulation distributed decision making Clocks Memory architecture Software prototyping Hardware Virtual prototyping Prototypes Programming profession

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