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检索条件"任意字段=8th IFIP International Conference on Network and Parallel Computing"

共 1177 条记录，以下是91-100 订阅

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Caffeine: CoArray Fortran Framework of Efficient Interfaces to network Environments 8

Caffeine: CoArray Fortran Framework of Efficient Interfaces ...

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8th IEEE/ACM Annual Workshop on the LLVM Compiler Infrastructure in HPC, LLVM-HPC 2022

作者： Rouson, Damian Bonachea, Dan Computer Languages and Systems Software Group Lawrence Berkeley National Laboratory United States

ISBN: (纸本)9781665475587

this paper provides an introduction to the CoArray Fortran Framework of Efficient Interfaces to network Environments (Caffeine), a parallel runtime library built atop the GASNet-EX exascale networking library. Caffeine leverages several non-parallel Fortran features to write type-and rankagnostic interfaces and corresponding procedure definitions that support parallel Fortran 2018 features, including communication, collective operations, and related services. One major goal is to develop a runtime library that can eventually be considered for adoption by LLVM Flang, enabling that compiler to support the parallel features of Fortran. the paper describes the motivations behind Caffeine's design and implementation decisions, details the current state of Caffeine's development, and previews future work. We explain how the design and implementation offer benefits related to software sustainability by lowering the barrier to user contributions, reducing complexity through the use of Fortran 2018 C-interoperability features, and high performance through the use of a lightweight communication substrate. © 2022 IEEE.

关键词： Caffeine

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parallel Computation of Random Walks on Distributed Graphs

Parallel Computation of Random Walks on Distributed Graphs

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Big Data, Cloud computing, Data Science & Engineering (BCD)

作者： Yao Hu Research Institute for Digital Media and Content Hiyoshi Campus Keio University Yokohama Japan

A random walk is a process in which a random walker takes consecutive steps in space at equal intervals of time, with the length and direction of each step determined independently. Models related to random walks have been applied in diverse areas such as prediction, recommendation algorithms, and more recently, supervised learning and network analysis. Notably, there is a shortage of parallel computing models for random walks on distributed graphs across various scenarios. therefore, the objective of this work is to offer a versatile model for random walks on distributed graphs, covering network principles and algorithmic models, followed by their parallel implementations. Evaluation results demonstrate the remarkable efficiency of our network model and highlight the future prospects of parallel random walks.

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Morphological, Object Detection Framework for Embedded, Event-based Sensing 8

Morphological, Object Detection Framework for Embedded, Even...

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8th international conference on Event-Based Control, Communication and Signal Processing (EBCCSP)

作者： Villemur, Martin Sengupta, Jonah P. Julian, Pedro Andreou, Andreas G. Johns Hopkins Univ Dept Elect & Comp Engn Baltimore MD USA Silicon Austria Labs Intelligent Wireless Syst Div Vienna Austria

ISBN: (数字)9781665453493

ISBN: (纸本)9781665453493

this paper presents a high-speed, object detection algorithm that leverages data from an event-based camera and a spike-based, cellular neural network framework for morphological processing. Event-based data flows into the algorithm in a time-serial, asynchronous fashion, but the algorithm and subsequent architecture description lends itself towards a parallel approach. A cellular neural-network (CNN) is composed of multi-modal processing elements that provide the means to spatiotemporally filter event data, but also are used to apply a cascade of piece-wise linear functions in a synchronous fashion. When applied in succession, these morphological operations form object "blobs", produce shape skeletons, and place centroids. Over an event stream, this rapid centroid placement provides a means to perform low-latency object detection in an embedded framework. Using processing intervals of 25ms and assuming a clock of 100 MHz, a computational latency of around 5.5 mu s is incurred and an estimated 161uW is consumed by the morphological algorithm thus providing a promising solution for event-based, embedded processing.

关键词： event-based processing edge computing cellular neural-networks morphological processing

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Efficiency Assessment of an Institute through parallel network Data Envelopment Analysis 11th

Efficiency Assessment of an Institute Through Parallel Netwo...

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11th international conference on Soft computing for Problem Solving, SocProS 2022

作者： Kumar, Atul Panwar, Ankita Pant, Millie Department of Applied Mathematics and Scientific Computing Indian Institute of Technology Roorkee Roorkee247667 India Mehta Family School of Data Science and Artificial Intelligence Indian Institute of Technology Roorkee Roorkee247667 India

ISBN: (纸本)9789811965241

Conventional data envelopment analysis (DEA) is a non-parametric approach to examine the efficiency of similar decision-making units (DMUs) as a whole system without considering its internal structure, i.e., the system is considered as a black box. therefore, a network DEA (NDEA) is needed to study the internal structure of a system. By allowing for the measurement of individual components, an NDEA model can reveal inefficiencies that a traditional DEA ignores. In this study, we use the parallel network DEA to calculate the efficiency of a higher education institute with 19 decision-making units (DMUs) using two parallel processes (teaching and research) and compare it with the conventional DEA, CCR model through a numerical example. the main advantages of the parallel NDEA model are (i) to identify which DMUs are inefficient and make necessary adjustments, and (ii) the parallel DEA model has a lower efficiency score than the traditional DEA model. © 2023, the Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

关键词： Efficiency

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A Satellite-Ground Link Handover Strategy in LEO networks Using Advantage Actor-Critic Algorithm 20th

A Satellite-Ground Link Handover Strategy in LEO Networks U...

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20th ifip WG 10.3 international conference on network and parallel computing, NPC 2024

作者： Chen, Chen Tong, Chenqiang Cong, Li Wang, Zhiyi Jin, Fan Zhou, Xiaobo Pei, Qingqi School of Telecommunication Engineering Xidian University Xi’an710071 China Xidian Guangzhou Institute of Technology Xidian University Guangzhou China Xidian Hangzhou Institute of Technology Xidian University Hangzhou China The State Grid Jilin Province Electric Power Company Changchun130000 China National Key Laboratory of Science and Technology on Space Microwave CAST Xi’an710100 China College of Intelligence and Computing Tianjin University Tianjin300350 China

ISBN: (纸本)9789819628636

Low Earth Orbit (LEO) satellite network is a crucial component of the Space-Air-Ground Integrated network (SAGIN) architecture and Non-Terrestrial networks (NTN). It can provide global, real-time, and seamless broadband data services to many users, playing a critical role in emergencies such as disaster relief. this paper proposes an LEO satellite networks satellite-ground link handover strategy based on Advantage Actor-Critic (A2C) to tackle challenges associated with high handover frequency among ground users, data transmission blocking, and access selection post-handover due to the high-speed cyclic motion of satellites. the strategy considers three handover factors: signal reception strength, satellite potential service time, and service quality. At first, the handover problem is modeled as a combinatorial optimization problem, subsequently transformed into a Markovian Action-Value Function (MAVF) based Multi-Agent Markov Decision Process (MAMDP), and solved in the framework of the A2C algorithm proposed in this paper. the results of simulations illustrate the superior performance of the proposed handover strategy compared to three alternative strategies, namely, Random Handover (RH), Maximum number of Free Channels (MFC), and Maximum Service Time (MST), in terms of both convergence and practicality. the average number of handover occurrences can be reduced by up to 58%, consequently lowering the probability of blocking data transmission. Moreover, signal quality exhibits more excellent stability and can be enhanced by up to 39%, thereby ensuring user communication quality. © ifip international Federation for Information Processing 2025.

关键词： Markov processes

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Accelerating Deep Convolutional Neural network Inference Based on OpenCL 5th

Accelerating Deep Convolutional Neural Network Inference Bas...

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5th ifip TC 12 international conference on Intelligence Science, ICIS 2022

作者： Wu, Yong Zhu, Huming Zhang, Lingyun Hou, Biao Jiao, Licheng Xidian-Wuhu Research Institute Wuhu China Key Laboratory of Intelligent Perception and Image Understanding Ministry of Education Xidian University Xi’an710071 China

ISBN: (纸本)9783031149023

In recent years, in order to facilitate the efficient application of deep convolutional neural networks, it has become increasingly important to accelerate the inference stage of deep convolutional neural networks. But with the development of numerous heterogeneous computing devices, today’s popular deep learning inference tools only support specific devices, so they cannot effectively utilize different GPU devices to accelerate DNN inference. To address this issue, we propose an OpenCL-based parallel deep convolutional neural network inference algorithms. Firstly, we design and implement parallel kernel code using OpenCL to accelerate depthwise separable convolution, and implement parallel matrix multiplication combined with clBLAS to accelerate traditional convolution. Meanwhile, we design OpenCL parallel kernel codes for other operations in the inference stage of deep convolutional neural networks. Secondly, we further improve the inference performance by means of kernel fusion and increasing the workload per core. Finally, MobileNet v1 network and the 21-layer residual network based on OpenCL are run on AMD Radeon Vega Frontier GPU and Nvidia GeForce GTX 1070 GPU. Compared to the Caffe implementation, 40.16x, 1.67x speedups are achieved on the AMD GPU and 14.95x, 1.11x speedups are achieved on the Nvidia GPU. © 2022, ifip international Federation for Information Processing.

关键词： Graphics processing unit

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Distributed Resource Autoscaling in Kubernetes Edge Clusters 18

Distributed Resource Autoscaling in Kubernetes Edge Clusters

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18th international conference on network and Service Management (CNSM) - Intelligent Management of Disruptive network Technologies and Services

作者： Spatharakis, Dimitrios Dimolitsas, Ioannis Vlahakis, Eleftherios Dechouniotis, Dimitrios Athanasopoulos, Nikolaos Papavassiliou, Symeon Natl Tech Univ Athens Sch Elect & Comp Engn Athens Greece Queens Univ Belfast Sch Elect Elect Engn & Comp Sci Belfast Antrim North Ireland

ISBN: (纸本)9783903176515

Maximizing the performance of modern applications requires timely resource management of the virtualized resources. However, proactively deploying resources for meeting specific application requirements subject to a dynamic workload profile of incoming requests is extremely challenging. To this end, the fundamental problems of task scheduling and resource autoscaling must be jointly addressed. this paper presents a scalable architecture compatible with the decentralized nature of Kubernetes [1], to solve both. Exploiting the stability guarantees of a novel AIMD-like task scheduling solution, we dynamically redirect the incoming requests towards the containerized application. To cope with dynamic workloads, a prediction mechanism allows us to estimate the number of incoming requests. Additionally, a Machine Learning-based (ML) Application Profiling Modeling is introduced to address the scaling, by co-designing the theoretically-computed service rates obtained from the AIMD algorithm with the current performance metrics. the proposed solution is compared with the state-of-theart autoscaling techniques under a realistic dataset in a small edge infrastructure and the trade-off between resource utilization and QoS violations are analyzed. Our solution provides better resource utilization by reducing CPU cores by 8% with only an acceptable increase in QoS violations.

关键词： Edge computing Resource Management Resource Autoscaling Machine Learning Kubernetes

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Redesign of a conference from In-Person to Online. Case Study: ICCCC 8th

Redesign of a Conference from In-Person to Online. Case Stud...

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8th international conference on Computers Communications and Control (ICCCC)

作者： Dzitac, Ioan Dzitac, Simona Filip, Florin Gheorghe Manolescu, Misu-Jan Agora Univ Oradea Piata Tineretului 8 Oradea 410526 Romania Univ Oradea Univ 1 Oradea Romania Romanian Acad 125 Calea Victoriei Bucharest Romania

ISBN: (纸本)9783030536510

"Intelligent Methods for computing, Communications and Control" volume, published by Springer in "Advances in Intelligent Systems and computing" Series, is in fact the Proceedings of the 8th international conference on Computers Communications and Control (ICCCC) 2020. the ICCCC has been founded in 2006 by Ioan Dzitac, Florin Gheorghe Filip and Misu-Jan Manolescu, and was organized every even year by Agora University of Oradea, under the aegis of the Information Science and Technology Section of Romanian Academy. the first seven editions were organized face to face (in-person, traditional). Due to the COVID-19 pandemic, the 8th edition, ICCCC2020, which was designed initial to be in-person, we had redesign it as an online event (remotely). In this article we will present our study and conclusions regarding a parallel between the two types of conferences, traditional vs. online, each with advantages and disadvantages.

关键词： conference organization ICCCC In-person COVID-19 Online Remote Accessibility Costs Comfort Socialization Zoom Pro

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Hardware Trojan Mitigation for Securing On-chip networks from Dead Flit Attacks 30

Hardware Trojan Mitigation for Securing On-chip Networks fro...

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30th ifip/IEEE international conference on Very Large Scale Integration (VLSI-SoC)

作者： Khan, Mohammad Humam Gupta, Ruchika Kulkarni, Vedika J. Jose, John Nandi, Sukumar Indian Inst Technol Guwahati Dept Comp Sci & Engn Gauhati India Chandigarh Univ Dept Comp Sci & Engn Chandigarh India

ISBN: (数字)9781665490054

ISBN: (纸本)9781665490054

With the advancements in VLSI technology, Tiled Chip Multicore Processors (TCMP) with packet switched network-on-Chip (NoC) have emerged as the backbone of the modern data intensive parallel multi-core systems. Tight time-to-market and cost constraints have forced chip manufacturers to use third-party IPs in sophisticated TCMP designs. this dependence over third party IPs has instigated security vulnerabilities in inter-tile communication that cannot be detected at manufacturing and testing phases. this includes possibility of having malicious circuits like Hardware Trojans (HT). NoC is the likely target of HT insertion due to its significance and positional advantage from system and communication standpoints. Recent research shows that HTs can manipulate control fields of NoC packets and leads to dead flit attacks that has the potential to disrupt the on-chip communication resulting in application level stalling. In this paper, we propose run time detection of such dead flit attacks by analyzing packet movement behaviours. We also propose a cost effective mitigation mechanism by re-routing the packets around the HT infected router. Our experimental study with real benchmarks on 8x8 mesh TCMP evaluates the effectiveness of the proposed solution.

关键词： network-On-Chips Hardware Trojans Packet Flow Analysis Dead Flit Attack Run-time Mitigation

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Analysis of Optimum 3-Dimensional Array and Fast Data Movement for Efficient Memory Computation in Convolutional Neural network Models 7th

Analysis of Optimum 3-Dimensional Array and Fast Data Moveme...

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7th international conference on Computer, Communication and Signal Processing, ICCCSP 2023

作者： Selvaraj, Deepika Venkatesan, Arunachalam Novo, David Department of Micro and Nanoelectronics Vellore Institute of Technology Vellore India University of Montpellier LIRMM Montpellier France

ISBN: (纸本)9783031398100

CNN-based inference engine’s performance and efficiency always depend on the computational and dataflow-control complexity. Instead of considering a 2-dimensional (2D) feature array for processing, a 3D array of features/weights would improve the dataflow movement & memory computation. the optimum 8 × 8 × 32 3D-feature array size was chosen based on the factor of on-chip memory requirement, data reuse, and PE utilization. Using the optimum 8 × 8 × 32 feature array, seven different combinations of data-flow scheduling strategies were analyzed by varying row, column, and depth-wise parameters on the workload model using a MATLAB environment. From the analysis, strategy-V (depth-wise parallel & row/column-wise sequence) is found to be the best with a 4 × 8 processor array. Compared to the state-of-the-art processor strategy, strategy-V achieves the data transfer rate (off-chip to on-chip) and on-chip memory requirement of 3.3 times (higher) and 16 times (lesser) with a small overhead of processor cost. © ifip international Federation for Information Processing 2023.

关键词： Data transfer

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