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共 1177 条记录，以下是141-150 订阅

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A parallel XML Parsing Algorithm Based on NEM-XML

A Parallel XML Parsing Algorithm Based on NEM-XML

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international conference on network and Information Systems for Computers (ICNISC)

作者： Yunsong Zhang School of Information Engineering Suzhou Industrial Park Institute of Services Outsourcing Suzhou Jiangsu China

ISBN: (纸本)9781665453523

As the de facto data representation and data exchange standard, XML has become very popular over Internet. How to improve XML parsing performance is the key to promote its further development and application. parallel computing is a key technology for solving problems with huge computation. this paper presents a parallel approach on XML parsing based on NEM-XML. the experimental results show that our parallel XML parsing algorithm improves XML parsing performance significantly and scales well.

关键词： Computers XML parallel processing Partitioning algorithms Internet Standards Testing

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Simplifying Graph-parallel Computation in Apache Spark with GraphX

Simplifying Graph-Parallel Computation in Apache Spark with ...

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international conference of Electronics, Communication and Aerospace Technology (ICECA)

作者： Lasya Vyakaranam Ramakrishnan Raman Harshal Shah Nilamadhab Mishra R. Meenakshi S. Murugan Symbiosis Law School (SLS) Pune Symbiosis International (Deemed University) Pune Maharashtra India Symbiosis Institute of Business Management Pune & Symbiosis International (Deemed University) Pune Maharashtra India Faculty of Engineering and Technology Parul Institute of Engineering and Technology Parul University Vadodara Gujarat India School of Computing Science and Engineering VIT Bhopal University Madhya Pradesh India Department of Computer Science and Engineering Chennai Institute of Technology Chennai Tamil Nadu India Department of Biomedical Engineering Saveetha School of Engineering Saveetha Institute of Medical and Technical Sciences Saveetha University Chennai Tamil Nadu India

ISBN: (数字)9798350367904

ISBN: (纸本)9798350367911

Streamlining Apache graph-parallel computing the goal of integrating Spark with GraphX is to make processing massive amounts of graph data easier and faster. the goal is to streamline the process of creating and running graph algorithms by using GraphX, a Spark-based distributed graph processing platform. the eventual objective is to create a scalable platform that is easy to use for graph-structured data analysis and manipulation. Improving GraphX’s performance, expanding its features, and integrating it with Spark’s ecosystem are all part of this process. the expected result is a flexible and strong framework that lets data scientists and developers execute complicated graph analytics tasks with ease. this will pave the way for applications in many fields, including recommendation systems, social network analysis, and biological network analysis. Optimizing performance in graph-parallel computer situations, making the development process easier, and making it more scalable are the main goals. the graph structure visualization results in graph data revealing values in the range of 1.2 to 5.6 for a sample of five distinct vertex/edge types. the degree distribution histogram in the same dataset shows that, for five different frequencies, the numbers range from around 1.5 to 4.5. For the same dataset, the PageRank Convergence Plot shows values ranging from 0.4 to 0.9 for five distinct iterations/scores.

关键词： Histograms Technological innovation Social networking (online) Scalability Data visualization Cluster computing Distance measurement Sparks Recommender systems Convergence

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A High throughput and Flexible Rate 5G NR LDPC Encoder on a Single GPU 24

A High Throughput and Flexible Rate 5G NR LDPC Encoder on a ...

引用

24th international conference on Advanced Communication Technology (ICACT) - Artificial Intelligence Technologies toward Cybersecurity

作者： Liao, Shixin Zhan, Yueying Shi, Ziyuan Yang, Lei Chinese Acad Sci Key Lab Space Utilizat Technol & Engn Ctr Space Utilizat Beijing Peoples R China Univ Chinese Acad Sci Beijing Peoples R China

ISBN: (纸本)9791188428090

In order to build a high performance low-density parity-check (LDPC) communication link simulation platform, high speed LDPC encoding for information sequence is required. In this paper, a high and flexible throughput LDPC encoding implementation based on a single GPU is proposed. We discuss the parallelism of the LDPC encoding algorithm employs the core parity check bits and single diagonal parity check bits for the fifth generation new ratio. We implement the parallel LDPC encoder on CUDA platform. the experimental results show that our LDPC encoding module achieves a 38-62Gbps throughput for the rate from 1/2 to 8/9 on a single GPU. the results also demonstrate that parallel simulation tasks based on GPUs can achieve a good trade-off between performance and cost.

关键词： 5G New Ratio quasi-cyclic LDPC code channel encoding parallel computing CUDA

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Comparative analysis of security algorithms used in cloud computing 8

Comparative analysis of security algorithms used in cloud co...

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8th international conference on computing for Sustainable Global Development, INDIACom 2021

作者： Tajammul, Mohd Parveen, Rafat Tayubi, Iftikhar Aslam Jamia Millia Islamia Department of Computer Science New Delhi India King Abdulaziz University Department of Computer Science Jeddah Saudi Arabia

ISBN: (纸本)9789380544434

Cloud computing is a technique that enables the users to access applications to infrastructure through subscription methods on remote location. Cloud computing, being collective technique, possesses features of various technologies like Virtual Private network (VPN), distributed technology, parallel computing, grid computing as well as ubiquitous computing. Cloud storage is the infrastructure offered by the cloud computing in order to facilitate users to upload and access their data on cloud space. Due to multitenancy of cloud storage, the data uploaded on it is the more prone to security breaches. To secure the data on cloud, cryptographic technique is used which works like safeguard against data leakage. this research work focuses on cryptographic algorithms from most basic to advance and also presents their comparative analysis. Moreover, the paper focuses on the nature of the algorithms in context of cloud that is homogeneous and heterogeneous nature. In the cloud computing, homogeneous nature algorithm is used only if the encryptors and decryptors both are same while heterogeneous refers to the situation in which encryptors and decryptors are different entities. © 2021 Bharati Vidyapeeth, New Delhi. Copy Right in Bulk will be transferred to IEEE by Bharati Vidyapeeth.

关键词： Cryptography

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FP-ATM: A Flexible Floating Point NOR Adder Tree Macro for In-Memory computing

FP-ATM: A Flexible Floating Point NOR Adder Tree Macro for I...

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international conference on VLSI Design

作者： Yathin Kumar Attuluri Ruchit Chudasama Kailash Prasad Joycee Mekie IIIT Bangalore IIT Gandhinagar

In-Memory computing (IMC) has emerged as a promising approach to address the von Neumann bottleneck in deep learning applications. this work proposes FP-ATM, a 6T SRAM-based all-digital design for multiply-accumulate (MAC) operations, featuring a flexible NOR Adder Tree for In-Memory computing. the proposed macro is data-aware and can support input activations and weights for INT8 and BF16 number formats in a convolutional neural network. Using multiple macros in different configurations can support neural networks with different topologies. the proposed macro is based on bit-serial multiplication and parallel adder trees. this architecture can achieve massively parallel MAC operations with high energy efficiency and throughput. the proposed macro achieves a peak energy efficiency of 267.7 TFLOPS/W at 0.65V, 8.5 times the state-of-the-art work. the maximum frequency is 1.67 GHz and achieves throughput of 2.67 GFLOPS/Kb at a voltage of 0.9V.

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A Physical Reservoir computing Model Based on Volatile Memristor for Temporal Signal Processing 29

A Physical Reservoir Computing Model Based on Volatile Memri...

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29th IEEE international conference on Electronics, Circuits and Systems (IEEE ICECS)

作者： Liang, Xiangpeng Zhong, Yanan Li, Xinyi Huang, Heyi Li, Tingyu Tang, Jianshi Bin Gao Qian, He Wu, Huaqiang Heidari, Hadi Univ Glasgow James Watt Sch Engn Microelect Lab Glasgow G12 8QQ Lanark Scotland Tsinghua Univ Beijing Natl Res Ctr Informat Sci & Technol BNRis Sch Integrated Circuits Beijing 100084 Peoples R China

ISBN: (数字)9781665488235

ISBN: (纸本)9781665488235

Reservoir computing has emerged as a practical paradigm of implementing neural network algorithms on hardware for high-efficient computing. With the concept of reservoir computing, various electronic' dynamics can be harvested as computational resources, which has received considerable attention in recent years. Volatile memristor is an emerging memristive device that exhibiting interesting biomimetic behaviours such as short-term memory. Moreover, its conductance state can be varied by historical stimulation. In this work, a reservoir computing model using TiOx-based volatile memristor as processing core is proposed. the volatile memristor is measured and characterised, followed by using the discrete model to approximate the behaviours of the volatile memristor. Finally, a parallel volatile memristor reservoir computer is simulated based on the volatile memristor model. this model is evaluated by a waveform classification. the results (normalized root mean square error is 0.15 when using 10 volatile memristors) indicate the feasibility of using the physical behaviours of volatile memristor for constructing reservoir computers.

关键词： Performance evaluation Computational modeling Biological system modeling System performance Memristors Computer architecture Reservoirs

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An Efficient parallel CNN Inference Framework for Multi-zone Processor

An Efficient Parallel CNN Inference Framework for Multi-zone...

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IEEE international conference on High Performance computing and Communications (HPCC)

作者： Jie Chen Zhong Liu College of Computer National University of Defense Technology Changsha China

Deep convolutional neural networks have been widely used in various fields, and how to accelerate and optimize the performance of neural network models according to the architectural characteristics of accelerator hardware has become the research hot spot. We propose and design an efficient parallel convolutional neural network inference framework named PCIF for multi-zone processor. Its core is a multi-core parallel and vectorized C++ operator library. PCIF has designed optimized data layout and transmission strategies, layer fusion and multi-image fusion methods, which can automatically parse and efficiently map existing neural network models to multi-core vector accelerators to accelerate inference computation. Users can also build new neural network models through the C++ and Python APIs provided by PCIF to achieve high performance inference computing. the results of the experiment show that the AlexNet, VGG-16, GoogleNet, and ResNet-50 network models achieve efficient computing performance using PCIF.

关键词： Quantization (signal) Multicore processing Computational modeling Neural networks C++ languages parallel processing Libraries

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FLoX: Federated Learning with FaaS at the Edge 18

FLoX: Federated Learning with FaaS at the Edge

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IEEE 18th international conference on E-Science (E-Science)

作者： Kotsehub, Nikita Baughman, Matt Chard, Ryan Hudson, Nathaniel Patros, Panos Rana, Omer Foster, Ian Chard, Kyle Minerva Univ San Francisco CA 94103 USA Univ Chicago Dept Comp Sci Chicago IL 60637 USA Argonne Natl Lab Data Sci & Learning Div Lemont IL USA Univ Waikato Dept Software Engn Hamilton Aoteama New Zealand Cardiff Univ Sch Comp Sci & Informat Cardiff Wales

ISBN: (数字)9781665461245

ISBN: (纸本)9781665461245

Federated learning (FL) is a technique for distributed machine learning that enables the use of siloed and distributed data. With FL, individual machine learning models are trained separately and then only model parameters (e.g., weights in a neural network) are shared and aggregated to create a global model, allowing data to remain in its original environment. While many applications can benefit from FL, existing frameworks are incomplete, cumbersome, and environment-dependent. To address these issues, we present FLoX, an FL framework built on the funcX federated serverless computing platform. FLoX decouples FL model training/inference from infrastructure management and thus enables users to easily deploy FL models on one or more remote computers with a single line of Python code. We evaluate FLoX using three benchmark datasets deployed on ten heterogeneous and distributed compute endpoints. We show that FLoX incurs minimal overhead, especially with respect to the large communication overheads between endpoints for data transfer. We show how balancing the number of samples and epochs with respect to the capacities of participating endpoints can significantly reduce training time with minimal reduction in accuracy. Finally, we show that global models consistently outperform any single model on average by 8%.

关键词： Federated learning serverless edge computing heterogeneous computing computing continuum

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Anomaly Detection Using Edge computing AI on Low Powered Devices 1

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18th international conference on Artificial Intelligence Applications and Innovations (AIAI)

作者： Bratu, Dragos-Vasile Ilinoiu, Rares Stefan Tiberius Cristea, Alexandru Zolya, Maria-Alexandra Moraru, Sorin-Aurel Transilvania Univ Brasov Brasov 500036 Romania

ISBN: (数字)9783031083334

ISBN: (纸本)9783031083334;9783031083327

In the industrial environment, maintaining a permanent good state of functioning for every piece of equipment has a substantial importance. this, however, is very difficult to attain, due to the mechanical wear, the environment of operation, or improper usage. Predictive maintenance is a practice that is performed to determine the condition of the machinery in service and estimate the time when the maintenance should occur. the challenge of detecting a possible fault in a piece of equipment before it occurs is one of the main tasks of the predictive maintenance process. Reading data from sensors and creating firmware that monitors the equipment can be time and resource-consuming, and not practical if the equipment is changed frequently. Nowadays, the computational power of Artificial Intelligence exceeds that of a computer. As the industrial equipment and the hardware components of a conventional computer are getting increasingly expensive and demanded, more andmore entities are running Machine Learning algorithms, which make the data exchange with a server that runs this service a more feasible process. this approach poses several challenges due to latency, privacy, bandwidth, and network connectivity. To solve these limitations, computation should be moved as much as possible towards the Edge, directly on the devices that gather the data. In this article, we propose a compact and low-powered solution that is accurate and small enough to be fitted on a microcontroller or a device that runs on the Edge. this approach ensures that a minimum amount of resources are used. the solution consists of an Unsupervised learning algorithm that can detect anomalies in the vibration patterns of the bearings or the casing of industrial motors. It uses an Autoencoder that takes as input the median absolute deviation of each measurement set provided by an accelerometer, then with the help of a classifier compares the values provided by the output to values that are known to be norm

关键词： ESP32 Autoencoder Machine learning Edge computing Anomaly detection

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Genetic-A* Algorithm-Based Routing for Continuous-Flow Microfluidic Biochip in Intelligent Digital Healthcare 18th

Genetic-A* Algorithm-Based Routing for Continuous-Flow Micr...

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18th international conference on Green, Pervasive, and Cloud computing, GPC 2023

作者： Huang, Huichang Yang, Zhongliao Zhong, Jiayuan Xu, Li Dong, Chen Bao, Ruishen College of Computer and Data Science Fuzhou University Fuzhou350116 China College of Computer and Cyber Security Fujian Normal University Fuzhou350007 China Fujian Key Laboratory of Network Computing and Intelligent Information Processing Fuzhou University Fuzhou China

ISBN: (纸本)9789819998951

In the field of intelligent digital healthcare, Continuous-flow microfluidic biochip (CFMB) has become a research direction of widespread concern. CFMB integrates a large number of microvalves and large-scale microchannel networks into a single chip, enabling efficient execution of various biochemical protocols. However, as the scale of the chip increases, the routing task for CFMB becomes increasingly complex, and traditional manual routing is no longer sufficient to meet the requirements. therefore, this paper proposes an automatic routing framework for CFMB based on Genetic algorithm (GA) and A* algorithms. Specifically, we adopt a two-stage A* algorithm to design the routing between modules, using the routing results obtained from the A* algorithm as the basis for evaluating the quality of solutions in the GA algorithm. then, the GA algorithm is used to search for the optimal approximate solution in the solution space. Experimental results show that this method can reduce routing length and minimize routing crossings, thereby improving the parallel transmission speed of reagents on CFMB. this approach provides a feasible solution for large-scale automated routing of CFMB in the field of intelligent digital healthcare. © the Author(s), under exclusive license to Springer Nature Singapore Pte Ltd 2024.

关键词： Genetic algorithms

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