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Analysis of fast parallel sorting algorithms for GPU architectures

Analysis of fast parallel sorting algorithms for GPU archite...

引用

2011 9th international conference on Frontiers of Information Technology, FIT 2011

作者： Khan, Fiaz Gul Khan, Omar Usman Montrucchio, Bartolomeo Giaccone, Paolo Politecnico di Torino Italy

ISBN: (纸本)9780769546254

Sorting algorithms have been studied extensively since past three decades. their uses are found in many applications including real-time systems, operating systems, and discrete event simulations. In most cases, the efficiency of an application itself depends on usage of a sorting algorithm. Lately, the usage of graphic cards for general purpose computing has again revisited sorting algorithms. In this paper we extended our previous work regarding parallel sorting algorithms on GPU, and are presenting an analysis of parallel and sequential bitonic, odd-even and rank-sort algorithms on different GPU and CPU architectures. their performance for various queue sizes is measured with respect to sorting time and rate and also the speed up of bitonic sort over odd-even sorting algorithms is shown on different GPUs and CPU. the algorithms have been written to exploit task parallelism model as available on multi-core GPUs using the OpenCL specification. Our findings report minimum of 19x speed-up of bitonic sort against odd-even sorting technique for small queue sizes on CPU and maximum of 2300x speed-up for very large queue sizes on Nvidia Quadro 6000 GPU architecture. © 2011 IEEE.

关键词： Graphics processing unit

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Fast and Accurate Similarity Searching of Biopolymer Sequences with GPU and CUDA

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11th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Pawlowski, Robert Malysiak-Mrozek, Bozena Kozielski, Stanislaw Mrozek, Dariusz Silesian Tech Univ Inst Informat PL-44100 Gliwice Poland

ISBN: (纸本)9783642246494

CUDA is an architecture introduced by NVIDIA Corporation, which allows software developers to take advantage of GPU resources in order to increase the computational power. this paper presents an approach to accelerate the similarity searching of DNA and protein molecules through parallel alignments of their sequences with the use of GPU and CUDA. In order to optimally align two biopolymer sequences, such as amino acid or nucleotide sequences, we employ the Smith-Waterman algorithm. We present the optimization steps leading to achieve a very good efficiency of our implementation on GPU and we compare results of efficiency tests with other known implementations. the results show that it is possible to search bioinformatics databases accurately within a reasonable time.

关键词： bioinformatics DNA proteins sequence alignment parallel computing GPU CUDA

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A sensor network abstraction for flexible public sensing systems

A sensor network abstraction for flexible public sensing sys...

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8th IEEE international conference on Mobile Ad-hoc and Sensor Systems, MASS 2011

作者： Philipp, Damian Durr, Frank Rothermel, Kurt Institute of Parallel and Distributed Systems University of Stuttgart Stuttgart Germany

ISBN: (纸本)9780769544694

Public Sensing is a new paradigm for developing large-scale sensor networks at low cost by utilizing mobile phones that are already surrounding us in our everyday lives. In this paper we present a sensor network abstraction layer for creating flexible public sensing systems that can execute arbitrary queries. To this effect we develop several algorithms to select mobile nodes for executing a query. these algorithms allow a user to define a trade-off between quality and efficiency of query execution by choosing an appropriate algorithm. Our evaluations show that we can achieve a 99% increase in efficiency with the most efficient approaches and only about 10% decrease in result quality under worst conditions. © 2011 IEEE.

关键词： Sensor networks

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Modeling QoS Parameters of VoIP Traffic with Multifractal and Markov Models 1

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11th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Toral-Cruz, Homero Pathan, Al-Sakib Khan Ramirez-Pacheco, Julio C. Dept. of Sciences and Engineering Universidad de Quintana Roo México Dept. of Postgraduate Instituto Tecnológico Superior de Las Choapas México Dept. of Computer Science International Islamic University Malaysia Malaysia Dept. of Basic Sciences and Engineering Universidad Del Caribe México

ISBN: (数字)9783642246692

ISBN: (纸本)9783642246685

In this paper, we analyze the jitter and packet loss behavior of voice over Internet protocol (VoIP) traffic by means of networks measurements and simulations results. As result of these analyses, we provide a detailed characterization and accurate modeling of these Quality of Service (QoS) parameters. Our studies have revealed that VoIP jitter can be modeled by self-similar and multifractal models. We present a methodology for simulating packet loss. Besides, we found relationships between Hurst parameter (H) with packet loss rate (PLR).

关键词： VoIP PLR Jitter H Parameter Markov Chains Multifractality

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parallel compression checkpointing for socket-level heterogeneous systems

Parallel compression checkpointing for socket-level heteroge...

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13th IEEE international Workshop on FTDCS 2011, the 8th international conference on ATC 2011, the 8th international conference on UIC 2011 and the 13th IEEE international conference on HPCC 2011

作者： Liu, Yongpeng Zhu, Hong Liu, Yongyan Wang, Feng Fan, Baohua School of Computer Science National University of Defense Technology Changsha 410073 China School of Technology Oxford Brookes University Oxford OX33 1HX United Kingdom Information Center Ministry of Science and Technology Beijing 100862 China

ISBN: (纸本)9780769545387

Check pointing is an effective fault tolerant technique to improve the reliability of large scale parallel computing systems. However, check pointing causes a large number of computation nodes to store a huge amount of data into file system simultaneously. It does not only require a huge storage space to store system state, but also brings a tremendous pressure on the communication network and I/O subsystem because a massive demand of accesses are concentrated in a short period of time. Data compression can reduce the size of checkpoint data to be saved in the file system and to go through the communication network. However, compression induces a huge time overhead especially in large scale parallel systems, which is the main technical barrier of its practical usability. In this paper, we propose a parallel compression check pointing technique to reduce the time overhead in socket-level heterogeneous architectures. It integrates a number of parallel processing techniques, including transmitting checkpoint data between CPU, GPU and file system in double buffered pipelines, aggregating file write operations, SIMD parallel compression algorithm running on GPU, etc. the paper also reports an implementation of the technique on the Tianhe-1 supercomputer system and the evaluation experiments with the system. the experiment data show that the technique is efficient and practically usable. © 2011 IEEE.

关键词： Pipelines

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A parallel processing scheme for large-size sliding-window applications

A parallel processing scheme for large-size sliding-window a...

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13th IEEE international Workshop on FTDCS 2011, the 8th international conference on ATC 2011, the 8th international conference on UIC 2011 and the 13th IEEE international conference on HPCC 2011

作者： Xu, Weixia Xu, Jinbo Pang, Zhengbin School of Computer National University of Defense Technology Changsha 410073 China

ISBN: (纸本)9780769545387

there exists large gap between the data input speed and processing speed in large-size sliding-window applications. To shorten this gap, a parallel processing scheme is proposed, which achieves high data reusability and parallelism with memory resources as few as possible and memory access control logics as simple as possible. this scheme combines the advantages of parallelism among different sliding-windows and parallelism among different data in a single window. For different windows, they are divided into groups and mapped into multiple processing elements. And for data in a single window, multi-module memory structure is introduced to buffer them, where module assignment and addressing scheme is designed for conflict-free parallel access. Experimental results on FPGA show that this work can improve the processing speed significantly without incurring too many memory resources and too complicated memory access control logics. © 2011 IEEE.

关键词： Reusability

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Efficient GPGPU-based parallel packet classification

Efficient GPGPU-based parallel packet classification

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Int Joint conference of 10th IEEE Int Conf on Trust, Security and Privacy in Computing and Communications (TrustCom) / 8th IEEE Int Conf on Embedded Software and Systems (ICESS) / 6th Int Conf on Frontier of Computer Science and Technology (FCST)

作者： Hung, Che-Lun Wang, Hsiao-Hsi Guo, Shih-Wei Lin, Yaw-Ling Li, Kuan-Ching Providence Univ Dept Comp Sci & Commun Engn Taichung Taiwan Providence Univ Dept Comp Sci & Informat Management Taichung Taiwan Providence Univ Dept Comp Sci & Informat Engn Taichung Taiwan

ISBN: (纸本)9780769546001

With the rapid growth of network technologies, many new web services have been developed to provide various applications and computing functions. these services rely deeply on the internet. therefore, packet classification is an important issue of network security that typically adopts a flexible packet filtering system to classify each processed packet. Traditional packet classification requires hung computing time to process large amount of internet packets. Hence, we propose a GPGPU-based parallel packet classification method to decrease the computational cost. We also evaluate the performance of the proposed method with implementation on various memory architectures of CUDA device. the experiment results demonstrate that the proposed method can achieve significant speed up over the sequential packet classification algorithms on single CPU.

关键词： Packet classification GPGPU parallel process Packet filtering

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Improving graph coloring on distributed-memory parallel computers

Improving graph coloring on distributed-memory parallel comp...

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18th international conference on High Performance Computing, HiPC 2011

作者： Sariyüce, Ahmet Erdem Saule, Erik Çataryürek, Ümit V. Department of Biomedical Informatics Ohio State University United States Department of Computer Science and Engineering Ohio State University United States Department of Electrical and Computer Engineering Ohio State University United States

ISBN: (纸本)9781457719516

Graph coloring is a combinatorial optimization problem that classically appears in distributed computing to identify the sets of tasks that can be safely performed in parallel. Despite many existing efficient sequential algorithms being known for this NP-Complete problem, distributed variants are challenging. Building on an existing distributed-memory graph coloring framework, we investigate two techniques in this paper. First, we investigate the application of two different vertex-visit orderings, namely Largest First and Smallest Last, in a distributed context and show that they can help to significantly decrease the number of colors, on small-to medium-scale parallel architectures. Second, we investigate the use of a distributed post-processing operation, called recoloring, which further drastically improves the number of colors while not increasing the runtime more than twofold on large graphs. We also investigate the use of multicore architectures for distributed graph coloring algorithms. © 2011 IEEE.

关键词： Computational complexity

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Analysis of electrical networks using fine-grained techniques of parallel processing based on OpenMP

Analysis of electrical networks using fine-grained technique...

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2011 8th international conference on Electrical Engineering, Computing Science and Automatic Control, CCE 2011

作者： Rico-Hernández, O.A. Ramos-Paz, A. Department of Electrical Engineering UMSNH Morelia Michoacán Mexico

ISBN: (纸本)9781457710117

this paper presents a fine-grained parallel processing technique applied to the transient and steady state analysis of electric power systems containing linear, nonlinear and time varying elements. this approach is based on the application of the parallel processing platform named OpenMP. this work presents five test cases that show the advantage of using the proposed technique compared with traditional sequential techniques. © 2011 IEEE.

关键词： Transient analysis

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World-Wide Distributed Multiple Replications in parallel for Quantitative Sequential Simulation 1

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11th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Haque, Mofassir Pawlikowski, Krzysztof McNickle, Don Ewing, Gregory Univ Canterbury Dept Comp Sci Christchurch 8140 New Zealand Univ Canterbury Dept Management Christchurch 8140 New Zealand

ISBN: (数字)9783642246692

ISBN: (纸本)9783642246685

With the recent deployment of global experimental networking facilities, dozens of computer networks with large numbers of computers have become available for scientific studies. Multiple Replications in parallel (MRIP) is a distributed scenario of sequential quantitative stochastic simulation which offers significant speedup of simulation if it is executed on multiple computers of a local area network. We report results of running MRIP simulations on PlanetLab, a global overlay network which can currently access more than a thousand computers in forty different countries round the globe. Our simulations were run using Akaroa2, a universal controller of quantitative discrete event simulation designed for automatic launching of MRIP-based experiments. Our experimental results provide strong evidence that global experimental networks, such as PlanetLab, can efficiently be used for quantitative simulation, without compromising speed and efficiency.

关键词： Multiple Replications in parallel Experimental networking facilities Akaroa2 PlanetLab Sequential quantitative stochastic simulation Open queuing network

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