the Pattern Matching with Swaps problem is a variation of the classical pattern matching problem in which a match is allowed to include disjoint local swaps. In 2009, Cantone and Faro devised a new dynamic programming...
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ISBN:
(纸本)9783642131189
the Pattern Matching with Swaps problem is a variation of the classical pattern matching problem in which a match is allowed to include disjoint local swaps. In 2009, Cantone and Faro devised a new dynamic programming algorithm for this problem that runs in time O(nm), where n is the length of the text and m is the length of the pattern. In this paper, first, we present an improved dynamic programming formulation of the approach of Cantone and Faro. then, we present an optimal parallelization of our algorithm, based on a linear array model, that runs in time O(m(2)) using [n/m-1] processors.
In recent years the evolution of software architectures led to the rising prominence of the Service Oriented Architecture (SOA) concept. this architecture paradigm facilitates building flexible service systems. the se...
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ISBN:
(纸本)9783642143892
In recent years the evolution of software architectures led to the rising prominence of the Service Oriented Architecture (SOA) concept. this architecture paradigm facilitates building flexible service systems. the services can be deployed in distributed environments, executed on different hardware and software platforms, reused and composed into complex services. In the paper a SOA request analysis and distribution architecture for hybrid environments is proposed. the requests are examined in accordance to the SOA request description model. the functional and non-functional request requirements in conjunction with monitoring of execution and communication links performance data are used to distribute requests and allocate the services and resources.
the power efficiency of large-scale computing on multiprocessing systems is an important issue that interrelated to both of the hardware architectures and the software methodologies. Aiming to design power-efficient h...
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ISBN:
(纸本)9783642143892
the power efficiency of large-scale computing on multiprocessing systems is an important issue that interrelated to both of the hardware architectures and the software methodologies. Aiming to design power-efficient high performance program, we have measured the power consumption of large matrices multiplication on multi-core and GPU platform. Based on the obtained power characteristic values of each computing component, we abstract the energy estimations by incorporating physical power constrains from the hardware devices and analysis of the program execution behaviors. We optimize the matrices multiplication algorithm in order to improve its power performance, and the efficiency promotion has been finally validated by measuring the program execution.
Soft-core system allows designers to modify the components which are in the architecture they designed conveniently. In some systems, uni-core processor can not provide enough computing power to support a huge amount ...
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ISBN:
(纸本)9783642131356
Soft-core system allows designers to modify the components which are in the architecture they designed conveniently. In some systems, uni-core processor can not provide enough computing power to support a huge amount of computing for specific applications. In order to improve the performance of a multi-core system, in addition to the hardware architecture design, parallel programming is an important issue. the current parallelizing compilers are hard to parallelize the programs effectively. the programmer must think about how to allot the task to each processor in the beginning. In this paper, we present a software framework for designing parallel program. the proposed framework provides a convenient parallel programming environment for programmers to design the multi-core system's software. From the experiments, the proposed framework can parallelize the program effectively by applying the provided functions.
Automatic one-and three-phase re-closing power lines, after short circuit shutdown, is a very effective way to improve the reliability of power delivery. Re-closing while the fault is not cleared can be dangerous for ...
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ISBN:
(纸本)9781424487790
Automatic one-and three-phase re-closing power lines, after short circuit shutdown, is a very effective way to improve the reliability of power delivery. Re-closing while the fault is not cleared can be dangerous for some electrical appliances. To prevent re-closing of a short circuit a method allowing stable arc detection has developed. the method is based on the estimation of real-time parameters in voltage signals and an analysis of error estimation. A neural network has been proposed to solve the problem in real time.
Micro-Electro-Mechanical System (MEMS) is the integration of mechanical elements, sensors, actuators, and electronics on a common silicon substrate through micro fabrication technology. With MEMS technologies, micron-...
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ISBN:
(纸本)9783642131356
Micro-Electro-Mechanical System (MEMS) is the integration of mechanical elements, sensors, actuators, and electronics on a common silicon substrate through micro fabrication technology. With MEMS technologies, micron-scale sensors and other smart products can be manufactured. Because of its micron-scale. MEMS products' structure is nearly invisible, even the designer is hard to know whether the device is well-designed and well-produced. So a visual 3D MEMS simulation implement, named ZProcess[1], was proposed in our previous work to help designers realizing and improving their designs. ZProcess shows the MEMS device's 3D model using voxel method. Its accurate, but its speed is unacceptable when the scale of voxel-data is large. In this paper, an improved parallel MEMS simulation implementation is presented to accelerate ZProcess by using GPU (Graphic processing Unit). the experimental results show the parallel implement gets maximum 160 times speed up comparing withthe sequential program.
the article is concerned with a parallel iterative domain decomposition algorithm for high-order finite element solutions of the Helmholtz wave equation. the iteration is performed in a block-Jacobi manner. For the in...
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ISBN:
(纸本)9783642131356
the article is concerned with a parallel iterative domain decomposition algorithm for high-order finite element solutions of the Helmholtz wave equation. the iteration is performed in a block-Jacobi manner. For the interface operator, a Robin interface boundary condition is employed in a modified form which allows possible discontinuities of the discrete normal flux on the subdomain interfaces. the convergence of the algorithm is analyzed using energy estimates. Numerical results are given to show the effectiveness and parallel efficiency of the algorithm for the simulation of high-frequency waves in heterogeneous media in the two-dimensional space. the algorithm is carried out on a 16-node Linux cluster;it has been observed more than 97% parallel efficiency for all tested problems.
Time series motifs are an integral part of diverse data mining applications including classification, summarization and near-duplicate detection. these are used across wide variety of domains such as image processing,...
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ISBN:
(纸本)9783642152900
Time series motifs are an integral part of diverse data mining applications including classification, summarization and near-duplicate detection. these are used across wide variety of domains such as image processing, bioinformatics, medicine, extreme weather prediction, the analysis of web log and customer shopping sequences, the study of XML query access patterns, electroencephalograph interpretation and entomological telemetry data mining. Exact Motif discovery in soft real-time over 100K time series is a challenging problem. We present novel parallelalgorithms for soft real-time exact motif discovery on multi-core architectures. Experimental results on large scale P6 SMP system, using real life and synthetic time series data, demonstrate the scalability of our algorithms and their ability to discover motifs in soft real-time. To the best of our knowledge, this is the first such work on parallel scalable soft real-time exact motif discovery.
Co-clustering has been extensively used in varied applications because of its potential to discover latent local patterns that are otherwise unapparent by usual unsupervised algorithms such as k-means. Recently, a uni...
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ISBN:
(纸本)9783642131189
Co-clustering has been extensively used in varied applications because of its potential to discover latent local patterns that are otherwise unapparent by usual unsupervised algorithms such as k-means. Recently, a unified view of co-clustering algorithms, called Bregman co-clustering (BCC), provides a general framework that even contains several existing co-clustering algorithms, thus we expect to have more applications of this framework to varied data types. However, the amount of data collected from real-life application domains easily grows too big to fit in the main memory of a single processor machine. Accordingly, enhancing the scalability of BCC can be a critical challenge in practice. To address this and eventually enhance its potential for rapid deployment to wider applications with larger data, we parallelize all the twelve co-clustering algorithms in the BCC framework using message passing interface (MPI). In addition, we validate their scalability on eleven synthetic datasets as well as one real-life dataset, where we demonstrate their speedup performance in terms of varied parameter settings.
Network packet processing applications increasingly execute at speeds of 1-40 Gigabits per second, often running on multi-core chips that contain multithreaded network processing units (NPUs) and a general-purpose pro...
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ISBN:
(纸本)9783642131356
Network packet processing applications increasingly execute at speeds of 1-40 Gigabits per second, often running on multi-core chips that contain multithreaded network processing units (NPUs) and a general-purpose processor core. Such applications are typically programmed in a language that exposes NPU specifics needed to optimize low-level thread control and resource management. this facilitates optimization at the cost of increased software complexity and reduced portability. In contrast, our approach provides portability by combining coarse-grained, SPMD parallelism with programming in the packetC language's high-level constructs. this paper focuses on searching packet contents for packet protocol headers. We require the host system to locate protocol headers for layers 2, 3 and 4, and to encode their offsets data in a packet information block (PIB). packetC provides descriptors, C-style structures superimposed on the packet array at runtiine-calculable, user or PIB-supplied offsets. We deliver state-of-the-practice performance via an FPGA for locating layer offsets and via micro-coded interpretation that treats PIB layer offsets as a special addressing mode.
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