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A GPU-enabled solver for time-constrained linear sum assignment problems

A GPU-enabled solver for time-constrained linear sum assignm...

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the international conference on Informatics and Systems (INFOS)

作者： Roberto Roverso Amgad Naiem Mohammed El-Beltagy Sameh El-Ansary Seif Haridi KTH Royal Institute of Technology Sweden Cairo University Egypt Nile University Egypt

ISBN: (纸本)9781424458288;9789774033964

this paper deals with solving large instances of the Linear Sum Assignment Problems (LSAPs) under realtime constraints, using Graphical processing Units (GPUs). the motivating scenario is an industrial application for P2P live streaming that is moderated by a central tracker that is periodically solving LSAP instances to optimize the connectivity of thousands of peers. However, our findings are generic enough to be applied in other contexts. Our main contribution is a parallel version of a heuristic algorithm called Deep Greedy Switching (DGS) on GPUs using the CUDA programming language. DGS sacrifices absolute optimality in favor of a substantial speedup in comparison to classical LSAP solvers like the Hungarian and auctioning methods. We show the modifications needed to parallelize the DGS algorithm and the performance gains of our approach compared to a sequential CPU-based implementation of DGS and a mixed CPU/GPU-based implementation of it.

关键词： Computer languages Peer to peer computing parallel architectures Best practices Application software Paper technology Heuristic algorithms Performance gain Central processing Unit Large-scale systems

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Fine-Grained parallel Compacting Garbage Collection through Hardware-Supported Synchronization

Fine-Grained Parallel Compacting Garbage Collection through ...

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international conference on parallel processing Workshops (ICPPW)

作者： Oswin Horvath Matthias Meyer Institute of Communication Networks and Computer Engineering Universität Stuttgart Stuttgart Germany

parallel garbage collection seeks to exploit the inherent parallelism of graph tracing by evenly distributing the set of objects in the heap among all available processing resources. Any straightforward implementation, however, suffers from prohibitive overheads since each access to the worklist of objects and to the objects themselves needs to be protected by synchronization, especially so in the case of compacting collectors. For this reason, known parallel collectors sacrifice a great deal of work distribution granularity and scalability to keep the synchronization costs acceptable. In this paper, we present a case study of a different approach. Our parallel compacting collector is based on Cheney's copying algorithm, employs a single worklist and distributes garbage collection work on an object-by-object basis. this way, it achieves well balanced work distribution and good scalability. To solve the synchronization problem, we introduce a low-cost multi-core garbage collection coprocessor and take advantage of hardware-supported synchronization. We built an FPGA-based prototype with a single-core main processor supported by a multi-core garbage collection coprocessor. Measurement results show that an 8-core garbage collection coprocessor decreases the duration of garbage collection cycles by a factor of up to 7.4, while a 16-core configuration still achieves a factor of up to 12.1.

关键词： Synchronization Registers Heuristic algorithms Coprocessors Partitioning algorithms Data structures Memory management

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HIP: Health integration platform

HIP: Health integration platform

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IEEE Annual conference on Pervasive Computing and Communications Workshops (PerCom)

作者： Jonathan Woodbridge Hyduke Noshadi Ani Nahapetian Majid Sarrafzadeh Computer Science Department UCLA Los Angeles CA USA

this paper introduces a new software development platform specifically designed for wireless health applications. Wireless health applications follow a unique paradigm encompassing body sensor networks. these networks are controlled by a central processing unit (such as a cell phone or PDA) that provides connectivity to health care professionals over a wide area network. With such architectures, health monitoring becomes ubiquitous allowing patients a greater degree of freedom from conventional medical monitoring. this paper introduces HIP - a wireless health integration platform. HIP is a complete end to end software development platform. Wireless Health platforms previous to HIP have two main faults. First, these platforms lack generality and focus on few wireless health components. Second, they offer an extremely rigid platform that is difficult to integrate into preexisting research. HIP addresses these issues by providing a flexible and modularized plug and play architecture that seamlessly integrates into preexisting work.

关键词： Hip Programming Wireless sensor networks Application software Patient monitoring Biomedical monitoring Body sensor networks Centralized control Central processing Unit Cellular phones

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GPU optimization of the SGM stereo algorithm

GPU optimization of the SGM stereo algorithm

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IEEE international conference on Intelligent Computer Communication and processing (ICCP)

作者： Istvan Haller Sergiu Nedevschi Department of Computer Science Technical University of Cluj Napoca Cluj-Napoca Romania

GPU hardware architectures have evolved into a suitable platform for the hardware acceleration of complex computing tasks. Stereo vision is one such task where acceleration is desirable for robotic and automotive systems. Much research was invested in developing stereo vision algorithms with increased quality, but real-time implementations are still lacking. In this work we focus on creating a real-time dense stereo reconstruction system. We selected the Semi-global Matching method as the basis of our system due to its high quality and reduced computational complexity. the Census transform is selected as the matching metric because our results show that it can reduce the matching errors for traffic images compared to classical solutions. We also present two modifications to the original Semi-Global algorithm to improve the sub-pixel accuracy and the execution time. the system was implemented and evaluated on a current generation GPU with a running time of 19ms for image having the resolution 512×383.

关键词： Measurement Real time systems Optimization Transforms Pixel parallel processing Pipelines

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Using the CPU and GPU for real-time video enhancement on a mobile computer

Using the CPU and GPU for real-time video enhancement on a m...

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international conference on Signal processing Proceedings (ICSP)

作者： Asheer Bachoo Optronic Sensor Systems Defence Peace Safety and Security Council of Scientific and Industrial Research Pretoria South Africa

Real-time video enhancement is generally achieved using costly specialized hardware that have specific functions and outputs. Commercial off-the-shelf hardware, such as desktop computers with Graphics processing Units (GPUs), are also commonly used as cost effective solutions for real-time video processing. In the past, the limitations in computer hardware meant that real-time video enhancement was mainly done on desktop GPUs with minimal use of the Central processing Unit (CPU). these algorithms were simple and easily parallelizable in nature, which enabled them to achieve real-time performance. However, complex enhancement algorithms also require the sequential processing of data and this cannot be easily achieved in real-time on a GPU. In this paper, the current advances in mobile CPU and GPU hardware are used to implement video enhancement algorithms in a new way on a mobile computer. Both the CPU and GPU are used effectively to achieve realtime performance for complex image enhancement algorithms that require both sequential and parallel processing operations. Results are presented for histogram equalization, local adaptive histogram equalization, contrast enhancement using tone mapping and exposure fusion of multiple 8-bit grey scale videos of size up to 1600×1200 pixels.

关键词： Pixel Graphics processing unit Histograms Real time systems Central processing Unit Streaming media Hardware

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An efficient multicore implementation of planted motif problem

An efficient multicore implementation of planted motif probl...

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international conference on High Performance Computing & Simulation (HPCS)

作者： Naga Shailaja Dasari Ranjan Desh M. Zubair Department of Computer Science Old Dominion University Norfolk Virginia Old Dominion University Norfolk VA US

In this paper we propose a parallel algorithm for the planted motif problem that arises in computational biology. A variety of algorithms have been proposed in the literature to solve this problem. the drawback of all these algorithms is that they have been designed to work on serial computers; and are not suitable for parallelization on current multicore architectures. We have implemented the proposed algorithm on a 4 Quad-Core Intel Xeon X5550 2.67GHz processor for a total of 16 cores. We compare our performance results with the best performance results reported in the literature; and showed that the performance of our algorithm scales linearly with the number of cores. We also solved the (21, 8) challenging instance on 16 cores in 6.9 hrs.

关键词： Arrays Magnetic cores Indexes Memory management Multicore processing Iterative methods Algorithm design and analysis

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Efficient tracking of moving objects using Generic Remote Trajectory Simplification

Efficient tracking of moving objects using Generic Remote Tr...

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IEEE Annual conference on Pervasive Computing and Communications Workshops (PerCom)

作者： Ralph Lange Frank Dürr Kurt Rothermel Institute of Parallel and Distributed Systems Universität Stuttgart Germany

Position information of moving objects plays a vital role in many pervasive applications. therefore, moving objects databases (MODs), which can manage trajectory data of a number objects, are used in many pervasive systems. A crucial problem with MODs is how to efficiently track a remote object's trajectory in real-time, i.e. how to continuously report the sensed trajectory data to the MOD with minimal effort. For this purpose, we present a prototypical implementation of the Generic Remote Trajectory Simplification (GRTS) protocol, which optimizes storage consumption, processing, and communication costs. Our prototypical system includes a fully functional MOD as well as map-based mobile applications for subnotebooks and smartphones to illustrate the functioning of GRTS.

关键词： Trajectory Databases Prototypes Protocols Global Positioning System Piecewise linear techniques Mobile communication Cost function Smart phones Vehicles

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A Comparative Study on the Performance of the parallel and Distributing Computing Operation in MatLab

A Comparative Study on the Performance of the Parallel and D...

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international conference on Advanced Information Networking and Applications (AINA)

作者： Mohammed Goryawala Magno R. Guillen Ruchir Bhatt Anthony Mcgoron Malek Adjouadi Biomedical Engineering Department Florida International University Miami USA Electrical & Computer Engineering Department Florida International University Miami USA

this study describes the performance results on testing MatLab applications using the parallel computing and the distributed computing toolboxes under different platforms with different hardware and operating systems. Each trial was executed keeping the hardware fixed and changing the operating system to obtain unbiased results. To standardize the benchmarking test, Fast Fourier Transform (FFT), discrete cosine transform (DCT), edge detection and matrix multiplication algorithms were executed. the results show that the leveraging of multicore platforms can speed up considerably the processing of images through the use of parallel computing tools in MatLab. Two different system hardware platforms (systems 1 and 2) were used in a series of experiments. Four rounds of experiments were performed benchmarking the FFT algorithm using the parallel tool box, by changing system platform, number of workers, image size and number of images. the results of the ANOVA test suggest that although there is no statistical significance on the factor represented by the operating system (OS) on system 1, the OS plays a significant roll on system 2. Moreover, on both systems there is statistical significance on the factors represented by the number of workers utilized and the number of images processed, yielding more than a 500% performance increase by using 8 MatLab workers on a dual quad-core machine.

关键词： Concurrent computing Distributed computing Hardware Operating systems System testing parallel processing Benchmark testing Discrete cosine transforms Fast Fourier transforms Image edge detection

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Accelerating Linpack Performance with Mixed Precision Algorithm on CPU+GPGPU Heterogeneous Cluster

Accelerating Linpack Performance with Mixed Precision Algori...

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international conference on Computer and Information Technology (CIT)

作者： Wang Lei Zhang Yunquan Zhang Xianyi Liu Fangfang Graduate University of Chinese Academy of Sciences Beijing Lab of Parallel Computing Institute of Software Beijing China State Key Lab of Computing Science Chinese Academy of Sciences Beijing China Lab of Parallel Computing Institute of Software Beijing State Key Lab of Computing Science Chinese Academy of Sciences Beijing

In this paper, the mixed precision algorithm to solve the linear system of equations and the implementation of HPL package are introduced. We use this mixed precision algorithm to improve HPL package on CPU + GPGPU heterogeneous clusters, which is named for GHPL, and give the implementation mechanisms in detail. the experimental results are measured on the platforms of multi-core CPUs and CPU + GPGPU heterogeneous clusters. From the experimental results, we can find out that our GHPL program has good scalability on all the experimental environments and can sustain more than 1.7Teraflops both on the cluster with 16 nodes containing 32 NVIDIA Tesla C1060 GPUs and on the cluster with 8 nodes containing 32 ATI GeForce GTX 295 GPUs, while the average speedup of it with respect to HPL is 3.06 and 2.40 respectively.

关键词： Graphics processing unit Clustering algorithms Convergence Niobium Linear systems Accuracy Benchmark testing

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Design and Implementation of Configurable Extract Instructions targeted at Stream Cipher processing

Design and Implementation of Configurable Extract Instructio...

引用

IEEE 8th international conference on ASIC

作者： Nan, Longmei Dai, Zibin Li, Wei Zhang, Xueying Chang, Zhongxiang Zhengzhou Inst Informat Technol Zhengzhou 450004 Peoples R China

ISBN: (纸本)9781424438686

High-performance and flexible configurable extract instructions targeted at stream cipher processing are proposed by analyzing the structures and operating characteristics of more than forty public stream cipher algorithms in this paper. the extract instructions are designed to sustain four different data widths, and ten parallel extract modes are exploited by instruction level parallelism based on VLIW system structure. Further more, the corresponding reconfigurable hardware circuit is implemented. By configurating the hardware circuit, the extract of different data width and different parallel mode can be gained efficiently, so the circuit can be used as an important accelerated unit in special processing for stream cipher(1).

关键词： Stream Cipher Extract Instruction parallel processing VILW Configurable

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