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检索条件"任意字段=8th International Conference on Algorithms and Architectures for Parallel Processing"
2884 条 记 录,以下是2441-2450 订阅
VLSI-based parallel architecture for block-matching motion estimation in low bit-rate video coding
VLSI-based parallel architecture for block-matching motion e...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: Donglai Xu J. Bentley School of Science and Technology University of Teesside Middlesbrough UK
In this paper, we proposed a flexible VLSI-based parallel processing architecture for an improved three-step search (ITSS) motion estimation algorithm that is superior to the existing three-step search (TSS) algorithm... 详细信息
来源: 评论
First international Portuguese materials symposium
First international Portuguese materials symposium
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作者: Froes, F.H.
this first conference in what is planned as a series of conferences at two-year internals was held in the historic city of Coimbra, Portugal on the 8th to 11th April. Although Portugal is a relatively small country (1... 详细信息
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On parallel programming language caper  9th
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9th international conference on High-Performance Computing and Networking, HPCN Europe 2001
作者: Vartanov, Sergey R. The Center of Mathematical Modeling and Computation Technologies Slavonic University H. Emin 123 Yerevan Armenia
Caper is a parallel programming language, which supports declarative parallel computations and control of all architectures by Flynn [1]. Caper has a self-organization and asynchronous events processing programming me... 详细信息
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Improving conditional branch prediction on speculative multithreading architectures  7
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7th European conference on parallel Computing, Euro-Par 2001
作者: Iwama, Chitaka Barli, Niko Demus Sakai, Shuichi Tanaka, Hidehiko Graduate School of Information Science and Technology The University of Tokyo 7-3-1 Hongo Bunkyo-ku Tokyo113-8654 Japan
Dynamic conditional branch prediction is an indispensable technique for increasing performance in modern processors. However, currently proposed schemes suffer from loss of accuracy when applied to speculative multith... 详细信息
来源: 评论
Fault tolerant unicast routing algorithm based on parallel branching method for faulty hypercube
Fault tolerant unicast routing algorithm based on parallel b...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: S. Gunes N. Yilmaz E. Yaldiz Department of Electrical & Electronics Engineering Selcuk University Konya Turkey
In this study, a unicast routing algorithm based on the parallel branching method has been developed for a faulty hypercube parallel processing system. the developed method has been compared with the cube algebra meth... 详细信息
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Architectural synthesis of digital signal processing applications dedicated to submicron technologies
Architectural synthesis of digital signal processing applica...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: E. Casseau C. Jego E. Martin LESTER Laboratory Université de Bretagne Sud Lorient France
Architectural synthesis is an efficient design process that reduces the gap between algorithms and architectures by raising the abstraction level. However, this process currently does not take the VLSI circuit interco... 详细信息
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Power exploration of parallel embedded architectures implementing data-reuse transformations
Power exploration of parallel embedded architectures impleme...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: N. Kavvadias A. Zanikopoulos C. Voliotidis S. Kougia A. Chatzigeorgiou N. Zervas S. Nikolaidis Electronics and Computers Division Department of Physics Aristotle University of Thessaloniki Thessaloniki Greece VLSI Design Laboratory Department of Electrical Engineering University of Patras Patras Greece
Efficient use of data-reuse transformations combined with a custom memory hierarchy that exploits the temporal locality of data related memory accesses can have a significant impact on system power consumption, especi... 详细信息
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Experiments in parallel clustering with DBSCAN  7
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7th European conference on parallel Computing, Euro-Par 2001
作者: Arlia, Domenica Coppola, Massimo Università degli Studi di Pisa Dipartimento di Informatica Corso Italia 40 Pisa56125 Italy
We present a new result concerning the parallelisation of DBSCAN, a Data Mining algorithm for density-based spatial clustering. the overall structure of DBSCAN has been mapped to a skeletonstructured program that perf... 详细信息
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A parallel computation of power system equations  7
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7th European conference on parallel Computing, Euro-Par 2001
作者: Fung, Y.F. Ercan, M.F. Ho, T.K. Cheung, W.L. Dept. of Electrical Eng The Hong Kong Polytechnic University Hong Kong School of Electrical and Electronic Eng Singapore Polytechnic Singapore
Streaming SIMD Extensions (SSE) is a unique feature embedded in the Pentium III and P4 classes of microprocessors. By fully exploiting SSE, parallel algorithms can be implemented on a standard personal computer and a ... 详细信息
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parallel tree projection algorithm for sequence mining  7
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7th European conference on parallel Computing, Euro-Par 2001
作者: Guralnik, Valerie Garg, Nivea Karypis, George University of Minnesota Department of Computer Science and Engineeering/Army HPC Research Center MinneapolisMN United States
Discovery of sequential patterns is becoming increasingly useful and essential in many scientific and commercial domains. Enormous sizes of available datasets and possibly large number of mined patterns demand efficie... 详细信息
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