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检索条件"任意字段=8th International Conference on Algorithms and Architectures for Parallel Processing"
2872 条 记 录,以下是2591-2600 订阅
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Dynamic SMP Clusters with Communication on the Fly in SoC Technology Applied for Medium-Grain parallel Matrix Multiplication
Dynamic SMP Clusters with Communication on the Fly in SoC Te...
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Euromicro conference on parallel, Distributed and Network-Based processing
作者: M. Tudruj L. Masko Polish Japanese Institute of Information Technology Warsaw Poland Institute of Computer Science Polish Academy of Sciences Warsaw Poland
the paper presents a study of medium and coarse grain numerical computations in a new cluster-based shared memory parallel architecture oriented into implementation in "Systems on Chip" (SoC) technology. the... 详细信息
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P2G: A Framework for Distributed Real-Time processing of Multimedia Data
P2G: A Framework for Distributed Real-Time Processing of Mul...
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international conference on parallel processing Workshops (ICPPW)
作者: Havard Espeland Paul B. Beskow Hakon K. Stensland Preben N. Olsen Stale Kristoffersen Carsten Griwodz Pal Halvorsen Department of Informatics Norway Simula Research Laboratory University of Oslo Norway
the computational demands of multimedia data processing are steadily increasing as consumers call for progressively more complex and intelligent multimedia services. New multi-core hardware architectures provide the r... 详细信息
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Multi-Speaker Localization by Central and Lateral Microphone Arrays Based on the Combination of 2D-SRP and Subband GEVD algorithms
Multi-Speaker Localization by Central and Lateral Microphone...
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international conference on Signal processing and Communication (ICSC)
作者: Ali Dehghan Firoozabadi Pablo Irarrázaval Pablo Adasme David Zabala-Blanco Pablo Palacios-Játiva Hugo Durney Miguel Sanhueza Olave Cesar Azurdia Department of Electricity Universidad Tecnológica Metropolitana Av. José Pedro Alessandri 1242 Santiago Chile Electrical Engineering Department Pontificia Universidad Católica de Chile Santiago Chile Biomedical Imaging Center Pontificia Universidad Católica de Chile Santiago Chile Institute for Biological and Medical Engineering Pontificia Universidad Católica de Chile Santiago Chile Electrical Engineering Department Universidad de Santiago de Chile Av. Victor Jara 3519 Santiago Chile Department of Computer Science and Industry Universidad Católica del Maule Talca Chile Department of Electrical Engineering Universidad de Chile Santiago Chile Escuela de Informática y Telecomunicaciones Universidad Diego Portales Santiago Chile
In this paper, a novel speech source localization (SSL) algorithm by the use of the central and lateral microphone arrays is proposed with low complexity and high precision in undesirable acoustical environments. Firs... 详细信息
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Distributed evolutionary design of constant-coefficient multipliers
Distributed evolutionary design of constant-coefficient mult...
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IEEE international conference on Electronics, Circuits and Systems (ICECS)
作者: D. Chen T. Aoki N. Homma T. Higuchi Higuchi Laboratory Graduate School of Information Sciences University of Tohoku Sendai Japan
A parallel version of the evolutionary graph generation (EGG) system, called the distributed EGG (DEGG) system, was developed on a cluster of PCs using a message-passing interface (MPI). To demonstrate the capability ... 详细信息
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Ultra-fast Poisson's equation solvers using wired-up processors for virtual devices architectures
Ultra-fast Poisson's equation solvers using wired-up process...
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international conference on Semiconductor
作者: S. Bara J. Zimmermann Lab. de Phys. des Composants a Semicond. CNRS Grenoble France
this paper presents two methods for solving a partial differential equation of the second order, with application to the well-known Poisson equation. these methods are aimed at making a high-speed hardware solver. the... 详细信息
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An architectural development and performance of a real time LAN
An architectural development and performance of a real time ...
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international conference on Distributed Computing Systems
作者: V. Cherkassky H. Lari-Najafi N.L. Lawrie D. Masson D.W. Pritty Department of Electrical Engineering University of Minnesota Minneapolis MN USA University of Strathclyde Glasgow UK
the real-time facilities of existing local area networks (LANs) which primarily address the needs of non-real-time data traffic are reviewed. An architecture called Instanet is introduced to support the needs of distr... 详细信息
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Brain-inspired Co-design of Algorithm/Architecture for CNN Accelerators
Brain-inspired Co-design of Algorithm/Architecture for CNN A...
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IIAI international conference on Advanced Applied Informatics (IIAIAAI)
作者: Stanislav Sedukhin Kazuya Matsumoto Yoichi Tomioka The University of Aizu Aizu-Wakamatsu Fukushima Japan
the human brain-inspired design and analysis of Soft Tensor Processor (STP) for massively-parallel implementation of multi-layer Convolutional Neural Networks (CNN) which are currently the core of Deep Learning are pr... 详细信息
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Exploring ilp and tlp on a polymorphic vliw processor  30th
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30th international conference on Architecture of Computing Systems, ARCS 2017
作者: Brandon, Anthony Hoozemans, Joost van Straten, Jeroen Wong, Stephan Computer Engineering Lab Delft University of Technology Delft Netherlands
In today’s computing environments, the concurrent execution of multiple applications/threads is common and multi-cores are very well-suited to handle such workloads. However, they suffer from the fact that any mismat... 详细信息
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A parallel luma-chroma filtering architecture for H.264/AVC deblocking filter
A parallel luma-chroma filtering architecture for H.264/AVC ...
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IEEE international conference on Consumer Electronics - Berlin (ICCE-Berlin)
作者: Nikolaos Kefalas George theodoridis ECE Department University of Patras Patras Greece
A novel architecture for the H.264/AVC deblocking filter is proposed. It includes three filtering units to filter in parallel the luma and chroma components. Also, a proper two dimensional filtering order for the luma... 详细信息
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A Massively parallel Coprocessor for Convolutional Neural Networks
A Massively Parallel Coprocessor for Convolutional Neural Ne...
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IEEE international conference on Application-specific Systems, architectures and Processors
作者: Murugan Sankaradas Venkata Jakkula Srihari Cadambi Srimat Chakradhar Igor Durdanovic Eric Cosatto Hans Peter Graf NEC Laboratories America Inc.
We present a massively parallel coprocessor for accelerating Convolutional Neural Networks (CNNs), a class of important machine learning algorithms. the coprocessor functional units, consisting of parallel 2D convolut... 详细信息
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