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IEEE international conference on Computational Science and Engineering, CSE

作者： M. Chimeh Cordelia V. Hall John T. O'Donnell Sch. of Comput. Sci. Univ. of Glasgow Glasgow UK School of Computing Science University of Glasgow Glasgow UK University of Glasgow Glasgow Glasgow GB

Digital circuit simulation often requires a large amount of computation, resulting in long run times. We consider several techniques for optimising a brute force synchronous circuit simulator: an algorithm using an event queue that avoids recalculating quiescent parts of the circuit, a marking algorithm that is similar to the event queue but that avoids a central data structure, and a lazy algorithm that avoids calculating signals whose values are not needed. Two target architectures for the simulator are used: a sequential CPU, and a parallel GPGPU. the interactions between the different optimisations are discussed, and the performance is measured while the algorithms are simulating a simple but realistic scalable circuit.

关键词： Registers Arrays Integrated circuit modeling Clocks Graphics processing units Force Optimization

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Mining bilingual linguistic patterns with aligned and parsed bilingual corpus

Mining bilingual linguistic patterns with aligned and parsed...

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international conference on Information Science and Digital Content Technology

作者： Bo Wang Fanqi Meng Yuexian Hou School of Computer Science and Technology Tianjin University 300072 China

ISBN: (纸本)9781467312882

Classical grammar for natural languages, which is defined by the linguistics, is widely used in many natural languages processing (NLP) tasks, such as information extraction, machine translation and parsing. the classical grammar is well defined but is context free and does not include the complex patterns which contain multiple linguistic units. On the other hand, there are also many simple patterns which are not included in the classical grammar but are useful in the NLP tasks. therefore, the recognition of special linguistic patterns from natural language is an important step in various NLP systems. We propose an unsupervised method to automatically discover the complex monolingual linguistic patterns from a classically parsed and aligned bilingual corpus. And all the patterns in one language are qualified by the other parallel language. A specialized and efficient algorithm is applied to mine the frequent bilingual subtrees in the forest and the found subtrees are formalized as the linguistic patterns.

关键词： Linguistics Natural Language processing natural languages context-free Alignment syntax Pragmatics efficient algorithm

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Intelligent condition monitoring and fault diagnosis of a gearbox based on Artificial Neural Network

Intelligent condition monitoring and fault diagnosis of a ge...

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international conference on Electronic Measurement and Instruments, ICEMI

作者： Shulian Yang Wenhai Li Zhen Hua Xiang Fang Computer department ShanDong Institute of Business and Technology Shandong province YanTai 264005 China Electronic Engineering department Naval Aeronautical Engineering Institute Shandong province YanTai 264001 China Computer department ShanDong Institute of Business and Technology YanTai Shandong province China Electronic Engineering department Naval Aeronautical Engineering Institute YanTai Shandong province China

In this paper the vibration test system for the gearbox of mining machine , the wavelet denoising method , the artificial neural network' s essential principles and its features, BP network structures model in the gearbox fault diagnosis are *** vibration signals are disposed by the method of wavelet denoising and than as the inputs of BP neural network. By using classical BP neural network, four kinds of typical patterns of gearbox faults have been studied and diagnosed and satisfied results have been acquired. the research results indicate that BP neural network with the excellent abilities of parallel distributed processing, self-study, self-adaptation, self-organization,associative memory and its highly non-linear pattern recognition is an efficient and feasible tool to solve complicated state identification problems in the gearbox fault diagnosis simultaneously.

关键词： Artificial intelligence Intelligent networks Condition monitoring Fault diagnosis Artificial neural networks Noise reduction Machine intelligence System testing Neural networks Distributed processing

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A High-Performance Hardware Architecture for Spectral Hash Algorithm

A High-Performance Hardware Architecture for Spectral Hash A...

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international conference on Application Specific Systems (ASAP), architectures and Processors

作者： Ray C.C. Cheung Çetin K. Koc John D. Villasenor City University of Hong Kong Hong Kong China Electrical Engineering Department UCLA Los Angeles CA USA Computer Science Department University of California슠Santa Barbara Santa Barbara CA USA

the spectral hash algorithm is one of the round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete Fourier transformations over a finite field, data dependent permutations, rubic-type rotations, and affine and nonlinear functions. the underlying mathematical structures and operations pose interesting and challenging tasks for computer architects and hardware designers to create fast, efficient, and compact ASIC and FPGA realizations. In this paper, we present an efficient hardware architecture for the full 512-bit hash computation using the spectral hash algorithm. We have created a pipelined implementation on a Xilinx Virtex-4 XC4VLX200-11 FPGA which yields 100 MHz and occupies 38,328 slices, generating a throughput of 51.2 Gbps. Our fully parallel synthesized implementation shows that the spectral hash algorithm is about 100 times faster than the fastest SHA-1 implementation, while requiring only about 13 times as many logic slices.

关键词： Hardware Galois fields Signal processing algorithms Elliptic curve cryptography Discrete Fourier transforms Arithmetic Computer architecture Field programmable gate arrays Power engineering computing NIST

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A low complexity measurement method for beam-forming network based on DS-CDMA

A low complexity measurement method for beam-forming network...

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international conference on Communication Software and Networks, ICCSN

作者： Shiguang Hao Nan Lu Yunpeng Gao Communication Satellite Department China Academy of Space Technology Beijing China BIT Beijing Institute of Technology Beijing China

High performance spatial signal processing relies on accurate beam-forming. In a practical antenna system, due to inevitable aging and heat distortion of the components, there exists an inconsistency between the designed Beam-forming Network (BFN) Weighted Matrix (WM) and the actual value of it. However, the complexity of BFN WM measurement is in direct ratio to the channel numbers of BFN. For large-scale phased array antennas, the measurement of the BFN WM requires burdensome work. To solve the problem, this paper proposes a novel efficient WM measurement method for BFN based on Direct Sequence-Code Division Multiple Access (DS-CDMA), which significantly reduces the complexity of the test by multi-port testing and parallel signal processing. Moreover, benefiting from the correlation characteristics of Direct Sequence Spread Spectrum (DSSS) signals, the measurement precision of the proposed method achieves 0.038 in amplitude and 0.511 in phase. this paper also discusses selections of DSSS codes. By borrowing the concept of Multi-User Detection (MUD), we proposed a special de-correlation algorithm to solve the problem of using non-orthogonal codes. Hardware implementation and practical tests have strongly demonstrated the feasibility and accuracy of the proposed method.

关键词： Signal processing Antenna arrays Multiaccess communication Testing Receivers Antenna measurements Spread spectrum communication

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Distributed modeling and implementation of high performance communication architectures

Distributed modeling and implementation of high performance ...

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international conference on Distributed Computing Systems

作者： K. Shafer M. Ahuja Office of Research Online Computer Library Center Inc. Dublin OH USA Department of Comp. Science and Engineering University of California San Diego CA USA

High performance distributed computing systems require high performance communication systems. Distributed modeling and implementation of these communication systems is important. Toward this goal, the authors refine the process-to-channel/sub agent/-to-process (PCP) model of asynchronous distributed communication. While the PCP model provides a versatile and succinct mechanism for specifying and comparing different types of channels, it is inherently centralized. the refined model presented here, the process-to-channel/sub agent/-to-channel/sub agent/-to-process (PCCP) communication model, is amenable to distributed modeling and implementation of channels. the usefulness of the PCCP model is demonstrated by presenting a distributed implementation of hierarchical F-channels.< >

关键词： Distributed control Computer architecture Distributed computing High performance computing Road transportation Libraries parallel processing Message passing Algorithm design and analysis Distributed algorithms

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parallelization of Variable Rate Decompression through Metadata

Parallelization of Variable Rate Decompression through Metad...

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Euromicro conference on parallel, Distributed and Network-Based processing

作者： Lennart Noordsij Steven van der Vlugt Mohamed A. Bamakhrama Zaid Al-Ars Peter Lindstrom ASML Netherlands Synopsys Corporation Netherlands TU Delft Netherlands Lawrence Livermore National Laboratory United States of America

ISBN: (数字)9781728165820

ISBN: (纸本)9781728165837

Data movement has long been identified as the biggest challenge facing modern computer systems' designers. To tackle this challenge, many novel data compression algorithms have been developed. Often variable rate compression algorithms are favored over fixed rate. However, variable rate decompression is difficult to parallelize. Most existing algorithms adopt a single parallelization strategy suited for a particular HW platform. Such an approach fails to harness the parallelism found in diverse modern HW architectures. We propose a parallelization method for tiled variable rate compression algorithms that consists of multiple strategies that can be applied interchangeably. this allows an algorithm to apply the strategy most suitable for a specific HW platform. Our strategies are based on generating metadata during encoding, which is used to parallelize the decoding process. To demonstrate the effectiveness of our strategies, we implement them in a state-of-the-art compression algorithm called ZFP. We show that the strategies suited for multicore CPUs are different from the ones suited for GPUs. On a CPU, we achieve a near optimal decoding speedup and an overhead size which is consistently less than 0.04% of the compressed data size. On a GPU, we achieve average decoding rates of up to 100 GiB/s. Our strategies allow the user to make a trade-off between decoding throughput and metadata size overhead.

关键词： Decoding Metadata Compression algorithms Encoding Data transfer Acceleration Multicore processing

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An Improvement of OpenMP Pipeline parallelism with the BatchQueue Algorithm

An Improvement of OpenMP Pipeline Parallelism with the Batch...

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international conference on parallel and Distributed Systems (ICPADS)

作者： thomas Preud'Homme Julien Sopena Gaël thomas Bertil Folliot LIP6 Paris France

In the context of multicore programming, pipeline parallelism is a solution to easily transform a sequential program into a parallel one without requiring a whole rewriting of the code. the OpenMP stream-computing extension presented by Pop and Cohen proposes an extension of OpenMP to handle pipeline parallelism. However, their communication algorithm relies on Multiple-producer-Multiple-Consumer queues, while pipelined applications mostly deal with linear chains of communication, i.e., with only a single producer and a single consumer. To improve the performance of the OpenMP stream-extension, we propose to add a more specialized Single-Producer-Single-Consumer communication algorithm called Batch Queue and to select it for one-to-one communication. Our evaluation shows that Batch Queue is then able to improve the throughput up to a factor 2 on an 8-core machine both for example application and real applications. Our study shows therefore that using specialized and efficient communication algorithms can have a significant impact on the overall performance of pipelined applications.

关键词： parallel processing Pipelines throughput Benchmark testing Synchronization Multicore processing Scalability

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Coordination of parallel tasks in access to resource groups by adaptive conflictless scheduling

Communications in Computer and Information Science

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Communications in Computer and Information Science 2016年 613卷 272-282页

作者： Smolinski, Mateusz Institute of Information Technology Lodz University of Technology Wolczanska 215 Lodz90-924 Poland

ISBN: (纸本)9783319340982

Conflictless task scheduling is dedicated for environment of parallel task processing with high contention of limited amount of resources. For tasks that each one requires group of resources presented solution can prepare schedule of tasks execution without occurrence of any resource conflict. As a task it can be used any selected sequence of operation that for execution requires access for resource group, to which access is controlled by conflictless scheduling. Any resource group required by task has own FIFO queue, where tasks are waiting for access of those resources. Queues are emptying according to prepared conflictless schedule in such a way that there is no starvation of waiting tasks. Presented scheduling concept for tasks and resource group bases on resource representation model which allows to efficient detect a resource conflict using dedicated data structures like task classes and conflict matrix and algorithms which allows to prepare adaptive conflictless schedule. Prepared conflictless schedule adapts to current environment state like number of resource groups and tasks in their queues and also waiting times of tasks. Prepared schedule ensures task execution without resource conflicts and therefore there is no tasks deadlock. As example of environments where conflictless scheduling can be applied is transaction processing in databases or OLTP systems, processes or threads competing for resources. In transaction processing environment deadlock elimination by using proposed conflictless scheduling reduces the number of transaction rollbacks. © Springer international Publishing Switzerland 2016.

关键词： Concurrency control

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Efficient Asynchronous GCN Training on a GPU Cluster

Efficient Asynchronous GCN Training on a GPU Cluster

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international conference on parallel and Distributed Systems (ICPADS)

作者： Yi Zhang Dhrubajyoti Goswami Concordia University Montreal Canada

ISBN: (纸本)9781665408790

Research on Graph Convolutional Networks (GCNs) has increasingly gained popularity in recent years due to the powerful representational capacity of graphs. A common assumption in traditional synchronous parallel training of GCNs using multiple GPUs is that load is perfectly balanced. However, this assumption may not hold in a real-world scenario where there can be imbalances in workloads among GPUs for various reasons. In a synchronous parallel implementation, a straggler in the system can limit the overall speed up of parallel training. To address these performance issues, this research investigates approaches for asynchronous decentralized parallel training of GCNs on a GPU cluster. the techniques investigated are based on graph clustering and the Gossip protocol. the research specifically adapts the approach of Cluster GCN, which uses graph partitioning for SGD based training, and combines with a gossip algorithm specifically designed for a GPU cluster to periodically exchange gradients among randomly chosen partners (GPUs). In addition, it incorporates a work pool mechanism for load balancing among GPUs. the gossip algorithm is proven to be deadlock free. the implementation is performed on a deep learning cluster with 8 Tesla V100 GPUs per compute node, and PyTorch and DGL as the software platforms. Experiments are conducted on different benchmark datasets. the results demonstrate superior performance with similar accuracy scores, as compared to traditional synchronous training which uses “all reduce” to synchronously accumulate parallel training results.

关键词： Training Protocols Heuristic algorithms Software algorithms Graphics processing units Clustering algorithms System recovery

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