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检索条件"任意字段=9th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

共 385 条记录，以下是121-130 订阅

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Using GPU's to Accelerate Stencil-based Computation Kernels for the Development of Large Scale Scientific Applications on Heterogeneous Systems 12

Using GPU's to Accelerate Stencil-based Computation Kernels ...

引用

17th acm sigplan symposium on principles and practice of parallel programming

作者： Tao, Jian Blazewicz, Marek Brandt, Steven R. Louisiana State Univ Ctr Computat & Technol Baton Rouge LA 70803 USA Poznan Supercomp & Networking Ctr Applicat Dept Poznan Poland

ISBN: (纸本)9781450311601

We present CaCUDA - a GPGPU kernel abstraction and a parallel programming framework for developing highly efficient large scale scientific applications using stencil computations on hybrid CPU/GPU architectures. CaCUDA is built upon the Cactus computational toolkit, an open source problem solving environment designed for scientists and engineers. Due to the flexibility and extensibility of the Cactus toolkit, the addition of a GPGPU programming framework required no changes to the Cactus infrastructure, guaranteeing that existing features and modules will continue to work without modification. CaCUDA was tested and benchmarked using a 3D CFD code based on a finite difference discretization of Navier-Stokes equations.

关键词： Algorithms Design Languages GPGPU programming Computational Framework HPC Stencil Computation

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Practical parallel Hypergraph Algorithms 20

Practical Parallel Hypergraph Algorithms

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Shun, Julian MIT CSAIL Cambridge MA 02139 USA

ISBN: (纸本)9781450368186

While there has been significant work on parallel graph processing, there has been very surprisingly little work on high-performance hypergraph processing. this paper presents a collection of efficient parallel algorithms for hypergraph processing, including algorithms for betweenness centrality, maximal independent set, k-core decomposition, hyper-trees, hyperpaths, connected components, PageRank, and single-source shortest paths. For these problems, we either provide new parallel algorithms or more efficient implementations than prior work. Furthermore, our algorithms are theoretically-efficient in terms of work and depth. To implement our algorithms, we extend the Ligra graph processing framework to support hypergraphs, and our implementations benefit from graph optimizations including switching between sparse and dense traversals based on the frontier size, edge-aware parallelization, using buckets to prioritize processing of vertices, and compression. Our experiments on a 72-core machine and show that our algorithms obtain excellent parallel speedups, and are *** faster than algorithms in existing hypergraph processing frameworks.

关键词： parallel algorithms

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Observing intermediate structures in a parallel lazy functional language 07

Observing intermediate structures in a parallel lazy functio...

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9th International acm sigplan Conference on principles and practice of Declarative programming, PPDP'07

作者： De La Encina, Alberto Llana, Luis Rubio, Fernando Hidalgo-Herrero, Mercedes Dpto. Sistemas Informticos y Computacin Facultad de Informática Universidad Complutense de Madrid Spain C/. Prof.Jose Garcia Santesmases s/n E-28040 Madrid Spain Dpto. Didctica de Las Matemticas Facultad de Educación Universidad Complutense de Madrid Spain C/. Rector Royo-Villanova s/n E-28040 Madrid Spain

ISBN: (纸本)1595937692

Due to the use of higher-order functions and laziness, debugging lazy functional programs is not a trivial task. Fortunately, several debuggers have appeared during the last years. However, the difficulty of the debugging process is increased when considering parallel extensions of lazy functional languages. thus, it is necessary not only to develop practical debuggers, but also to provide a clear semantic environment to understand what the debuggers should do. In this paper we present a formal framework for debugging two different parallel extensions of the lazy functional language Haskell. In order to do that, we define an operational semantics model which allows us to deal with side-effects and parallelism. By doing so, we provide a formalization of a parallel debugger we have already implemented by extending the sequential debugger Hood. Copyright © 2007 acm.

关键词： Semantics

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PPoPP'08 - Proceedings of the 2008 acm sigplan symposium on principles and practice of parallel programming

PPoPP'08 - Proceedings of the 2008 ACM SIGPLAN Symposium on ...

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13th acm sigplan symposium on principles and practice of parallel programming, PPoPP'08

ISBN: (纸本)9781595939609

the proceedings contain 42 papers. the topics discussed include: automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories;type inference for locality analysis of distributed data structures;quasi-static scheduling for safe futures;scalable packet classification using interpreting: a cross-platform multi-core solution;FastForward for efficient pipeline parallelism: a cache-optimized concurrent lock-free queue;matrix product on heterogeneous master-worker platforms;high performance dense linear algebra on a spatially distributed processor;optimization principles and application performance evaluation of a multithreaded GPU using CUDA;a case study in SIMD text processing with parallel bit streams: UTF-8 to UTF-16 transcoding;programming with tiles;design and implementation of a high-performance MPI for C# and the common language infrastructure;and a portable runtime interface for multi-level memory hierarchies.

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Scaling Out Speculative Execution of Finite-State Machines with parallel Merge 20

Scaling Out Speculative Execution of Finite-State Machines w...

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Xia, Yang Jiang, Peng Agrawal, Gagan Ohio State Univ Columbus OH 43210 USA Univ Iowa Iowa City IA USA

ISBN: (纸本)9781450368186

A finite-state machine (FSM) is a key component for many important applications, such as Huffman decoding, regular expression matching and HTML tokenization. Due to its inherent dependencies and unpredictable memory access pattern, FSM computations are considered to be extremely difficult to parallelize. As such, significant research efforts have been made to accelerate FSM computations. Although they achieve promising performance results on multi-core machines, these methods are not scalable for emerging many-core architectures such as the GPUs. Based on our experiments, we point out that the bottleneck of achieving scalability on GPUs is the sequential merge inherent to these methods. However, unlike the case for simple reduction loops, parallel merge implementations for FSM computations typically require runtime checks and re-executions, which can also impede performance. Based on these observations, we develop parallel merge techniques that select efficient runtime check implementations and avoids unnecessary re-executions. Further, based on GPU architectural features, we develop optimization techniques to improve performance. We evaluate our parallel merge implementations on a set of representative algorithms. Experimental results show that our parallel merge implementations are 2.02-6.74 times more efficient than corresponding sequential merge implementations and achieve better scalability on an Nvidia V100 GPU.

关键词： Finite-State Machines Speculation GPUs

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No Barrier in the Road: A Comprehensive Study and Optimization of ARM Barriers 20

No Barrier in the Road: A Comprehensive Study and Optimizati...

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Liu, Nian Zang, Binyu Chen, Haibo Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai Peoples R China Shanghai Jiao Tong Univ Shanghai Key Lab Scalable Comp & Syst Shanghai Peoples R China

ISBN: (纸本)9781450368186

In this paper, we present the first comprehensive performance characterization and optimization of ARM barriers on both mobile and server platforms. We draw a set of observations through several abstracted models and validate them in scenarios where barriers are intensively used. We find that (1) order-preserving approaches without involving the bus significantly outperform other approaches, and (2) the tremendous overhead mostly comes from barriers strictly following remote memory references. Usually, such barriers are inserted when threads are exchanging data, and they are used to ensure the relative order between storing the data to a shared buffer and setting a flag to inform the receiver. Based on the observations, we propose a new mechanism, Pilot, to remove such barriers by leveraging the single-copy atomicity to piggyback the flag with the data. Applying Pilot only requires minor changes to applications and provides 10%-360% performance improvements in multiple benchmarks, which are close to the ideal performance without barriers.

关键词： barrier synchronization concurrency lock

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the RPC Calculus

The RPC Calculus

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11th International acm sigplan symposium on principles and practice of Declarative programming (PPDP 09)

作者： Cooper, Ezra E. K. Wadler, Philip Univ Edinburgh Edinburgh EH8 9YL Midlothian Scotland

ISBN: (纸本)9781605585680

Several recent language designs have offered a unified language for programming a distributed system, with explicit notation of locations;we call these "location-aware" languages. these languages provide constructs allowing the programmer to control the location (the choice of host, for example) where a piece of code should run, which can be useful for security or performance reasons. On the other hand, a central mantra of WWW system engineering prescribes that web servers should be "stateless": that no "session state" should be maintained on behalf of individual clients-that is. no state that pertains to the particular point of the interaction at which a client program resides. Many implementations of location-aware languages are not at home on the web: they hold some kind of client-specific state on the server. We show how to implement a symmetrical location-aware language on top of a stateless server.

关键词： Languages theory

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Automatic Problem Size Sensitive Task Partitioning on Heterogeneous parallel Systems 13

Automatic Problem Size Sensitive Task Partitioning on Hetero...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Grasso, Ivan Kofler, Klaus Cosenza, Biagio Fahringer, thomas Univ Innsbruck Inst Informat A-6020 Innsbruck Austria

ISBN: (纸本)9781450319225

In this paper we propose a novel approach which automatizes task partitioning in heterogeneous systems. Our framework is based on the Insieme Compiler and Runtime infrastructure [1]. the compiler translates a single-device OpenCL program into a multi-device OpenCL program. the runtime system then performs dynamic task partitioning based on an offline-generated prediction model. In order to derive the prediction model, we use a machine learning approach that incorporates static program features as well as dynamic, input sensitive features. Our approach has been evaluated over a suite of 23 programs and achieves performance improvements compared to an execution of the benchmarks on a single CPU and a single GPU only.

关键词： Languages Algorithms Performance heterogeneous computing compilers GPU task partitioning code analysis machine learning runtime system

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parallel skeletons for structured composition

Parallel skeletons for structured composition

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Proceedings of the 5th acm sigplan symposium on principles and practice of parallel programming

作者： Darlington, John Guo, Yi-ke To, Hing Wing Yang, Jin Imperial Coll London United Kingdom

In this paper, we propose a straightforward solution to the problems of compositional parallel programming by using skeletons as the uniform mechanism for structured composition. In our approach parallel programs are constructed by composing procedures in a conventional base language using a set of high-level, predefined, functional, parallel computational forms known as skeletons. the ability to compose skeletons provides us with the essential tools for building further and more complex application-oriented skeletons specifying important aspects of parallel computation. Compared with the process network based composition approach, such as PCN, the skeleton approach abstracts away the fine details of connecting communication ports to the higher level mechanism of making data distributions conform, thus avoiding the complexity of using lower level ports as the means of interaction. thus, the framework provides a natural integration of the compositional programming approach with the data parallel programming paradigm.

关键词： parallel processing systems

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Accelerating CUDA Graph Algorithms at Maximum Warp 11

Accelerating CUDA Graph Algorithms at Maximum Warp

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16th acm symposium on principles and practice of parallel programming

作者： Hong, Sungpack Kim, Sang Kyun Oguntebi, Tayo Olukotun, Kunle Stanford Univ Comp Syst Lab Stanford CA 94305 USA

ISBN: (纸本)9781450301190

Graphs are powerful data representations favored in many computational domains. Modern GPUs have recently shown promising results in accelerating computationally challenging graph problems but their performance suffers heavily when the graph structure is highly irregular, as most real-world graphs tend to be. In this study, we first observe that the poor performance is caused by work imbalance and is an artifact of a discrepancy between the GPU programming model and the underlying GPU architecture. We then propose a novel virtual warp-centric programming method that exposes the traits of underlying GPU architectures to users. Our method significantly improves the performance of applications with heavily imbalanced workloads, and enables trade-offs between workload imbalance and ALU underutilization for fine-tuning the performance. Our evaluation reveals that our method exhibits up to 9x speedup over previous GPU algorithms and 12x over single thread CPU execution on irregular graphs. When properly configured, it also yields up to 30% improvement over previous GPU algorithms on regular graphs. In addition to performance gains on graph algorithms, our programming method achieves 1.3x to 15.1x speedup on a set of GPU benchmark applications. Our study also confirms that the performance gap between GPUs and other multi-threaded CPU graph implementations is primarily due to the large difference in memory bandwidth.

关键词： Algorithms Performance parallel graph algorithms CUDA GPGPU

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