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17th acm sigplan symposium on principles and practice of parallel programming

作者： Minh Ngoc Dinh Abramson, David Jin, Chao Gontarek, Andrew Moench, Bob DeRose, Luiz Monash Univ Clayton Vic 3800 Australia Cray Inc St Paul MN 55101 USA

Traditional debuggers are of limited value for modern scientific codes that manipulate large complex data structures. this paper discusses a novel debug-time assertion, called a "Statistical Assertion", that allows a user to reason about large data structures, and the primitives are parallelised to provide an efficient solution. We present the design and implementation of statistical assertions, and illustrate the debugging technique with a molecular dynamics simulation. We evaluate the performance of the tool on a 12,000 cores Cray XE6.

关键词： Performance Verification parallel debugging statistic assertion

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PiPAD: Pipelined and parallel Dynamic GNN Training on GPUs 23

PiPAD: Pipelined and Parallel Dynamic GNN Training on GPUs

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28th acm sigplan Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Wang, Chunyang Sun, Desen Bai, Yuebin Beihang University Beijing China

ISBN: (纸本)9798400700156

Dynamic Graph Neural Networks (DGNNs) have been widely applied in various real-life applications, such as link prediction and pandemic forecast, to capture both static structural information and temporal characteristics from dynamic graphs. Combining both time-dependent and -independent components, DGNNs manifest substantial parallel computation and data reuse potentials, but suffer from severe memory access inefficiency and data transfer overhead under the canonical one-graph-at-a-time training pattern. To tackle these challenges, we propose PiPAD, a Pipelined and parallel DGNN training framework for the end-to-end performance optimization on GPUs. From both algorithm and runtime level, PiPAD holistically reconstructs the overall training paradigm from the data organization to computation manner. Capable of processing multiple graph snapshots in parallel, PiPAD eliminates unnecessary data transmission and alleviates memory access inefficiency to improve the overall performance. Our evaluation across various datasets shows PiPAD achieves 1.22 × - 9.57× speedup over the state-of-the-art DGNN frameworks on three representative models. © 2023 acm.

关键词： Memory architecture

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Managing application parallelism via parallel efficiency regulation 19

Managing application parallelism via parallel efficiency reg...

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24th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2019

作者： Srikanthan, Sharanyan Ferro, Princeton Chakraborti, Sayak Dwarkadas, Sandhya University of Rochester United States

ISBN: (纸本)9781450362252

Modern multiprocessor systems contain a wealth of compute, memory, and communication network resources, such that multiple applications can often successfully execute on and compete for these resources. Unfortunately, good performance for individual applications in addition to achieving overall system eficiency proves a dificult task, especially for applications with low parallel eficiency (speedup per utilized computational core). Limitations to parallel eficiency arise out of factors such as algorithm design, excess synchronization, limitations in hardware resources, and sub-optimal task placement on CPUs. In this work, we introduce MAPPER, a Manager of Application parallelism via parallel Efficiency Regulation. MAPPER monitors and coordinates all participating applications by making two coupled decisions: how much parallelism to afford to each application, and which specific CPU cores to schedule applications on. While MAPPER can work for generic applications without modifying their parallel runtimes, we introduce a simple interface that can be used by parallel runtime systems for a tighter integration, resulting in better task granularity control. Using MAPPER can result in up to 3.3X speedup, with an average performance improvement of 20%. © 2019 Copyright held by the owner/author(s).

关键词： Program processors

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parallel-program transformation using a metalanguage 91

Parallel-program transformation using a metalanguage

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3rd acm sigplan symposium on principles and practice of parallel programming, PPOPP 1991

作者： Allan Yang, J. Choo, Young-Ii Department of Computer Science Yale University New HavenCT06520-2158 United States

ISBN: (纸本)0897913906

thk paper describes how program transformation using a rnetalanguage can be an effective methodology for developim~ gcorrect and efficient parallel programs. As an example, a class of different parallel matrix multiplication programs are derived. Starting from a four-line, intuitive, easy-Toverify, though inefficient program, more sophisticated and eilicient programs are derived. All the transformation steps preserve the semantics of the initial program so that the transformation process is a verification of the equivalence among all the derived programs. the metalanguage provides a simple, flexible, extensible, and formal framework for expressing transformational schemes. It also automates tlhe cumbersome and error-prone part of the program transformation. © 1991 Association for Computing Machinery. All Rights Reserved.

关键词： parallel programming

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Does Cache Sharing on Modern CMP Matter to the Performance of Contemporary Multithreaded Programs?

Does Cache Sharing on Modern CMP Matter to the Performance o...

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Zhang, Eddy Z. Jiang, Yunlian Shen, Xipeng Coll William & Mary Dept Comp Sci Williamsburg VA 23187 USA

ISBN: (纸本)9781605587080

Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also results in cache contention. A number of studies have examined the influence of cache sharing on multithreaded applications, but most of them have concentrated on the design or management of shared cache, rather than a systematic measurement of the influence. Consequently, prior measurements have been constrained by the reliance on simulators, the use of out-of-date benchmarks, and the limited coverage of deciding factors. the influence of CMP cache sharing on contemporary multithreaded applications remains preliminarily understood. In this work, we conduct a systematic measurement of the influence on two kinds of commodity CMP machines, using a recently released CMP benchmark suite, PARSEC, with a number of potentially important factors on program, OS, and architecture levels considered. the measurement shows some surprising results. Contrary to commonly perceived importance of cache sharing, neither positive nor negative effects from the cache sharing are significant for most of the program executions, regardless of the types of parallelism, input datasets, architectures, numbers of threads, and assignments of threads to cores. After a detailed analysis, we find that the main reason is the mismatch of current development and compilation of multithreaded applications and CMP architectures. By transforming the programs in a cache-sharing-aware manner, we observe up to 36% performance increase when the threads are placed on cores appropriately.

关键词： Shared Cache thread Scheduling parallel Program Optimizations Chip Multiprocessors

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parallel programming with Big Operators

Parallel Programming with Big Operators

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Park, Changhee Steele, Guy L., Jr. Tristan, Jean-Baptiste Korea Adv Inst Sci & Technol Taejon South Korea

In the sciences, it is common to use the so-called "big operator" notation to express the iteration of a binary operator (the reducer) over a collection of values. Such a notation typically assumes that the reducer is associative and abstracts the iteration process. Consequently, from a programming point-of-view, we can organize the reducer operations to minimize the depth of the overall reduction, allowing a potentially parallel evaluation of a big operator expression. We believe that the big operator notation is indeed an effective construct to express parallel computations in the Generate/Map/Reduce programming model, and our goal is to introduce it in programming languages to support parallel programming. the effective definition of such a big operator expression requires a simple way to generate elements, and a simple way to declare algebraic properties of the reducer (such as its identity, or its commutativity). In this poster, we want to present an extension of Scala with support for big operator expressions. We show how big operator expressions are defined and how the API is organized to support the simple definition of reducers with their algebraic properties.

关键词： parallelism Mathematical notation Scala

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Interaction of parallel programming constructs and coherence protocols

Interaction of parallel programming constructs and coherence...

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Proceedings of the 1997 6th acm sigplan symposium on principles and practice of parallel programming

作者： Bianchini, Ricardo Carrera, Enrique V. Kontothanassis, Leonidas Federal Univ of Rio de Janeiro Rio de Janeiro Brazil

Some of the most common parallel programming idioms include locks, barriers, and reduction operations. the interaction of these programming idioms with the multiprocessor9;s coherence protocol has a significant imp... 详细信息

Some of the most common parallel programming idioms include locks, barriers, and reduction operations. the interaction of these programming idioms with the multiprocessor's coherence protocol has a significant impact on performance. In addition, the advent of machines that support multiple coherence protocols prompts the question of how to best implement such parallel constructs, i.e. what combination of implementation and coherence protocol yields the best performance. In this paper we study the running time and communication behavior of (1) centralized (ticket) and MCS spin locks, (2) centralized, dissemination, and tree-based barriers, and (3) parallel and sequential reductions, under pure and competitive update coherence protocols;results for write-invalidate protocol are presented mostly for comparison purposes. Our experiments indicate that parallel programming techniques that are well-established for write invalidate protocols, such as MCS locks and parallel reductions, are often inappropriate for update-based protocols. In contrast, techniques such as dissemination and tree barriers achieve superior performance under update-based protocols. Our results also show that the implementation of parallel programming idioms must take the coherence protocol into account, since update-based protocols often lead to different design decisions than write invalidate protocols. Our main conclusion is that protocol-conscious implementation of parallel programming structures can significantly improve application performance;for multiprocessors that can support more than one coherence protocol both the protocol and implementation should be taken into account when exploiting parallel constructs.

关键词： parallel processing systems

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SEP-Graph: Finding Shortest Execution Paths for Graph Processing under a Hybrid Framework on GPU 19

SEP-Graph: Finding Shortest Execution Paths for Graph Proces...

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24th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Wang, Hao Geng, Liang Lee, Rubao Hou, Kaixi Zhang, Yanfeng Zhang, Xiaodong Ohio State Univ Dept Comp Sci & Engn Columbus OH 43210 USA Northeastern Univ Dept Comp Sci & Engn Shenyang Peoples R China United Parallel Comp Corp Atlanta DE USA Virginia Tech Dept Comp Sci Blacksburg VA USA

ISBN: (纸本)9781450362252

In general, the performance of parallel graph processing is determined by three pairs of critical parameters, namely synchronous or asynchronous execution mode (Sync or Async), Push or Pull communication mechanism (Push or Pull), and Data-driven or Topology-driven traversing scheme (DD or TD), which increases the complexity and sophistication of programming and system implementation of GPU. Existing graph-processing frameworks mainly use a single combination in the entire execution for a given application, but we have observed their variable and suboptimal performance. In this paper, we present SEP-Graph, a highly efficient software framework for graph-processing on GPU. the hybrid execution mode is automatically switched among three pairs of parameters, with an objective to achieve the shortest execution time in each iteration. We also apply a set of optimizations to SEP-Graph, considering the characteristics of graph algorithms and underlying GPU architectures. We show the effectiveness of SEP-Graph based on our intensive and comparative performance evaluation on NVIDIA 1080, P100, and V100 GPUs. Compared with existing and representative GPU graph-processing framework Groute and Gunrock, SEP-Graph can reduce execution time up to 45.8 times and 39.4 times.

关键词： Graph Algorithms GPU Hybrid

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parallel 'go with the winners' algorithms in distributed memory models

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JOURNAL OF parallel AND DISTRIBUTED COMPUTING 2003年第9期63卷 801-814页

作者： Peinado, M Lengauer, T Microsoft Corp Redmond WA 98052 USA Max Planck Inst Comp Sci D-66123 Saarbrucken Germany

We parallelize the 9;go with the winners9; algorithm of Aldous and Vazirani (in: Proceedings of the 35th IEEE symposium on the Foundations of Computer Science, IEEE Computer Society Press, Silver Spring., MD, 19... 详细信息

We parallelize the 'go with the winners' algorithm of Aldous and Vazirani (in: Proceedings of the 35th IEEE symposium on the Foundations of Computer Science, IEEE Computer Society Press, Silver Spring., MD, 1994, pp. 492-501) and analyze the resulting parallel algorithm in the LogP-model (in: Proceedings of the Fourth acm sigplan symposium on principles & practice of parallel programming, 1993, pp. 1-12). the main issues in the analysis are load imbalances and communication delays. the result of the analysis is a practical algorithm which, under reasonable assumptions, achieves linear speedup. Finally, we analyze our algorithm for a concrete application: generating models of amorphous chemical structures. (C) 2003 Elsevier Inc. All rights reserved.

关键词： parallel algorithms go with the winners LogP model second moment method load balancing amorphous solids self-avoiding walks

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POSTER: Stream-K:Work-centric parallel Decomposition for Dense Matrix-Matrix Multiplication on the GPU 28

POSTER: Stream-K:Work-centric Parallel Decomposition for Den...

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28th acm sigplan Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Osama, Muhammad Merrill, Duane Cecka, Cris Garland, Michael Owens, John D. University of California Davis United States NVIDIA Corporation

ISBN: (纸本)9798400700156

We introduce Stream-K, a work-centric parallelization of matrix multiplication (GEMM) and related computations in dense linear algebra. Whereas contemporary decompositions are primarily tile-based, our method operates by partitioning an even share of the aggregate inner loop iterations among physical processing elements. this provides a near-perfect utilization of computing resources, regardless of how efficiently the output tiling for any given problem quantizes across the underlying processing elements. © 2023 Owner/Author.

关键词： Graphics processing unit

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