In this paper,we use suspended microstrip to design a 0.33 thz fequency tripler,in which a pair of Schottky varactor chips parallel is *** the present processing technology,it’s easy for the unbalanced structure to p...
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In this paper,we use suspended microstrip to design a 0.33 thz fequency tripler,in which a pair of Schottky varactor chips parallel is *** the present processing technology,it’s easy for the unbalanced structure to provide bias to the diodes without an on-chip capacitor,which is essential to the balanced tripler *** tripler consists of a waveguide housing,a pair of quartz microstrip circuits,a Rogers RT/duroid 5880(tm) DC bias filter and a GaAs Schottky varactor *** when the input power is 23 dBm,the whole circuits simulation results indicates that the output power with12.96%efficiency at 330.9 GHz,the 3 dB bandwidth for the tripler is above 7%.
this paper present the design of E-band E-plane bandpass waveguide filter withthe E-plane inserted metal *** the waveguide filter is analyzed and optimized by electromagnetic simulation software according to the wave...
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this paper present the design of E-band E-plane bandpass waveguide filter withthe E-plane inserted metal *** the waveguide filter is analyzed and optimized by electromagnetic simulation software according to the waveguide filter structure *** simulation,the E band waveguide filter is operated from 72.2GHz to 73.8GHz withthe maximum insertion loss of 0.41 *** the relative bandwidth of the waveguide filter is about 2%.At last,contrast about the experiment results and the simulation data is analyzed.
A novel 170GHz-260 GHz sub-harmonic mixer(SHM) is designed and analyzed in this *** simulation results and measurement results is *** mixer is based on a low parasitic anti-parallel pair of GaAs planar Schottky *** ci...
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A novel 170GHz-260 GHz sub-harmonic mixer(SHM) is designed and analyzed in this *** simulation results and measurement results is *** mixer is based on a low parasitic anti-parallel pair of GaAs planar Schottky *** circuits are integrated withthe high pass filter and IF filter,which are fabricated on a suspended quartz-based *** best conversion loss of mixer is 7dB with 6dBm LO *** the band of 170GHz-260 GHz,the mixer's conversion loss is below 13 dB.
this paper deals withdesign of physical unclonable functions (PUFs) based on field-programmable gate array (FPGA). the goal was to propose a cheap, efficient and secure device identification or even a cryptographic k...
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this paper deals withdesign of physical unclonable functions (PUFs) based on field-programmable gate array (FPGA). the goal was to propose a cheap, efficient and secure device identification or even a cryptographic key generation based on PUFs. therefore, a design of a ring oscillator (RO)-based PUF producing more output bits from each RO pair is presented. 24 Digilent Basys 2 FPGA boards (Spartan-3E) and 6 Digilent Nexys 3 FPGA boards (Spartan-6) were tested and statistically evaluated indicating suitability of the proposed design for device identification. A stable PUF output is required for generating cryptographic keys. As post-processing technique to further improve the efficiency of this PUF design, we used Gray code on the obtained bits from RO pairs. Ultimately, the PUF design is combined with error correction code and together with Gray code is able to generate cryptographic keys of sufficient length.
the paper reports on the design and performance of a high power backward wave oscillator(BWO),working at Ku-band *** rectangular waveguide grating structure is used as its slow wave *** backward wave oscillator is dri...
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the paper reports on the design and performance of a high power backward wave oscillator(BWO),working at Ku-band *** rectangular waveguide grating structure is used as its slow wave *** backward wave oscillator is driven by a sheet beam with cross sectional area of 30mm×1mm which is generated by a thin *** a beam voltage 185 kV,and beam current 3.2kA,the output power is 2.5MW at 14.3GHz.
In this paper,a 420 GHz GaAs monolithic integrated sub-harmonic mixer based on planar Schottky diode is *** combine the diode 3D model,nonlinear model and passive circuit by field-circuit method,then optimize the circ...
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In this paper,a 420 GHz GaAs monolithic integrated sub-harmonic mixer based on planar Schottky diode is *** combine the diode 3D model,nonlinear model and passive circuit by field-circuit method,then optimize the circuit through harmonic balanced method,finally study the GaAs monolithic integrated 420 GHz sub-harmonic *** results for the mixer achieved DSB conversion loss of 7.161 dB at420.4GHz when the LO pumped power was 6dBm at210 *** conversion loss was less than 9dB from384 GHz to 451 GHz.
the proceedings contain 9 papers. the topics discussed include: fault attack on AES via hardware Trojan insertion by dynamic partial reconfiguration of FPGA over Ethernet;information theoretic models for signatures in...
ISBN:
(纸本)9781450329323
the proceedings contain 9 papers. the topics discussed include: fault attack on AES via hardware Trojan insertion by dynamic partial reconfiguration of FPGA over Ethernet;information theoretic models for signatures in VLSI power delivery systems;a signature based architecture for Trojan detection;accelerating differential power analysis on heterogeneous systems;detection, traceback and filtering of denial of service attacks in networked embedded systems;risk management in embedded devices using metering applications as example;encoding the state of integrated circuits: a proactive and reactive protection against hardware Trojans horses;some RSSB constructions with improved resistance towards differential power analysis;and trusted sharing of intellectual property in electronic hardware design.
Hardware Trojan Horses (Hth) are a serious threat to semiconductor industry with significant economic impact. However, most of the research in Hth focuses on detection. We propose the concept of "encoded circuit&...
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ISBN:
(纸本)9781450329323
Hardware Trojan Horses (Hth) are a serious threat to semiconductor industry with significant economic impact. However, most of the research in Hth focuses on detection. We propose the concept of "encoded circuit", as a technique to protect Hth insertion. Encoded circuit is based on the theory of codes. It encodes the internal state with a chosen code of security parameter d, such that knowledge of less than d bits of the encoded state reveals no information about the actual state. this parameter stems from a similar notion introduced by Ishai, Sahai and Wagner at CRYPTO 2003 for the prevention of probing attacks. Usually d
Board-level I/Os signal integrity and conducted EMI have become a critical concern for high-speed circuit and package designers, and a major element of performance and reliability degradation in modern electronic syst...
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the paper deals withthe problem of test data volume, test application time and on-chip test decompressor hardware overhead of scan based circuits. Broadcast-based test compression techniques can reduce boththe test ...
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ISBN:
(纸本)9781467311854
the paper deals withthe problem of test data volume, test application time and on-chip test decompressor hardware overhead of scan based circuits. Broadcast-based test compression techniques can reduce boththe test data volume and test application time. Pattern overlapping test compression techniques are proven to be highly effective in the test data volume reduction and low decompressor hardware requirements. this paper presents a new test compression and test application approach that combines boththe test pattern overlapping technique and the test pattern broadcasting technique. this new technique significantly reduces test application time by utilizing a new on-chip test decompressor architecture presented in this paper.
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