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检索条件"任意字段=9th International Conference on Algorithms and Architectures for Parallel Processing"

共 2826 条记录，以下是211-220 订阅

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Convolutional Neural Network architectures for Modulation Scheme Classification in RF Signals within Cognitive Radio Systems

Convolutional Neural Network Architectures for Modulation Sc...

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international conference on Signal processing and Communication (ICSC)

作者： Mwp Maduranga H.K.I.S. Lakmal Valmik Tilwari Department of Computer Engineering Faculty of Computing General Sir John Kotelawala Defence University Ratmalana Sri Lanka Dept. of Mechatronic and Industry Engineering NSBM Green University Town Homagama Sri Lanka Department of Electronics & Communication Engineering Indian Institute of Information Technology Guwahati India

Dynamic Spectrum Access (DSA) plays a crucial role in cognitive radio (CR) by effectively utilizing unused spectrum and meeting the escalating traffic demands of advanced cellular networks like 5G and beyond. A significant focus in recent years has been on employing Deep Learning (DL) architectures for Radio Frequency (RF) signal classification in CR-based applications. this paper presents the development of a DL-based framework using Convolutional Neural Network (CNN) architecture to classify various modulation schemes, including Continuous-phase frequency-shift keying (CPFSK), Gaussian Frequency Shift Keying(GFSK), 64 quadrature amplitude modulation (QAM), Binary Phase-shift keying (BPSK), 16QAM, Gaussian Minimum Shift Keying (GMSK), QPSK of a signal received from the base stations in Global System for Mobile communication (GSM) network. the performance evaluation of the proposed CNN architecture will be conducted using real-time GSM signals obtained from nearby base stations. the performance analysis of each network architecture is presented and analyzed.

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DESING OF IMAGE ACQUISITION AND processing SYSTEM BASED ON ZYNQ 9

DESING OF IMAGE ACQUISITION AND PROCESSING SYSTEM BASED ON Z...

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9th international Symposium on Test Automation and Instrumentation, ISTAI 2022

作者： Guo, Zhidong Zhao, Jimin Yang, Shifeng Tianjin University of Science and Technology Tianjin China

ISBN: (纸本)9781839538391

In order to solve the problems of large data image acquisition, stable transmission and real-time processing of moving objects in industrial scenes, a solution of "acquisition + processing + storage + transmission + display" based on FPGA + ARM architecture for Camera Link high-speed camera is proposed. Zynq-7000 series products with abundant logic resources and general CPU are selected. Make full use of the parallel computing capability of the PL side, To solve the problems of high-speed acquisition and image processing, the PS side used to complete the image storage and stable transmission of the system. this paper introduces the key technologies of each part in detail. the experimental results show that the system has the advantages of optimizing image quality, high real-time, no frame loss, small size, low power consumption and low cost. It is also used in high-definition imaging related projects of train body. © 2022 IET conference Proceedings. All rights reserved.

关键词： Field programmable gate arrays (FPGA)

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Coding Transmission Scheme with High Degrees of Freedom for the Cache-Aided MIMO Interference Network

Coding Transmission Scheme with High Degrees of Freedom for ...

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6th international conference on Intelligent Computing and Signal processing (ICSP)

作者： Weihua Liu Guidong Ding Yuan Yu Wenjun Song Daoying Huang College of Electronic Information Engineering Zhengzhou University of Light Industry Zhengzhou China

ISBN: (数字)9798350376548

ISBN: (纸本)9798350376555

In this paper, a multicarrier cache-aided multiple-input multiple-output (MIMO) interference network model is developed around the extension of the application of coded caching technology. A new diagonal-block channel matrix under this model is defined. Based on the diagonal-block channel matrix, an interference-free parallel transmission scheme with joint coded caching and interference alignment (IA) is proposed. A fine quadratic file segmentation strategy is used in the cache design, and the solution of the precoding and filtering matrice is given in the interference design. the scheme comprehensively considers multi-domain wireless resources comprehensively, i.e., space, time and frequency, on the basis of ensuring the recovery of request file at receiver, high degrees of freedom (DoF) is achieved. the proposed coded parallel transmission scheme is superior in terms of DoF and network resource utilization compared to cache-aided single antenna interference network.

关键词： Wireless communication Time-frequency analysis Precoding Transmitting antennas Interference Receivers Signal processing Resource management MIMO communication Load modeling

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parallel Programming Models and Paradigms: OpenMP Analysis 5

Parallel Programming Models and Paradigms: OpenMP Analysis

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5th international conference on Computing Methodologies and Communication, ICCMC 2021

作者： Alrawais, Arwa Prince Sattam Bin Abdulaziz University College of Computer Engineering and Sciences Al-Kharj11942 Saudi Arabia

ISBN: (纸本)9781665403603

the increase demand for processing power has grown over the years, this demand lend to the parallel approach which means linking a bunch of computers together to jointly increase both the speed and efficiency. the parallelism approach plays a significant role in the new generation's applications by moving the technologies from expensive and specialized parallel supercomputers to linking a set of computers. throughout the years, the parallel approach lends to parallel programming models which exists above hardware and memory architectures. It is a collection of software technologies that present parallel algorithms and resembling applications with underlying system. this paper describes the essential concept of parallel programming and a brief overview of different areas of parallel programming models and paradigms. Furthermore, it implements and evaluates OpenMP parallel programming and illustrates its effectiveness. © 2021 IEEE.

关键词： parallel programming

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FPGA based designing Central processing unit of Implantable Cardiac Defibrillators with low energy consumption by using CNN deep neural network

FPGA based designing Central processing unit of Implantable ...

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Technology and Energy Management (ICTEM), international conference on

作者： Alireza Keyanfar Reza Ghaderi Soheila Nazari Faculty of Electrical Engineering Shahid Beheshti University Tehran Iran

ISBN: (数字)9798350329797

ISBN: (纸本)9798350329803

the heart is one of the most important organs of the human body. Diagnosis and timely treatment of cardiac arrhythmias are important issues in the construction of medical equipment that protects the heart. It is critical to diagnose and treat cardiac arrhythmias such ventricular fibrillation (VF) and ventricular tachycardia (VT) as soon as they are noticed. An implantable cardioverter-defibrillator (ICD) is a device designed to detect and treat ventricular tachycardia (VT) and ventricular fibrillation (VF). Signal processing and arrhythmia detection of implant defibrillator devices is one of the most important parts of these devices and should be optimal in terms of detection time and detection accuracy. In this paper, an artificial neural network based on deep learning has been designed for use in signal processing and arrhythmia detection sections of ICD defibrillator devices. the designed convolution neural network is in good condition in terms of accuracy and is also in optimal condition in terms of the number of parameters. the optimal number of parameters can increase network speed in signal processing and arrhythmia detection and can also be useful in reducing battery consumption. Finally, the designed CNN network hardware was implemented. zynq chips have the ability to process in parallel and can be useful in increasing the processing speed, so zynq chips were selected for the hardware target. After the hardware implementation stage, it is possible to proceed from the IP Core produced to design other parts of the defibrillator in the Vivado software.

关键词： Heart Deep learning Accuracy Tachycardia Arrhythmia Signal processing algorithms Hardware

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A proposal learning strategy on CNN architectures for targets classification 6

A proposal learning strategy on CNN architectures for target...

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6th international conference on Advanced Technologies for Signal and Image processing, ATSIP 2022

作者： Toumi, Abdelmalek Cexus, Jean-Christophe Khenchaf, Ali Umr Cnrs 6285 Ensta Bretagne Lab-STICC 2 Rue François Verny Brest Cedex 9 29806 France

ISBN: (纸本)9781665451161

Synthetic Aperture Radar (SAR) imagery has a great potential in remote sensing field in order to maintain aerial, land and maritime surveillance. To improve this potential for several goals, Machine Learning (ML) techniques are used for effective and efficient classification of remotely sensed imagery. the strengths of machine learning include the capacity to handle data of high dimensionality with several modality and to map classes with very complex and varied *** focus in this paper on the ship classification from SAR imagery using a deep learning algorithms with transfer leaning mechanisms. To improve the recognition performances, several learning strategies are proposed. We illustrate these issues through applying a transfer learning on deep learning ship classification with several learning strategies. We used in this work especially no huge labelled dataset available for training. the aim is thus to see how to leverage knowledge from models pre-trained on other tasks (source tasks) and use them for target classification (target task). © 2022 IEEE.

关键词： Remote sensing

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A Framework for Decentralized parallel Complex Event processing on Heterogeneous Infrastructures

A Framework for Decentralized Parallel Complex Event Process...

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9th IEEE international conference on Big Data (IEEE BigData)

作者： Roeger, Henriette Bhowmik, Sukanya Linn, Tobias Univ Stuttgart Inst Parallel & Distributed Syst Stuttgart Germany

Low-latency stream processing applications (SPA) distribute the event streams on parallel instances of the application9;s operators to avoid queuing. Each operator has a set of processing nodes for its *** and fog ... 详细信息

ISBN: (纸本)9781665439022

Low-latency stream processing applications (SPA) distribute the event streams on parallel instances of the application's operators to avoid queuing. Each operator has a set of processing nodes for its *** and fog infrastructures promise, among other things, low communication latency and are thus of interest for low-latency SPAs. Yet, they include heterogeneous, even volatile nodes which makes the parallel processing of SPAs challengingAvailable solutions for parallel SPAs often assume homogeneity and stable ***, we aim to balance the stream processing among heterogeneous, instable infrastructures using a decentralized control mechanism. We propose a decentralized, dynamic, and lightweight approach to re-balance SPA-load according to the nodes current performance, while minimizing latencies. In doing so, we introduce the Coda-EFC framework for window-based stream processing on heterogeneous distributed infrastructures. It dynamically adapts its load balancing to node performance without computing quickly outdated schedules and aims for latency-optimal load balancing. We introduce two adaptive load balancing strategiesone tailored for heterogeneous, dynamic infrastructures, the other an adaptation of a state-of-the art approach.

关键词： Stream processing Multi-provider Infrastructure Fog Computing

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RRT*-APF Hybrid Path Planning for Reconfigurable Cable-Driven parallel Robots

RRT*-APF Hybrid Path Planning for Reconfigurable Cable-Drive...

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Automation, Control and Robotics Engineering (CACRE), international conference on

作者： Xudong Chang Ting Liu Sen Jiao Zonghui Yang College of Information and Control Engineering Jilin Institute of Chemical Technology Jilin China College of Aerospace Engineering Jilin Institute of Chemical Technology Jilin China

ISBN: (数字)9798350350302

ISBN: (纸本)9798350350319

When Cable-Driven parallel Robots (CDPRs) are doing some complex work, obstacles in the environment will interfere with cables and the mobile platform. It is a meaningful work to avoid these disturbances by planning the path of CDPRs. this paper presents an optimal path planning strategy for a reconfigurable CDPR. By a variant of Rapid-exploration Random Tree (RRT) to find the optimal collision avoidance path gradually, Artificial Potential Field (APF) is used to guide the generation of random tree nodes, reducing the time of finding the path, and ensuring the safe distance between the platform and obstacles, and generating the shortest collision-free path. Post-processing algorithm reduce the number of path points. Detect whether the generated path will cause obstacles to interfere with the cable. If there is interference, optimize the robot's stiffness and minimize cable tensions to determine the optimal configuration. By adjusting the location of the cable connection points on the fixed frame, the obstacle avoidance of the cable is realized. the simulation results demonstrate the RRT ${}^*-\text{APF}$ hybrid path planning algorithm's ability to successfully find the path to avoid collision of the mobile platform in the environment with obstacles, the reconstruction algorithm can find the best collision-free configuration of the cable.

关键词： parallel robots Automation Simulation Interference Reconstruction algorithms Path planning Planning

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

18th International Conference on Algorithms and Architecture...

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18th international conference on algorithms and architectures for parallel processing - ICA3PP 2018 Collocated Workshops: ICA3PP 2018 Workshop on Intelligent algorithms for Large-scale Complex Optimization Problems, IALCOP 2018, ICA3PP 2018 Workshop on Security and Privacy in Data processing, SPDP 2018

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High Performance Portable Solver for Tridiagonal Toeplitz Systems of Linear Equations

High Performance Portable Solver for Tridiagonal Toeplitz Sy...

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26th international conference on parallel and Distributed Computing (Euro-Par)

作者： Dmitruk, Beata Stpiczynski, Przemyslaw Marie Curie Sklodowska Univ Inst Comp Sci Ul Akad 9 PL-20033 Lublin Poland

ISBN: (纸本)9783030715939;9783030715922

We show that recently developed divide and conquer parallel algorithm for solving tridiagonal Toeplitz systems of linear equations can be easily and efficiently implemented for a variety of modern multicore and GPU architectures, as well as hybrid systems. Our new portable implementation that uses OpenACC can be executed on both CPU-based and GPU-accelerated systems. More sophisticated variants of the implementation are suitable for systems with multiple GPUs and it can use CPU and GPU cores. We consider the use of both columnwise and row wise storage formats for two dimensional double precision arrays and show how to efficiently convert between these two formats using cache memory. Numerical experiments performed on Intel CPUs and Nvidia GPUs show that our new implementation achieves relatively good performance.

关键词： Tridiagonal Toeplitz systems parallel algorithms Vectorization Portability OpenACC Hybrid systems

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