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检索条件"任意字段=9th International Conference on Algorithms and Architectures for Parallel Processing"

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Organization of shared memory with synchronization for multiprocessor-on-a-chip 9

Organization of shared memory with synchronization for multi...

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9th international conference on parallel and Distributed Systems (ICPADS 2002)

作者： Yamawaki, A Iwane, M Kyushu Inst Technol Dept Elect Engn Kitakyushu Fukuoka Japan

ISBN: (纸本)0769517609

the TSVM is a logical structured memory with a synchronization to improve a performance in a multi-threaded parallel processing. the physical TSVM is realized by the TSVM cache (TC) and a conventional memory in a Multiprocessor-on-a-chip (MOC) system. the L1 cache in a CPU consists of the TC, the General variable cache (GVC) and the instruction cache. the IYA (IY architecture) that is a new architecture divides a conventional data cache into the TC and GVC. the TC caches the shared variables with a synchronization, and the GVC caches other general variables. Regardless of a CPU core, a MOC with the IYA can utilize parallelisms from the instruction level and the statement level to the thread level systematically. To estimate the effect of the TC, preliminary experiments are performed on the multi-chip multiprocessor including the stand-alone TSVM. the result shows that the TSVM cache improves the performance.

关键词： Associative memory CADCAM Computer aided manufacturing Counting circuits parallel processing Protection Random access memory Scheduling Yarn

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Multi-modular architecture based on convolutional neural networks for online handwritten character recognition 9

Multi-modular architecture based on convolutional neural net...

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9th international conference on Neural Information processing, ICONIP 2002

作者： Poisson, E. Viard Gaudin, C. Lallican, P.-M. Image Video Communication IRCCyN UMR CNRS 6597 EpuN Rue Christian Pauc - BP 50609 Nantes Cedex 344306 France Vision Objects 9 rue Pavillon Ste Luce sur Loire44980 France

ISBN: (纸本)9810475241

In this paper, several convolutional neural network architectures are investigated for online isolated handwritten character recognition (Latin alphabet). Two main architectures have been developed and optimised. the first one, a TDNN, processes online features extracted from the character. the second one, a SDNN, relies on the off-line bitmaps reconstructed from the trajectory of the pen. Moreover, an hybrid architecture called SDTDNN has been derived, it allows the combination of on-line and off-line recognisers. Such a combination seems to be very promising to enhance the character recognition rate. this type of shared weights neural networks introduces the notion of receptive field, local extraction and it allows to restrain the number of free parameters in opposition to classic techniques such as multi-layer perceptron. Results on UNIPEN and IRONOFF databases for online recognition are reported, while the MNIST database has been used for the off-line classifier. © 2002 Nanyang Technological University.

关键词： Character recognition

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Proceedings of the international conference on parallel and Distributed Systems - ICPADS

Proceedings of the International Conference on Parallel and ...

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9th international conference on parallel and Distributed Systems, ICPADS 2002

ISBN: (纸本)0769517609

the proceedings contain 98 papers. the topics discussed include: a novel neighbourhood broadcasting algorithm on star graphs;TCN: scalable hierarchical hypercubes;time-optimal parallel algorithms for constructing optimal virtual cellular networks;dual-Hamiltonian-path-based multicasting on wormhole-routed star graph interconnection networks;Hamiltonian laceability on edge fault star graph;a scalable core migration protocol for dynamic multicast tree;a multi-locking mechanism on shared object DSM;coordinating multi-agents using Javaspaces;modeling for an integration of distributed business information using EPEM;scalability and reliability in a distributed search engine;organization of shared memory with synchronization for multiprocessor-on-a-chip;synchronous/asynchronous switch for a dynamic choice of communication model in distributed systems;and editing any version at any time: a consistency maintenance mechanism in internet-based collaborative environment.

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A multi-locking mechanism on shared object DSM 9

A multi-locking mechanism on shared object DSM

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9th international conference on parallel and Distributed Systems (ICPADS 2002)

作者： Wong, AKL Zhu, WP Univ Queensland Sch Info Tech & Elec Eng St Lucia Qld 4072 Australia

ISBN: (纸本)0769517609

Shared object Distributed Shared Memory (DSM) minimizes the problem of false sharing by allowing programmer to control the sharing size. this shared object approach for distributed parallel programming works well in task parallelism but not in data parallelism. When the data of a shared object is being modified, a lock on that object must be enforced to exclude any concurrent access on that same object. If the shared data within an object is large, internal false sharing would become a problem. We present a multi-locking mechanism for shared object DSM which allows multiple locks be applied to the different data sets of a shared object and thus enhances its concurrency power.

关键词： Australia Computer science Concurrent computing Force control Hardware parallel processing parallel programming Programming profession Scattering Size control

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Hardware implementation of neural network with expansible and reconfigurable architecture 9

Hardware implementation of neural network with expansible an...

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9th international conference on Neural Information processing, ICONIP 2002

作者： Yun, Seok Bae Kim, Young Joo Dong, Sung Soo Lee, Chong Ho Dept. of Electrical Engineering Inha University Korea Republic of Dept. of Digital Electronics and Information Yong-in Songdam College Korea Republic of

ISBN: (纸本)9810475241

In this paper, we propose a new architecture for hardware implementation of digital neural network, called ERNA (expansible and reconfigurable neural network architecture). By adopting flexible ladder-style bus and internal connection network into the digital neural network based on traditional SIMD architecture, the proposed architecture enables fast processing that is based on parallelism and pipelining, while does not abandon the flexibility and expandability of the traditional approach. In the proposed architecture, users can change the network topology by setting configuration registers. Such reconfigurability on hardware allows enough usability like software simulation. We implement the proposed design on real FPGA, and configure the chip to multi-layer perceptron with back propagation learning for alphabet recognition problem. Performance comparison with its software counterpart shows its value in the aspects of performance and flexibility. © 2002 Nanyang Technological University.

关键词： Reconfigurable architectures

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4th international conference on parallel processing and Applied Mathematics, PPAM 2001

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4th international conference on parallel processing and Applied Mathematics, PPAM 2001

ISBN: (纸本)9783540437925

the proceedings contain 101 papers. the special focus in this conference is on Grid architectures, Load Balancing, Performance Analysis, Prediction, parallel Non-numerical algorithms and parallel Programming. the topics include: Interrupt and cancellation as synchronization methods;applications of virtual data in the LIGO experiment;a parallel system architecture based on dynamically configurable shared memory clusters;simultaneous allocation and scheduling with exclusion and precedence relations algorithm;a greedy approach for a time-dependent scheduling problem;dedicated scheduling of biprocessor tasks to minimize mean flow time;heterogeneous dynamic load balancing with a scheme based on the laplacian polynomial;task scheduling for dynamically configurable multiple SMP clusters based on extended DSC approach;processing time and memory requirements for multi-instalment divisible job processing;estimating execution time of distributed applications;evaluation of parallel programs by measurement of its granularity;the performance of different communication mechanisms and algorithms used for parallelization of molecular dynamics code;benchmarking tertiary storage systems with file fragmentation;fem computations on clusters using different models of parallel programming;parallel skeletons for tabu search method based on search strategies and neighborhood partition;a new parallel approach for multi-dimensional packing problems;three parallel algorithms for simulated annealing;solving the flow shop problem by parallel simulated annealing;automated verification of infinite state concurrent systems;criteria of satisfiability for homogeneous systems of linear Diophantine constraints and irregular and out-of-core parallel computing on clusters.

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Holoparadigm: a multiparadigm model oriented to development of distributed systems 9

Holoparadigm: a multiparadigm model oriented to development ...

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9th international conference on parallel and Distributed Systems (ICPADS 2002)

作者： Barbosa, JLV Yamin, AC Vargas, PK Augustin, I Geyer, CFR UCPel Dept Informat Pelotas RS Brazil

ISBN: (纸本)0769517609

Multiparadigm approach integrates programming language paradigms. We have proposed Holoparadigm (Holo) as a multiparadigm model oriented to development of distributed systems. Holo uses a logic blackboard (called history) to implement a coordination mechanism. the programs are organized in levels using abstract entities called beings. First, we describe the principal concepts of the Holoparadigm. After, we propose the Distributed Holo (DHolo), a model to support the distributed execution of programs developed in Holo. DHolo is based on object mobility and blackboards. this distributed model can be fully implemented on Java platform. Experiments were done using Voyager and Horb to implement mobility. Blackboards were implemented using Jada and JavaSpaces.

关键词： Computer architecture Computer languages Hardware History Informatics Java Libraries Logic programming Object oriented modeling parallel processing

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Efficient parallel algorithms for the r-dominating set and p-center problems on trees 9

Efficient parallel algorithms for the r-dominating set and p...

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9th international conference on parallel and Distributed Systems, ICPADS 2002

作者： Lin, Tzu-Chin Wang, Biing-Feng Dept. of Comput. Sci. Nat. Tsing Hua Univ. Hsinchu Taiwan

ISBN: (纸本)0769517609

Let T=(V, E) be a tree with vertex set V and edge set E. Let n=|V|. Each eisin/E has a non-negative length. In this paper, we first present an algorithm on the CREW PRAM for solving the V/V/r-dominating set problem on T, where r≥0 is a real number. the algorithm requires O(log2 n) time using O(n log n) work. Applying this algorithm as a procedure for testing feasibility, the V/V/p-center problem on the CREW PRAM is solved in O(log2 n) time using O(n log2 n) work, where p≥1 is an integer. Previously, He and Yesha had proposed algorithms on the CREW PRAM for special cases of the V/V/r-dominating set and the V/V/p-center problems, in which r is an integer and the lengths of all edges are 1. their V/V/r-dominating set algorithm requires O(log n log log n) time using O(n log n log log n) work;and their V/V/p-center algorithm requires O(log2 n log log n) time using O(n log2 n log log n) work. As compared with He and Yesha's results, ours are more general and more efficient from the aspect of work. © 2002 IEEE.

关键词： parallel algorithms

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Distributed heterogeneous inspecting system and its middleware-based solution 9

Distributed heterogeneous inspecting system and its middlewa...

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9th international conference on parallel and Distributed Systems (ICPADS 2002)

作者： Huang, LC Wu, ZH Zhejiang Univ Dept Comp Sci & Engn Hangzhou 310027 Zhejiang Peoples R China

ISBN: (纸本)0769517609

there are many cases that an organization needs to monitor the data and operations of its supervised departments, especially un-owned departments, which are managed by its own information systems. Distributed Heterogeneous Inspecting System (DHIS) is the system the organization used to monitor its supervised departments by inspecting their information systems. In DHIS, the inspected systems are generally distributed, heterogeneous, and constructed by different companies. DHIS has three key processes - to abstract core data sets and core operation sets, to collect these sets, and to inspect these collected sets. In this paper, we present the concept of DHIS, mathematical definition of DHIS, metadata method to solve the interoperability, security strategy for data tranferring, and a middleware-based solution of DHIS. We also describe an example of the inspecting system at Wenzhou custom.

关键词： middleware business data processing information systems data analysis meta data security of data distributed heterogeneous inspecting system middleware information systems organization companies data sets metadata interoperability data security

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8th international European conference on parallel processing, Euro-Par 2002

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8th international Euro-Par conference on parallel processing, Euro-Par 2002

ISBN: (纸本)3540440496

the proceedings contain 140 papers. the special focus in this conference is on parallel processing. the topics include: Orchestrating computations on the world-wide web;non-massive, non-high performance, distributed computing;facts on performance evaluation and its dependence on workloads;concepts and technologies for a worldwide grid infrastructure;a performance analysis tool for distributed and parallel programs;a hybrid strategy for automated performance problem searches;on the scalability of tracing mechanisms;component based problem solving environment;integrating temporal assertions into a parallel debugger;performance evaluation, analysis and optimization;prototyping and verifying stream-processing systems;symbolic cost estimation of parallel applications;performance modeling and interpretive simulation of PIM architectures and applications;extended overhead analysis for openMP;a call-graph based automatic tool for capture of hardware performance metrics for MPI and openMP applications;performance tuning through source code interdependence;on scheduling task-graphs to logP-machines with disturbances;optimal scheduling algorithms for communication constrained parallel processing;an automatic scheduler for parallel machines;non-approximability results for the hierarchical communication problem with a bounded number of clusters;non-approximability of the bulk synchronous task scheduling problem;adjusting time slices to apply coscheduling techniques in a non-dedicated now;a semi-dynamic multiprocessor scheduling algorithm with an asymptotically optimal competitive ratio;tiling and memory reuse for sequences of nested loops;towards detection of coarse-grain loop-level parallelism in irregular computations and parallel and distributed databases, data mining and knowledge discovery.

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